Dallas Semiconductor DS1832U, DS1832S, DS1832 Datasheet

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FEATURES
Halts and restarts an out-of-control
microprocessor
Holds microprocessor in check during power
transients
Automatically restarts microprocessor after
power failure
monitoring
Eliminates need for discrete components20% tolerance for use with 3.0-volt systemsPin-compatible with the DS1232Low cost 8-pin DIP, 8-pin SOIC, and space
saving µ-SOP packages available
Industrial temperature range of -40°C to
+85°C
PIN ASSIGNMENT
PIN DESCRIPTION
PBRST - Pushbutton Reset Input
TD - Time Delay Set TOL - Selects 10% or 20% VCC Detect GND - Ground RST - Active High Reset Output
RST - Active Low Reset Output ST - Strobe Input
VCC - Power Supply
DESCRIPTION
The DS1832 3.3-Volt MicroMonitor monitors three vital conditions for a microprocessor: power supply, software execution, and external override. First, a precision temperature-compensated reference and comparator circuit monitor the status of V
CC
. When an out-of-tolerance condition occurs, an internal power-fail signal is generated which forces the resets to an active state. When VCC returns to an in-tolerance condition, the reset signals are kept in the active state for a minimum of 250 ms to allow the power supply and processor to stabilize.
DS1832
3.3-Volt MicroMonitor Chip
www.dalsemi.com
DS1832 8-Pin DIP (300-mil) See Mech. Drawings Section
PBRST
TD
TOL
GND
V
CC
ST RST RST
1 2 3 4
8 7 6 5
DS1832S 8-Pin SOIC (150-mil)
See Mech. Drawings Section
1 2 3
4
8 7 6
5
PBRST
TD
TOL
GND
V
CC
ST RST RST
DS1832µ 8-Pin µ-SOP (118-mil)
See Mech. Drawings Section
PBRST
TD
TOL
GND
V
CC
ST RST RST
1 2 3 4
8 7 6 5
DS1832
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The second function the DS1832 performs is pushbutton reset control. The DS1832 debounces the pushbutton input and guarantees an active reset pulse width of 250 ms minimum. The third function is a watchdog timer. The DS1832 has an internal timer that forces the reset signals to the active state if the strobe input is not driven low prior to timeout. The watchdog timer function can be set to operate on timeout settings of approximately 150 ms, 600 ms, or 1.2 seconds.
OPERATION - POWER MONITOR
The DS1832 detects out-of-tolerance power supply conditions and warns a processor-based system of impending power failure. When V
CC
falls below a preset level as defined by TOL, the V
CC
comparator
outputs the signals RST and
RST . When TOL is connected to ground, the RST and RST signals become
active as VCC falls below 2.98 volts. When TOL is connected to VCC, the RST and RST signals become active as VCC falls below 2.64 volts. The RST and RST are excellent control signals for a micropro cessor, as processing is stopped at the last possible moments of valid VCC. On power-up, RST and RST are kept
active for a minimum of 250 ms to allow the power supply and processor to stabilize.
OPERATION - PUSHBUTTON RESET
The DS1832 provides an input pin for direct connection to a pushbutton reset (see Figure 2). The pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such
that RST and RST signals of at least 250 ms minimum are generated. The 250 ms dela y commences as the pushbutton reset input is released from the low level.
OPERATION - WATCHDOG TIMER
The watchdog timer function forces RST and RST signals active when the ST input is not clocked within the predetermined time period. The timeout period is determined by the condition of the TD pin. If TD is connected to ground the minimum watchdog timeout would be 62.5 ms, TD floating would yield a minimum timeout of 250 ms, and TD connected to VCC would provide a timeout of 500 ms minimum.
Timeout of the watchdog starts when RST and RST become inactive. If a high-to-low transition occurs on the ST input pin prior to timeout, the watchdog timer is reset and begins to timeout again. If the watchdog timer is allowed to timeout, then the RST and RST signals are driven active for a minimum of 250 ms. The
ST input can be derived from many microprocessor outputs. The most typical signals used
are the microprocessor address signals, data signals or control signals. When the microprocessor functions normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to timeout. To guarantee that the watchdog timer does not timeout, a high-to-low transition must occur at or less than the minimum times shown in Table 1. A typical circuit example is shown in Figure 4.
The DS1832 watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid a watchdog timeout and reset.
DS1832
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MICROMONITOR BLOCK DIAGRAM Figure 1
PUSHBUTTON RESET Figure 2
TIMING DIAGRAM: PUSHBUTTON RESET Figure 3
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