Dallas Semiconductor DS1806S-050, DS1806S-010-T-R, DS1806S-010, DS1806E-100-T-R, DS1806E-100 Datasheet

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FEATURES

§ Six digitally controlled 64-position

potentiometers

§ 3-wire serial port provides for reading and

setting each potentiometer

§ Devices can be cascaded for single processor

multi-device control

§ Standard resistance values:

- DS1806-010 10 kΩ

- DS1806-050 50 kΩ

- DS1806-100 100 kΩ

§ Operating Temperature Range:

- Industrial temperature: -40°C to +85°C

PIN DESCIPTION

VCC - 3V or 5V Supply

RST - Serial Port Reset Input

DIN - Serial Port Data Input
CLK - Serial Port Clock Input
C

OUT

- Cascade Data Output
H1 - H6 - High End terminal of Pot
W1 - W6 - Wiper Terminal of Pot
GND - Ground
L1-3 - Low Terminal Pots 1 through 3
L4-6 - Low Terminal Pots 4 through 6

PIN ASSIGNMENT

DESCRIPTION

The DS1806 Digital Sextet Potentiometer is a six-channel, digitally controlled, solid-state linear
potentiometer. Each potentiometer is comprised of 63 equiresistive sections as illustrated in the block
diagram of Figure 1. Each potentiometer has three terminals accessible to the user. These include the high
side terminals, HX, the wiper terminals, WX, and the low-end terminals, L1-3 and L4-6. Potentiometers 1
through 3 share the same low-end terminal L1-3; likewise, potentiometers 4 through 6 share the low-end
terminal L4-6.

Each wiper’s position is selected via an 8-bit register value. Communication and control of the device is
accomplished via a 3-wire serial port interface. This interface in conjunction with a cascade output allows
the value of the device wiper settings to be read.

DS1806

Digital Sextet Potentiometer

www.dalsemi.com

W1 1 20 V

CC

W2 2 19 H1

L1-3 3 18 H2

W3 4 17 H3
W4 5 16 H4
L4-6 6 15 H5
W6 7 14 W5
RST 8 13 H6
CLK 9 12 D

IN

GND 10 11 C

OUT

DS1806 20-Pin DIP (300-mil)
DS1806S 20-Pin SOIC (300-mil)
DS1806E 20-Pin TSSOP (173-mil)
See Mech. Drawings Section

DS1806

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For multiple device and single processor environments, the DS1806 can be cascaded or daisy-chained.
This feature allows a single processor to control multiple devices.

The DS1806 is available in 10, 50 and 100-kohm versions and is specified over the industrial temperature
range. Packages for the device include 20-lead DIPs, SOICs, and TSSOPs.

OPERATION

A block diagram of the device is provided in Figure 1. As shown, the DS1806 contains six 64-position
potentiometers whose wiper positions are set by an 8-bit value. The DS1806 contains a 48-bit I/O shift
register which is used to store the respective wiper position data for each of the six potentiometers.

Each potentiometer has three terminals accessible to the user. These include the high side terminals, HX,
the wiper terminals, WX, and the low-end terminals, L1-3 and L4-6. Potentiometers 1 through 3 share the
same low-end terminal L1-3. And likewise, potentiometers 4 through 6 share the low-end terminal L4-6.

Control of the DS1806 is accomplished via a 3-wire serial communication interface which allows the user
to set the wiper position value for each potentiometer. The 3-wire serial interface consists of the control

signals RST , DIN, and CLK. On power-up, the wiper positions of each potentiometer are set to the low­end terminal LX (00000000).

The RST control signal is used to enable 3-wire serial port operation. The RST signal (3-wire serial port)
is active when in a high state. Any communication intended to change wiper settings must begin with the
transition of the RST from the low state to the high state.

The CLK signal input is used to provide timing synchronization for data input and output. Wiper position
data is loaded into the DS1806 through the D

IN

input terminal. This data is shifted one bit at a time into

the 48-bit I/O shift register of the part, LSB first. Figure 3 provides an illustration of the 48-bit shift
register.

Figure 4 provides 3-wire serial port protocol and timing diagrams. As shown, the 3-wire port is inactive
when the RST signal input is low. Once RST has transitioned from the low to the high state, the serial
port becomes active. When active, data is loaded into the I/O shift register on the low-to-high transition of
the CLK.

Data is transmitted in order of LSB first. Potentiometers are designated from 1 through 6 and the value
for potentiometer-1 will be the first data entered into the shift register, followed by that of potentiometer­2 and so forth.

Each wiper has an 8-bit register which is used for setting the position of the wiper on the resistor array.
Because the DS1806 is a 64-position potentiometer, only six bits of information are needed to set wiper
position. The remaining two bits of information are used to provide a “don’t change” feature. Wiper
position is controlled by bit positions 0 through 5 of each register. The “don’t change” feature is
controlled by bits 6 and 7 of each register. When bits 6 and 7 have value “11 xxxxxx,” wiper position will
not change regardless of the states of bits 0 through 5. If bits 6 and 7 are set to any other value, bits 0
through 5 will be used as the new wiper position. The “don’t change” feature allows the user to change
the value of any potentiometer of the DS1806 without affecting or having to remember the remaining
positions of the potentiometer wipers. Figure 2 provides the format for a wiper’s register.

DS1806

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Wiper placement for each potentiometer is such that position-63 corresponds to the H

X

terminal of the de-

vice while position-0 corresponds to the ground terminal. For example, to set a potentiometer’s wiper
position to 15 (decimal), the binary value shifted into the wiper register should be 00001111. This will
place the wiper tap at the 15th step above the low-end terminal, LX.

All communication transactions should provide the total 48 bits of information when writing or reading
from the part. This is especially true for applications using all six potentiometers. If a complete set of 48
bits is not transmitted to the part, undesired wiper position settings may occur.

DS1806 BLOCK DIAGRAM Figure 1

WIPER REGISTER CONFIGURATION Figure 2

48-BIT I/O SHIFT REGISTER Figure 3