Dallas Semiconductor DS1672U-3, DS1672U-2, DS1672S-3, DS1672S-2, DS1672-3 Datasheet

DS1672

A

Low Voltage Serial Timekeeping Chip

FEATURES

 32-bit counter
 2-wire serial interface
 Automatic power-fail detect and switch

circuitry

 Power-fail reset output
 Low-voltage oscillator operation (1.3V min.)
 Trickle charge capability


ORDERING INFORMATION

DS1672X-X

2 2.0V operation
3 3.0V operation
33 3.3V operation

blank 8-pin DIP
S8-pin SOIC

U 8-pin µSOP

PIN ASSIGNMENT

V

8
7

RST

6

SCL

5

SD

V

BACKUP

GND

X1
X2

1
2
3
4

PIN DESCRIPTION

V

CC, VBACKUP

GND - Ground
X1, X2 - 32.768 kHz crystal pins
SCL - Serial clock
SDA - Serial data

RST - Reset output

- Power Supply Inputs

DESCRIPTION

The DS1672 incorporates a 32-bit counter and power monitoring functions. The 32-bit counter is
designed to count seconds and can be used to derive time of day, week, month, month, and year by using
a software algorithm. A precision temperature-compensated reference and comparator circuit monitors
the status of V

. When an out-of-tolerance condition occurs, an internal power-fail signal is generated

CC

which forces the reset to the active st ate. When VCC returns to an in-tolerance condition, the reset signal
is kept in the active state for 250 ms to allow the power supply and processor to stabilize.

OPERATION

The block diagram in Figure 1 shows the main elements of the DS1672. As shown, communications to
and from the DS1672 occur serially over a 2-wire bi-directional bus. The DS1672 operates as a slave
device on the serial bus. Access is obtained by implementing a START condition and providing a device
identification code followed by a register address. Subsequent registers can be accessed sequentially until
a STOP condition is executed.

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DS1672 BLOCK DIAGRAM Figure 1

X1 X2

OSCILLATOR

AND DIVIDER

V

CC

V

BACKUP

GND

RST

POWER

CONTROL

DS1672

32-BIT
COUNTER
(4 BYTES)

CONTROL

TRICKLE CHARGER

CONTROL

LOGIC

SCL

SDA

SERIAL BUS

INTERFACE

ADDRESS

REGISTER

ADDRESS MAP

The counter is accessed by reading or writing the first 4 bytes of the DS1672 (00h - 03h). The control
register and trickle charger are accessed by reading or writing the appropriate register bytes as illustrated
in Figure 2. If the master continues to send or request more data after the address pointer has reached
05h, the address pointer will wrap around to location 00h.

DS1672 REGISTERS Figure 2

AddressB7B6B5B4B3B2B1B0Function

00h Counter

Byte 1

01h Counter

Byte 2

02h Counter

Byte 3

03h Counter

Byte 4

04h

EOSC

05h TCS TCS TCS TCS DS DS RS RS Trickle

Control

Charger

DATA RETENTION MODE

The device is fully accessible and data can be written and ready only when VCC is greater than VPF.
However, when V

are blocked from any access. If VPF is less than V
V

BACKUP

VCC to V

when VCC drops below VPF. If VPF is greater than V

BACKUP

until VCC is returned to nominal levels.

falls below VPF, (point at which write protection occurs) the internal clock re gisters

CC

, the device power is switched from VCC to

BACKUP

, the device power is switched from

BACKUP

when VCC drops below V

BACKUP

BACKUP

. The registers are maintained from the V

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source

DS1672

OSCILLATOR CONTROL

The EOSC bit (bit 7 of the control register) controls the oscillator when in back-up mode. This bit when
set to logic 0 will start the oscillator. When this bit is set to a logic 1, the oscillator is stopped and the
DS1672 is placed into a low-power standby mode with a current drain of less than 200 nanoamps when in
back-up mode. When the DS1672 is powered by V

of the

EOSC bit; however, the counter is incremented only when EOSC is a logic 0.

the oscillator is always on regardless of the status

CC,

CRYSTAL SELECTION

A standard 32.768 kHz quartz crystal should be directly connected to the X1 and X2 oscillator pins. The
crystal selected for use should have a specified load capacitance (CL) of 6 pF. For more information on
crystal selection and crystal layout considerations, please consult Application Note 58, “Crystal
Considerations with Dallas Real Time Clocks.”

MICROPROCESSOR MONITOR

A temperature-compensated comparator circuit monitors the level of VCC. When VCC falls to the power­fail trip point, the RST signal (open drain) is pulled active. When VCC returns to nominal levels, the RST

signal is kept in the active state for 250 ms (typically) to allow the power supply and microprocessor to
stabilize. Note, however, that if the EOSC bit is set to a logic 1 (to disable the oscillator during write

protection), the reset signal will be kept in an active state for 250 ms plus the start-up time of the
oscillator.

TRICKLE CHARGER

The trickle charger is controlled by the trickle charge register. The simplified schematic of Figure 3
shows the basic components of the trickle charger. The trickle charge select (TCS) bit (bits 4-7) controls
the selection of the trickle charger. In order to prevent accidental enablin g, only a pattern on 1010 will
enable the trickle charger. All other patterns will disable the trickle charger. The DS1672 powers up
with the trickle charger disabled. The diode select (DS) bits (bits 2-3) select wheth er or not a diode is
connected between VCC and V

BACKUP

The RS bits (bits 0-1) select whether a r esist or is connect ed b etwe en VCC and V
of the resistor is. The resistor selected by the resistor select (RS) bits and the diode selected by the diode
select (DS) bits are as follows:

TCS TCS TCS TCS DS DS RS RS Function
XXXX 0 0 XXDisabled
XXXX 1 1 XXDisabled
XXXX XX0 0 Disabled
1010 0101
1010 1001
1010 0110
1010 1010
1010 0111
1010 1011

. If DS is 01, no diode is selected or if DS is 10, a diode is selected.

BACKUP

and what the value

No diode, 100Ω resistor
One diode, 100Ω resistor
No diode, 2 kΩ resistor
One diode, 2 kΩ resistor
No diode, 4 kΩ resistor
One diode, 4 kΩ resistor

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DS1672

Diode and resistor selection is determined by the user according to the maximum current desired for
battery or super cap charging. The maximum charging current can be calculated as illustrated in the
following example. Assume that a system power supply of 3 volt is applied to VCC and a super cap is
connected to V

BACKUP

between VCC and V

= (3.0V – diode drop) / R2

I

max

. Also assume that the trickle charger has been enabled with a diode and resistor R2

BACKUP

. The maximum current I

would therefore be calculated as follows:

max

~ (3.0V – 0.7V) / 2 kΩ
~ 1.2 mA

Obviously, as the super cap changes, the voltage drop between V

and V

CC

therefore the charge current will decrease.

DS1672 PROGRAMMABLE TRICKLE CHARGER Figure 3

V

CC

1 OF 16 SELECT

NOTE: ONLY 1010 ENABLES

TCS TCS TCS TCS DS DS RS RS

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

1 OF 2

SELECT

1 OF 3

SELECT

TCS = TRICKLE CHARGER SELECT
DS = DIODE SELECT
RS = RESISTOR SELECT

BACKUP

will decrease and

R1

Ω

100

R2
2k

Ω

V

BACKUP

Ω

R3

Ω

4k

TRICKLE CHARGE REGISTER

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