Dallas Semiconductor DS1350WP-150, DS1350WP-100 Datasheet

DS1350W

3.3V 4096K Nonvolatile SRAM with Battery Monitor

DS1350W

PRELIMINARY

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FEATURES

• 10 years minimum data retention in the absence of

external power

• Data is automatically protected during power loss

• Power supply monitor resets processor when V

power loss occurs and holds processor in reset during V

ramp–up

• Battery monitor checks remaining capacity daily

• Read and write access times as fast as 150 ns

• Unlimited write cycle endurance

• Typical standby current 50 µA

• Upgrade for 512K x 8 SRAM, EEPROM or Flash

• Lithium battery is electrically disconnected to retain

freshness until power is applied for the first time

• Optional industrial temperature range of –40°C to

+85°C, designated IND

• New PowerCap Module (PCM) package

– Directly surface–mountable module – Replaceable snap–on PowerCap provides lith-

ium backup battery

– Standardized pinout for all nonvolatile SRAM

products

– Detachment feature on PowerCap allows easy

removal using a regular screwdriver

PIN ASSIGNMENT

OE CE

RST

1 2 3 4 5 6 7 8 9 10 11 12 13

34 33 32 31 30 29 28 27 26 25 24 23

22 14 15 16 17

A18 A17 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

A15 A16

DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

GND

34–PIN POWERCAP MODULE (PCM)

GND V

BAT

(USES DS9034PC POWERCAP)

PIN DESCRIPTION

A0–A18 – Address Inputs DQ0–DQ7 – Data In/Data Out CE – Chip Enable WE – Write Enable OE – Output Enable RST

– Reset Output BW – Battery Warning Output V

– Power (+3.3 Volts) GND – Ground NC – No Connect

DESCRIPTION

The DS1350W 3.3V 4096K Nonvolatile SRAM is a 4,194,304–bit, fully static, nonvolatile SRAM organized as 524,288 words by eight bits. Each NV SRAM has a self–contained lithium energy source and control circuitry which constantly monitors V

for an out–of–tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent

data corruption. Additionally, the DS1350W has dedicated circuitry for monitoring the status of VCC and the status of the internal lithium battery. DS1350W devices in the PowerCap Module package are directly surface mountable and are normally paired with a DS9034PC PowerCap to form a complete Nonvolatile SRAM module. The devices can be used in place of 512K x 8 SRAM, EEPROM or Flash components.

DS1350W

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READ MODE

The DS1350W executes a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip Enable) and OE (Output Enable) are active (low). The unique address specified by the 19 address inputs (A

- A18) defines which of the 524,288 bytes of data is to be accessed. Valid data will be available to the eight data output drivers within t

ACC

(Access Time) after the last address input signal is stable, providing that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not satisfied, then data access must be measured from the later occurring signal (CE or OE) and the limiting parameter is either tCO for CE or t

for OE rather than address access.

WRITE MODE

The DS1350W excutes a write cycle whenever the WE and CE signals are in the active (low) state after address inputs are stable. The later occurring falling edge of CE or WE will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of CE or WE. All address inputs must be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time (t

) before another cycle can

be initiated. The OE

control signal should be kept inactive (high) during write cycles to avoid bus contention. However, if the output drivers are enabled (CE

and OE

active) then WE will disable the outputs in t

ODW

from its

falling edge.

DATA RETENTION MODE

The DS1350W provides full functional capability for V

greater than 3.0 volts and write protects by 2.8 volts. Data is maintained in the absence of V

without any additional support circuitry . The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically write protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As V

falls below approximately 2.5 volts, the power switching circuit connects the lithium energy source to RAM to retain data. During power–up, when VCC rises above approximately

2.5 volts, the power switching circuit connects external VCC to the RAM and disconnects the lithium energy source. Normal RAM operation can resume after V

exceeds 3.0 volts.

SYSTEM POWER MONITORING

The DS1350W has the ability to monitor the external VCC power supply. When an out–of–tolerance power

supply condition is detected, the NV SRAM warns a processor–based system of impending power failure by asserting RST

. On power up, RST is held active for 200 ms nominal to prevent system operation during power–on transients and to allow t

REC

to elapse. RST has

an open–drain output driver.

BATTERY MONITORING

The DS1350W automatically performs periodic battery voltage monitoring on a 24 hour time interval. Such monitoring begins within t

REC

after VCC rises above V

and is suspended when power failure occurs. After each 24 hour period has elapsed, the battery is

connected to an internal 1MΩ test resistor for one second. During this one second, if battery voltage falls below the battery voltage trip point (2.6V), the battery warning output BW

is asserted. Once asserted, BW remains active until the module is replaced. The battery is still retested after each V

power–up, however, even

if BW

is active. If the battery voltage is found to be higher than 2.6V during such testing, BW is de–asserted and regular 24–hour testing resumes. BW has an open– drain output driver.

FRESHNESS SEAL

Each DS1350W is shipped from Dallas Semiconductor with its lithium energy source disconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than V

, the lithium energy source is

enabled for battery backup operation.

PACKAGES

The 34–pin PowerCap Module integrates SRAM memory and nonvolatile control into a module base along with contacts for connection to the lithium battery in the DS9034PC PowerCap. The PowerCap Module package design allows a DS1350W device to be surface mounted without subjecting its lithium backup battery to destructive high–temperature reflow soldering. After a DS1350W module base is reflow soldered, a DS9034PC is snapped on top of the base to form a complete Nonvolatile SRAM module. The DS9034PC is keyed to prevent improper attachment. DS1350W module bases and DS9034PC PowerCaps are ordered separately and shipped in separate containers. See the DS9034PC data sheet for further information.

DS1350W

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ABSOLUTE MAXIMUM RATINGS*

Voltage On Any Pin Relative To Ground –0.3V to +4.6V Operating Temperature 0

°C to 70°C, –40°C to +85°C for IND parts

Storage Temperature –40

°C to +70°C, –40°C to +85°C for IND parts

Soldering T emperature 260

°C For 10 seconds

* This is a stress rating only and functional operation of the device at these or any other conditions above those

indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.

RECOMMENDED DC OPERATING CONDITIONS (tA: See Note 10)

PARAMETER SYMBOL MIN TYP MAX UNITS NOTES

Power Supply Voltage V

3.0 3.3 3.6 V

Logic 1 V

2.2 V

Logic 0 V

0.0 0.4 V

DC ELECTRICAL CHARACTERISTICS (tA: See Note 10) (VCC=3.3V ±0.3V)

PARAMETER SYMBOL MIN TYP MAX UNITS NOTES

Input Leakage Current I

–1.0 +1.0 µA

I/O Leakage Current CE

≥ VIH ≤ V

–1.0 +1.0 µA

Output Current @ 2.2V I

–1.0 mA 14

Output Current @ 0.4V I

2.0 mA 14

Standby Current CE = 2.2V I

CCS1

50 250 µA

Standby Current CE = VCC–0.2V I

CCS2

30 150 µA

Operating Current I

CCO1

50 mA

Write Protection Voltage V

2.8 2.9 3.0 V

CAPACITANCE (tA = 25°C)

PARAMETER SYMBOL MIN TYP MAX UNITS NOTES

Input Capacitance C

5 10 pF

Input/Output Capacitance C

I/O

5 10 pF

DS1350W

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AC ELECTRICAL CHARACTERISTICS (tA: See Note 10) (VCC=3.3V ±0.3V)

DS1350W–150

PARAMETER SYMBOL

MIN MAX

TYPE UNITS NOTES

Read Cycle Time t

150 ns

Access Time t

ACC

150 ns

OE to Output Valid t

70 ns

CE to Output Valid t

150 ns

OE or CE to Output Active t

COE

5 ns 5

Output High Z from Deselection t

35 ns 5

Output Hold from Address Change

5 ns

Write Cycle Time t

150 ns

Write Pulse Width t

100 ns 3

Address Setup Time t

0 ns

Write Recovery Time t

WR1

WR2

ns 12

Output High Z from WE t

ODW

35 ns 5

Output Active from WE t

OEW

5 ns 5

Data Setup Time t

60 ns 4

Data Hold Time t

DH1

DH2

ns 12

READ CYCLE

ACC

COE

OUTPUT DATA VALID

OUT

ADDRESSES

CE t

SEE NOTE 1

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