VCC power loss occurs and holds processor in
reset during VCC ramp-up
Battery monitor checks remaining capacity
daily
Read and write access times as fast as 70 ns
Unlimited write cycle endurance
Typical standby current 50 µA
Upgrade for 128k x 8 SRAM, EEPROM or
Flash
Lithium battery is electrically disconnected to
retain freshness until power is applied for the
first time
A0 - A16- Address Inputs
DQ0 - DQ7 - Data In/Data Out
CE - Chip Enable
WE - Write Enable
OE - Output Enable
RST- Reset Output
BW- Battery Warning Output
- Power (+5V)
V
CC
GND - Ground
NC - No Connect
DESCRIPTION
The DS1345 1024k Nonvolatile SRAMs are 1,048,576-bit, fully static, nonvolatile SRAMs organized as
131,072 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry
which constantly monitors V
lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. Additionally, the DS1345 devices have dedicated circuitry for monitoring the
status of VCC and the status of the internal lithium battery. DS1345 devices in the PowerCap Module
package are directly surface mountable and are normally paired with a DS9034PC PowerCap to form a
complete Nonvolatile SRAM module. The devices can be used in place of 128k x 8 SRAM, EEPROM or
Flash components.
for an out-of-tolerance condition. When such a condition occurs, the
CC
1 of 12111999
DS1345Y/AB
READ MODE
The DS1345 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 17 address inputs
(A0 - A16) defines which of the 131,072 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within t
(Access Time) after the last address input signal is stable, providin g
ACC
that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not
satisfied, then data access must be measured from the later-occurring signal (CE or OE ) and the limiting
parameter is either tCO for CE or tOE for OE rather than address access.
WRITE MODE
The DS1345 devices execute a write c ycle whenever the WE and CE signals are i n the active (low) state
after address inputs are stable. The later-occurrin g falling edge of CE or WE will determine the start of
the write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs
must be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery
time (tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high)
during write cycles to avoid bus contention. However, if the output drivers are enabled ( CE and OE
active) then WE will disable the outputs in t
from its falling edge.
ODW
DATA RETENTION MODE
The DS1345AB provides full functional capability for VCC greater than 4.75 volts and write protects by
4.5 volts. The DS1345Y provides full functional capability for VCC greater than 4.5 volts and write
protects by 4.25 volts. Data is maintained in the absence of VCC without any additional support circuitry.
The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high
impedance. As VCC falls below approximately 2.7 volts, the power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when VCC rises above approximately 2.7 volts,
the power switching circuit connects external VCC to the RAM and disconnects the lithium energy source.
Normal RAM operation can resume after VCC exceeds 4.75 volts for the DS1345AB and 4.5 volts for the
DS1345Y.
SYSTEM POWER MONITORING
DS1345 devices have the ability to monitor the external VCC power supply. When an out-of-tolerance
power supply condition is detected, the NV SRAMs warn a processor-based system of impending power
failure by asserting RST . On power-up, RST is held active for 200 ms nominal to prevent system
operation during power-on transients and to allow t
to elapse. RST has an open drain output driver.
REC
BATTERY MONITORING
The DS1345 devices automatically perform periodic battery voltage monitoring on a 24-hour time
interval. Such monitoring begins within t
failure occurs.
After each 24-hour period has elapsed, the battery is connected to an internal 1 MΩ=test resistor for one
second. During this one second, if battery voltage falls below the battery voltage trip point (2.6V), the
battery warning output
BW is asserted. Once asserted, BW remains active until the module is replaced.
The battery is still retested after each VCC power-up, however, even if BW is active. If the battery voltage
is found to be higher than 2.6V during such testing, BW is de-asserted and regular 24-hour testing
resumes. BW has an open drain output driver.
after VCC rises above VTP and is suspended when power
REC
2 of 12
DS1345Y/AB
FRESHNESS SEAL
Each DS1345 is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When VCC is first applied at a level greater than VTP, the lithium
energy source is enabled for battery backup operation.
PACKAGES
The 34-pin PowerCap Module integrates SRAM memory and nonvolatile control along with contacts for
connection to the lithium battery in the DS9034PC PowerCap. The PowerCap Module pack age design
allows a DS1345 PCM device to be surface mounted without subjecting its lithium backup battery to
destructive high-temperature reflow soldering. After a DS1345 PCM is reflow soldered, a DS9034PC is
snapped on top of the PCM to form a complete Nonvolatile SRAM module. The DS9034PC is keyed to
prevent improper attachment. DS1345 PowerCap Modules and DS9034PC PowerCaps are ordered
separately and shipped in separate containers. See the DS9034PC data sheet for further information.
3 of 12
DS1345Y/AB
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground -0.3V to +7.0V
Operating Temperature 0°C to 70°C, -40°C to +85°C for IND parts
Storage Temperature -40°C to +70°C, -40°C to +85°C for IND parts
Soldering Temperature 260°C for 10 seconds
* This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (tA: See Note 10)
PARAMETERSYMBOLMINTYPMAXUNITSNOTES
DS1345AB Power Supply VoltageV
DS1345Y Power Supply VoltageV
Logic 1V
Logic 0V
CC
CC
IH
IL
4.755.05.25V
4.55.05.5V
2.2V
CC
V
0.00.8V
DC ELECTRICAL (VCC=5V ±=5% for DS1345AB)
CHARACTERISTICS (t
PARAMETERSYMBOLMINTYPMAXUNITSNOTES
Input Leakage CurrentI
I/O Leakage Current CE ≥ VIH ≤ V
Output Current @ 2.4VI
Output Current @ 0.4VI
Standby Current CE =2.2V
Standby Current CE =VCC-0.5V
Operating CurrentI
Write Protection Voltage (DS1345AB)V
Write Protection Voltage (DS1345Y)V
CC
: See Note 10) (VCC=5V ±=10% for DS1345Y)
A
I
OH
OL
I
CCS1
I
CCS2
CCO1
IL
IO
TP
TP
-1.0+1.0
-1.0+1.0
-1.0mA14
2.0mA14
200600
50150
85mA
4.504.624.75V
4.254.374.5V
µA
µA
µA
µA
CAPACITANCE (tA=25°C)
PARAMETERSYMBOLMINTYPMAXUNITSNOTES
Input CapacitanceC
Input/Output CapacitanceC
IN
I/O
4 of 12
510pF
510pF
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