General Description
The DS1340 is a real-time clock (RTC)/calendar that is
pin compatible and functionally equivalent to the ST
M41T00, including the software clock calibration. The
device additionally provides trickle-charge capability
on the V
BACKUP
pin, a lower timekeeping voltage, and
an oscillator STOP flag. Block access of the register
map is identical to the ST device. Two additional registers, which are accessed individually, are required for
the trickle charger and flag. The clock/calendar provides seconds, minutes, hours, day, date, month, and
year information. A built-in power-sense circuit detects
power failures and automatically switches to the backup supply. The device is programmed serially through
a 2-wire bidirectional bus.
Applications
Portable Instruments
Point-of-Sale Equipment
Medical Equipment
Telecommunications
Features
♦ Enhanced Second Source for the ST M41T00
♦ Fast (400kHz) 2-Wire Interface
♦ Software Clock Calibration
♦ RTC Counts Seconds, Minutes, Hours, Day, Date,
Month, and Year
♦ Automatic Power-Fail Detect and Switch Circuitry
♦ Trickle-Charge Capability
♦ Low Timekeeping Voltage Down to 1.3V
♦ Three Operating Voltage Ranges (1.8V, 3V, and
3.3V)
♦ Oscillator Stop Flag
♦ Available in 8-Pin µSOP or SO Packages
DS1340
2-Wire RTC with Trickle Charger
______________________________________________ Maxim Integrated Products 1
1
2
3
4
8
7
6
5
V
CC
FT/OUT
SCL
SDA
V
BACKUP
GND
X2
X1
TOP VIEW
DS1340
SO,
µSOP
Pin Configuration
Ordering Information
4
CPU
V
CC
V
CC
V
CC
5
6
8
12
SDA
SCL
GND
X2X1
V
CC
RPU RPU
CRYSTAL
FT/OUT
V
BACKUP
3
7
RPU = t
R
/ CB
DS1340
Typical Operating Circuit
Rev 0; 6/03
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
8 µSOP
1340
A1-18
DS1340U-3
-40°C to +85°C 8 SO (0.150in)
-40°C to +85°C 8 SO (0.150in)
-40°C to +85°C 8 SO (0.150in)
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
DS1340
2-Wire RTC with Trickle Charger
2 _____________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage Range on VCCPin Relative to Ground .....-0.3V to +6.0V
Voltage Range on SDA, SCL, and FT/OUT
Relative to Ground..................................-0.3V to (V
CC
+ 0.3V)
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-55°C to +125°C
Soldering Temperature Range ..................................See JEDEC
J-STD-020A Specification
AC ELECTRICAL CHARACTERISTICS
(VCC= V
CC MIN
to V
CC MAX
, TA= -40°C to +85°C, unless otherwise noted.) (Note 1, Figure 1)
SCL Clock Frequency f
SCL
Fast mode
kHz
Standard mode 4.7
Bus Free Time Between STOP
and START Conditions
t
BUF
Fast mode 1.3
µs
Standard mode 4.0
Hold Time (Repeated) START
Condition (Note 2)
Fast mode 0.6
µs
Standard mode 4.7
Low Period of SCL Clock t
LOW
Fast mode 1.3
µs
Standard mode 4.0
High Period of SCL Clock t
HIGH
Fast mode 0.6
µs
Standard mode 0
Data Hold Time (Notes 3, 4)
ns
Standard mode 4.7
START Setup Time
Fast mode 0.6
µs
Standard mode
Rise Time of SDA and SCL
Signals (Note 6)
t
R
Fast mode
Fall Time of SDA and SCL Signals
(Note 6)
t
F
Fast mode
ns
Standard mode 4.7
Setup Time for STOP Condition
Fast mode 0.6
µs
Capacitive Load for Each Bus
Line
C
B
(Note 6)
pF
Pulse Width of Spikes that Must
be Suppressed by the Input Filter
Oscillator Stop Flag (OSF) Delay
SYMBOL
t
HD:STA
MIN TYP MAX
100
100 400
t
HD:DAT
t
SU:DAT
t
SU:STA
t
SU:STO
250
100
20 + 0.1C
20 + 0.1C
20 + 0.1C
20 + 0.1C
B
B
B
B
0.9
0.9
1000
300
300
300
400
DS1340
2-Wire RTC with Trickle Charger
_____________________________________________________________________ 3
RECOMMENDED DC OPERATING CONDITIONS
(VCC= V
CC MIN
to V
CC MAX
, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= 3.3V, TA= +25°C, unless
otherwise noted.) (Note 1)
DS1340-3 2.7 3.0 3.3
Supply Voltage (Note 8) V
CC
DS1340-33
3.3 5.5
V
Input Logic 1 (SDA, SCL) V
IH
(Note 8)
V
Input Logic 0 (SDA, SCL) V
IL
(Note 8)
Supply Voltage, Pullup (FT/OUT)
V
IH
(Note 8) 5.5 V
DS1340-18 1.3 3.7
DS1340-3 1.3 3.7
Backup Supply Voltage (Note 8)
DS1340-33 1.3 5.5
V
R1 (Notes 9, 10)
Trickle-Charge Current-Limiting
Resistors
R3 (Note 12)
2.6 2.7Power-Fail Voltage (Note 8) V
PF
DS1340-33
V
Input Leakage (SCL, CLK) I
LI
-1 +1 µA
I/O Leakage (SDA, FT/OUT) I
LO
-1 +1 µA
VCC > 2V; V
OL
= 0.4V 3.0
SDA Logic 0 Output I
OLSDA
1.7V < VCC < 2V; VOL = 0.2 x V
CC
3.0
mA
VCC > 2V; VOL = 0.4V 3.0
1.7V < VCC < 2V; VOL = 0.2 x V
CC
3.0
mA
FT/OUT Logic 0 Output I
OLSQW
1.3V < VCC < 1.7V; VOL = 0.2x V
CC
250 µA
DS1340-18 72 150
DS1340-3
200
Active Supply Current (Note 13) I
CCA
DS1340-33
300
µA
DS1340-18 60 100
DS1340-3 81 125Standby Current (Note 14) I
CCS
DS1340-33
150
µA
V
BACKUP
Leakage Current
DC ELECTRICAL CHARACTERISTICS
(VCC= 0V, V
BACKUP
= 3.7V, TA= -40°C to +85°C, unless otherwise noted.) (Note 1)
OSC ON, FT = 0, V
BACKUP
= 3.0V,
T
A
= +25°C (Notes 15, 16)
V
BACKUP
Data-Retention Current
SYMBOL
V
BACKUP
I
BACKUPLKG
I
BACKUP1
I
BACKUP2
I
BACKUP3
I
BACKUPDR
MIN TYP MAX
1.71
2.97
0.7 x V
-0.3 +0.3 x V
1.51
2.45
2.70 2.88 2.97
CC
V
250
2000
4000
108
192
100
800 1150
850 1250
800 1000
25.0
CC
1.89
+ 0.3
CC
1.71
DS1340
2-Wire RTC with Trickle Charger
4 _____________________________________________________________________
POWER-UP/POWER-DOWN CHARACTERISTICS
(TA= -40°C to +85°C) (Figure 2)
Recovery at Power-Up t
REC
(Note 17) 2 ms
VCC Fall Time; V
PF(MAX)
to
V
PF(MIN)
t
VCCF
µs
VCC Rise Time; V
PF(MIN)
to
V
PF(MAX)
t
VCCR
0µs
WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery-backup mode.
Note 1: Limits at -40°C are guaranteed by design and not production tested.
Note 2: After this period, the first clock pulse is generated.
Note 3: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the V
IH(MIN)
of the SCL
signal) to bridge the undefined region of the falling edge of SCL.
Note 4: The maximum t
HD:DAT
only has to be met if the device does not stretch the low period (t
LOW
) of the SCL signal.
Note 5: A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
≥ to 250ns must be met. This
is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the
low period of the SCL signal, it must output the next data bit to the SDA line t
R MAX
+ t
SU:DAT
= 1000 + 250 = 1250ns
before the SCL line is released.
Note 6: C
B
—total capacitance of one bus line in pF.
Note 7: The parameter t
OSF
is the period of time the oscillator must be stopped for the OSF flag to be set over the 0V ≤ VCC≤
V
CCMAX
and 1.3V ≤ V
BAT
≤ 3.7V range.
Note 8: All voltages are referenced to ground.
Note 9: Measured at V
CC
= typ, V
BACKUP
= 0V, register 08h = A5h.
Note 10: The use of the 250Ω trickle-charge resistor is not allowed at V
CC
> 3.63V and should not be enabled.
Note 11: Measured at V
CC
= typ, V
BACKUP
= 0V, register 08h = A6h.
Note 12: Measured at V
CC
= typ, V
BACKUP
= 0V, register 08h = A7h.
Note 13: I
CCA
—SCL clocking at max frequency = 400kHz.
Note 14: Specified with 2-wire bus inactive.
Note 15: Measured with a 32.768kHz crystal attached to the X1 and X2 pins.
Note 16: Limits at +25°C are guaranteed by design and not production tested.
Note 17: This delay applies only if the oscillator is enabled and running. If the oscillator is disabled or stopped, no power-up delay
occurs.
SDA
SCL
t
HD:STA
t
LOW
t
HIGH
t
R
t
F
t
BUF
t
HD:DAT
t
SU:DAT
REPEATED
START
t
SU:STA
t
HD:STA
t
SU:STO
t
SP
STOP START
Figure 1. Data Transfer on 2-Wire Serial Bus
300