Dallas Semiconductor DS1225Y-200-IND, DS1225Y-200, DS1225Y-170, DS1225Y-150-IND, DS1225Y-150 Datasheet

DS1225Y
64K Nonvolatile SRAM
DS1225Y
021998 1/8
FEATURES
10 years minimum data retention in the absence of
external power
Data is automatically protected during power loss
PROM
Unlimited write cycles
Low-power CMOS
JEDEC standard 28–pin DIP package
Read and write access times as fast as 150 ns
Full ±10% operating range
+85°C, designated IND
PIN ASSIGNMENT
1 2 3 4 5 6
7 8 9 10 11 12 13 14 15
16
17
18
19
20
21
22
23
24
25
26
27
28NC
A12
A7 A6 A5 A4 A3 A2
A1
A0 DQ0 DQ1 DQ2
GND
VCC
NC A8 A9 A11
A10
DQ7 DQ6 DQ5 DQ4 DQ3
WE
OE
CE
28–PIN ENCAPSULATED PACKAGE
720 MIL EXTENDED
PIN DESCRIPTION
A0–A12 – Address Inputs DQ0–DQ7 – Data In/Data Out CE
– Chip Enable WE – Write Enable OE – Output Enable V
CC
– Power (+5V) GND – Ground NC – No Connect
DESCRIPTION
The DS1225Y 64K Nonvolatile SRAM is a 65,536–bit, fully static, nonvolatile RAM organized as 8192 words by 8 bits. Each NV SRAM has a self–contained lithium energy source and control circuitry which constantly monitors V
CC
for an out–of–tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is uncon­ditionally enabled to prevent data corruption. The NV SRAM can be used in place of existing 8K x 8 SRAMs
DS1225Y
021998 2/8
READ MODE
The DS1225Y executes a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip Enable) and OE (Output Enable) are active (low). The unique address specified by the 13 address inputs (A
0–A12
) de­fines which of the 8192 bytes of data is to be accessed. Valid data will be available to the eight data output driv­ers within t
ACC
(Access Time) after the last address in­put signal is stable, providing that CE and OE access times are also satisfied. If CE and OE access times are not satisfied, then data access must be measured from the later occurring signal and the limiting parameter is either t
CO
for CE or tOE for OE rather than address ac-
cess.
WRITE MODE
The DS1225Y executes a write cycle whenever the WE and CE signals are active (low) after address inputs are stable. The latter occurring falling edge of CE or WE will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of CE
or WE. All address inputs must be kept valid throughout the write cycle. WE must return to the high state for a minimum
recovery time (t
WR
) before another cycle can be initi-
ated. The OE
control signal should be kept inactive (high) during write cycles to avoid bus contention. How­ever, if the output drivers are enabled (CE and OE ac­tive) then WE will disable the outputs in t
ODW
from its
falling edge.
DATA RETENTION MODE
The DS1225Y provides full functional capability for V
CC
CC
without any additional support circuitry. The DS1225Y constantly monitors VCC. Should the supply voltage decay, the NV SRAM automatically write protects itself, all inputs be­come “don’t care,” and all outputs become high imped­ance. As VCC falls below approximately 3.0 volts, a power switching circuit connects the lithium energy source to RAM to retain data. During power–up, when V
CC
rises above approximately 3.0 volts, the power switching circuit connects external VCC to RAM and dis­connects the lithium energy source. Normal RAM oper­ation can resume after V
CC
exceeds 4.5 volts.
DS1225Y
021998 3/8
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground –0.3V to +7.0V Operating Temperature 0°C to 70°C; –40°C to +85°C for IND parts Storage Temperature –40°C to +70°C; –40°C to +85°C for IND parts Soldering T emperature 260°C for 10 seconds
* This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (tA: See Note 10)
PARAMETER SYM MIN TYP MAX UNITS NOTES
Power Supply Voltage V
CC
4.5 5.0 5.5 V
Input Logic 1 V
IH
2.2 V
CC
V
Input Logic 0 V
IL
0.0 +0.8 V
DC ELECTRICAL CHARACTERISTICS (tA: See Note 10; VCC = 5V ± 10%)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Input Leakage Current I
IL
–1.0 +1.0 µA
I/O Leakage Current CE
> VIH < V
CC
I
IO
–1.0 +1.0 µA
Output Current @ 2.4V I
OH
–1.0 mA
Output Current @ 0.4V I
OL
2.0 mA
Standby Current CE = 2.2V I
CCS1
5 10 mA
Standby Current CE = VCC–0.5V I
CCS2
3 5 mA
Operating Current t
CYC
=200 ns
(Commercial)
I
CCO1
75 mA
Operating Current t
CYC
=200 ns
(Industrial)
I
CCO1
85 mA
Write Protection Voltage V
TP
4.25 V 10
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