Aerial input
Channel coverageOff-air channels, S-cable channels and hyperband
Tuning System
Visual screen size
Channel indicationOn Screen Display
Program Selection
Aux. terminal
Model
AL-SECAM B/G D/K,PAL I/I,SECAM L/L
P
NICAM B/G,I,D/K,L, FM2Carrier B/G, D/K
ower
10page memory FASTEXT(FLOF or top)
Frequency synthesiser tuning system
EURO-SCART1: Audio/Video In and Out,
R/G/B In, slow and fast switching.
EURO-SCART2:Audio/Video In and Out, S-VHS In.
Audio-Video Jack on front of cabinet in common
connection with EURO-SCART2.
Headphone jack(3.5mm)on front of cabinet
DWP-28W2ZZF/DWP-28W2ZLF
70W appro
6W
X
2(at60% mod, 10%THD)
12W 8 ohm X 2
75ohm unbalanced
66cm(wide screen)
100programmes
x.
Remote Control Unit
R-40A13
D AEW OO ELECTR ONICS CO., LTD
http : //svc.dwe .co.kr
Dec. 2000
Page 2
TABLE OF CONTENTS
MAIN FEATURES................................................................................................................................ 2
TV SET ALIGNMENT....................................................................................................................................... 11
POWER SUPPLY............................................................................................................................................ 33
TV START-UP, TV NORMAL RUN AND STAND-BY MODE OPERATIONS.................................................. 37
1
Page 3
Service manual WP-795
1 - Main features
1-1 Specifications
TV standard
Sound system
PAL - SECAM B/G D/K, PAL I/I, SECAM L/L’
NICAM B/G, I, D/K, L,
FM 2Carrier B/G, D/K
Power consumption
Sound Output Power
Speaker
Teletext system
Aerial input
Channel coverage
Tuning system
Visual screen size
Channel indication
Program Selection
Aux. terminal
70 W approx.
6Wx 2 (at 60% mod, 10%THD)
12W 8 ohm x2
10 pages memory FASTEXT (FLOF or TOP)
75 ohm unbalanced
Off-air channels, S-cable channels and hyperband
Frequency synthesiser tuning system
66cm (Wide Screen)
On Screen Display
100 programmes
EURO-SCART 1 : Audio / Video In and Out, R/G/B In, Slow and
Fast switching.
EURO-SCART 2 : Audio / Video In and Out, S-VHS In.
Audio-Video Jack on front of cabinet in common connection with
EURO-SCART 2.
Headphone jack (3.5 mm) on front of cabinet
Remote Control Unit
R-40A13
21 Pin EURO-SCART 1 :
Pin Signal Description Matching value
1 Audio Output Right
2 Audio Input Right
3 Audio Output Left
0.5 Vrms, Impedance < 1 kΩ, ( RF 54% Mod )
0.5 Vrms, Impedance > 10 kΩ
0.5 Vrms, Impedance < 1 kΩ, ( RF 54% Mod )
4 Audio Earth
5 Blue Earth
6 Audio Input Left
7 Blue Input
0.5 Vrms, Impedance > 10 kΩ
0.7 Vpp ±0.1V, Impedance 75Ω
8 Slow Switching TV : 0 to 2V, AV 16/9 : 4.5 to 7V, AV Auto : 9.5 to 12V ,
Impedance > 10 kΩ
9 Green Earth
10 N.C.
11 Green Input
0.7 Vpp ± 0.1V, Impedance 75Ω
12 N.C.
13 Red Earth
14 Blanking Earth
15 Red Input
16 Fast Switching
0.7 Vpp ± 0.1V, Impedance 75Ω
0 to 0.4V : Logic “0”, 1 to 3V : Logic “1”, Impedance 75Ω
17 Video Out Earth
18 Video In Earth
19 Video Output
1 Vpp ± 3dB, Impedance 75Ω
- 2 -
Page 4
Service manual WP-795
20 Video Input
1 Vpp ± 3dB, Impedance 75Ω
21 Common Earth
21 Pin EURO-SCART 2 :
Pin Signal Description Matching value
1 Audio Output Right
2 Audio Input Right
3 Audio Output Left
0.5 Vrms, Impedance < 1 kΩ, ( RF 54% Mod )
0.5 Vrms, Impedance > 10 kΩ
0.5 Vrms, Impedance < 1 kΩ, ( RF 54% Mod )
4 Audio Earth
5 Earth
6 Audio Input Left
The TV set sweeps all the TV bands from beginning of VHF to end of UHF. The TV controlling software
for each program checks if a VPS CNI code is transmitted. If no VPS CNI code is found, the system check
if a CNI code is transmitted in the teletext lines ( Packet 8/30 format 1 ). If such a code ( VPS or teletext )
is found and if this code is in the ATSS list, the program is automatically named.
The programs found are then sorted in 4 groups :
Group I
software. Within this group the sorting order is fixed by the ATSS list.
Group II
Group III
Group IV
same level the one with the lowest frequency) is listed in group I, II or III. The others are listed in group
IV.
Note : If two programs with the same name but a different code are found these two programs are listed in
group I, II or III ( e.g. Regional program SW3 in Germany ).
The sorting order within group II, III, and IV is based on the channel frequency. The program with the
lowest frequency is allocated the first rank in its group, and so forth until the last program of the group
which has the highest frequency.
Program
number
: It contains all the programs from the selected country and named by the TV contro lling
: It contains all the programs with a strong signal strength which are not listed in group I.
: It contains all the programs with a weak signal strength which are not listed in group I.
: If two or more programs with the same code are found, only the strongest ( or if they have the
Group Skip
Program
Group Skip
number
1
2 Group I
...
n
n+1
... Group II
m
m+1
... Group III
p
p+1
... Group IV
q
q+1
... not used
➼
99
0
1
... Group II
m
m+1
... Group III
p
p+1
... Group IV
q
q+1
... not used
99
0
Special case :
Country selection = Others
➼
- 7 -
Page 9
Service manual WP-795
Special case :
France
If France is selected the TV controlling software sweeps the whole TV bands firstly with France system
selected ( positive video modulation) and secondly with Europe system selected ( negative video
modulation).
Special case :
Switzerland
If Switzerland is selected the TV controlling software sweeps the whole TV bands firstly with Europe
system selected (negative video modulation) and secondly with France system selected ( positive video
modulation).
Special case : GB
Note for satellite receiver users : Before starting ATSS turn On your satellite receiver and tune “ SKY
NEWS “.
If GB is selected the TV controlling software seeks for programs only in UHF ( C21 to C70 ). The sorting
order is :
1 - BBC1
2 - BBC2
3 - ITV
4 - CH4
5 - CH5
6 - NEWS
If two or more “ identical “programs ( same name but different code e.g. BBC1 and BBC1 Scotland ) are
found the following programs in the list will be shifted up. ( 1 - BBC1, 2 - BBC1, 3 - BBC2, 4 - ITV, 5 CH4, 6 - CH5, 7 - NEWS, ..)
If one of the program above is not found, the associated program number remains empty ( freq.=467.25
Mhz - Skip selected - no name - system=GB).
example A : 1 - BBC1, 2 - BBC2, 3 - ITV, 4 - -----, 5 - CH5, 6 - NEWS, ...
example B ( if 2 BBC1 found ) : 1 - BBC1, 2 - BBC1, 3 - BBC2, 4 - ITV, 5 - -----, 6 - CH5, 7 - NEWS, ...
- 8 -
Page 10
Service manual WP-795
2 - Safety instruction
WARNING:
equipment.
X-RAY RADIATION PRECAUTION
1. Excessive high voltage can produce potentially hazardous X-RAY RADIATION. To avoid such
hazards, the high voltage must not exceed the specified limit. The nominal value of the high voltage of
this receiver is 26 KV at max beam current. The high voltage must not, und er any circumstances, exceed
30KV. Each time a receiver requires servicing, the high v oltage should be checked. It is important to use
an accurate and reliable high voltage meter.
2. The only source of X-RAY Radiation in this TV receiver is the picture tube. For continued X-RAY
RADIATION protection, the replacement tube must be exactly the same type tube as specified in the parts
list.
SAFETY PRECAUTION
1. Potentials of high voltage are present when this receiver is operating. Operation of the receiver
outside the cabinet or with the back board removed involves a shock hazard from the receiver.
1) Servicing should not be attempted by anyone who is not thoroughly familiar with the
2) Discharge the high potential of the picture tube before handling the tube. The picture tube is
2. If any Fuse in this TV receiver is blown, replace it with the FUSE specified in the Replacement Parts
List.
3. When replacing a high wattage resistor (oxide metal film resistor) in circuit board, keep the resistor
10 mm away from circuit board.
4. Keep wires away from high voltage or high temperature components.
5. This receiver must operate under AC 230 volts, 5O Hz. NEVER connect to DC supply or any other
power or frequency.
PRODUCT SAFETY NOTICE
Many electrical and mechanical parts in this equipment have special safety-related characteristics. These
characteristics are often passed unnoticed by a visual inspection and the X-RAY RADIATION protection
afforded by them cannot necessarily be obtained by using replacement components rated for higher
voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in
this manual and its supplements, electrical components having such features are identified by designated
symbol on the parts list. Before replacing any of these components, read the parts list in this manual
carefully. The use of substitutes replacement parts which do not have the same safety characteristics as
specified in the parts list may create X-RAY Radiation.
Only competent service personnel may carry out work involving the testing or repair of this
precautions necessary when working on high voltage equipment.
highly evacuated and if broken, glass fragments will be violently expelled.
- 9 -
Page 11
Service manual WP-795
3 - Circuit Block diagram
- 10 -
Page 12
Service manual WP-795
4 - Alignment instructions
4-1 Microcontroller configuration : Service mode
To switch the TV set into service mode please sees instruction below.
1 - Select pr. number 91
2 - Adjust sharpness to minimum and exit all menu.
3 - Quickly press the key sequence :
To exit SERVICE menu press
In Service Mode press “OK” to stop the microcontroller i.e. the I2C bus is free and the set can be
controlled by external equipment. Press “OK” again to allow the microcontroller to control the set again
C412CEXF2C339V C ELECTRO160V RSS 3.3MF (8X16) TP
C414CMXM2A104J C MYLAR100V 0.1MF J (TP)
C418CCXB1H102K C CERA50V B 1000PF K (TAPPING)
C420CCXB2H222K C CERA500V B 2200PF K (TAPPING)
C500CEXF1H478V C ELECTRO50V RSS 0.47MF (5X11) TP
C501CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C509CEXF1E470V C ELECTRO25V RSS 47MF (5X11) TP
C514CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C517CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C519CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C524CMXL1J104JC MYLAR63V MEU 0.1MF J
C525CCXB1H102K C CERA50V B 1000PF K (TAPPING)
C526CMXL1J104JC MYLAR63V MEU 0.1MF J
C527CMXB2A473J C MYLAR100V EU 0.047MF J (TP)
C528CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C530CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C531CCXF1H473Z C CERA50V F 0.047MF Z (TAPPING)
C532CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C537CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C540CEXF1H220V C ELECTRO50V RSS 22MF (5X11) TP
C541CEXF1H220V C ELECTRO50V RSS 22MF (5X11) TP
C542CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C543CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C550CEXF1H229V C ELECTRO50V RSS 2.2MF (5X11) TP
C555CEXF1C470V C ELECTRO16V RSS 47MF (5X11) TP
C560CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C561CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C564CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C565CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C585CCXB1H222K C CERA50V B 2200PF K (TAPPING)
C590CXCH1H270J C CERA50V CH 27PF J (TAPPING)
C591CXCH1H270J C CERA50V CH 27PF J (TAPPING)
C592CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C593CEXF1E101V C ELECTRO25V RSS 100MF (6.3X11) TP
C601CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C602CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C603CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C605CEXF1E470V C ELECTRO25V RSS 47MF (5X11) TP
C608CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C610CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C611CEXF1H339V C ELECTRO50V RSS 3.3MF (5X11) TP
C612CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C613CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C614CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C615CEXF1H109V C ELECTRO50V RSS 1MF (5X11) TP
C616CEXF1H100V C ELECTRO50V RSS 10MF (5X11) TP
C617CBXF1H104Z C CERA SEMI50V F 0.1MF Z (TAPPING)
C620CXCH1H509D C CERA50V CH 5PF D (TAPPING)
C621CXCH1H509D C CERA50V CH 5PF D (TAPPING)
LOCPART CODEPART NAMEPART DESCRIPTIONREMARK
C622CCXF1H223ZC CERA50V F 0.022MF Z (TAPPING)
C625CEXF1H479VC ELECTRO50V RSS 4.7MF (5X11) TP
C626CEXF1H479VC ELECTRO50V RSS 4.7MF (5X11) TP
C629CBXF1H104ZC CERA SEMI50V F 0.1MF Z (TAPPING)
C630CEXF1E470VC ELECTRO25V RSS 47MF (5X11) TP
C631CBXF1H104ZC CERA SEMI50V F 0.1MF Z (TAPPING)
C632CEXF1H479VC ELECTRO50V RSS 4.7MF (5X11) TP
C633CEXF1H479VC ELECTRO50V RSS 4.7MF (5X11) TP
C635CBXF1H104ZC CERA SEMI50V F 0.1MF Z (TAPPING)
C636CEXF1H220VC ELECTRO50V RSS 22MF (5X11) TP
C650CXCH1H470JC CERA50V CH 47PF J (TAPPING)
C660CEXF1H100VC ELECTRO50V RSS 10MF (5X11) TP
C665CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C666CBXF1H104ZC CERA SEMI50V F 0.1MF Z (TAPPING)
C667CCXB1H472K C CERA50V B 4700PF K (TAPPING)
C690CEXF1H479VC ELECTRO50V RSS 4.7MF (5X11) TP
C691CEXF1H479VC ELECTRO50V RSS 4.7MF (5X11) TP
C692CEXF1E470VC ELECTRO25V RSS 47MF (5X11) TP
C698CXCH1H470JC CERA50V CH 47PF J (TAPPING)
C699CXCH1H470JC CERA50V CH 47PF J (TAPPING)
C770CEXF1E101VC ELECTRO25V RSS 100MF (6.3X11) TP
C803CCXF3A472ZC CERA1KV F 4700PF Z (T)
C804CCXF3A472ZC CERA1KV F 4700PF Z (T)
C806CEXF1H330VC ELECTRO50V RSS 33MF (6.3X11) TP
C807CBXF1H104ZC CERA SEMI50V F 0.1MF Z (TAPPING)
C808CEXF1H479VC ELECTRO50V RSS 4.7MF (5X11) TP
C820CCXB3A471KC CERA1KV B 470PF K (T)
C821CCXB1H102K C CERA50V B 1000PF K (TAPPING)
C824CCXB3A471KC CERA1KV B 470PF K (T)
C831CCXB3A471KC CERA1KV B 470PF K (T)
C835CEXF1H470VC ELECTRO50V RSS 47MF (6.3X11) TP
C844CEXF1E101VC ELECTRO25V RSS 100MF (6.3X11) TP
C863CEXF1E101VC ELECTRO25V RSS 100MF (6.3X11) TP
C866CCXB3A471KC CERA1KV B 470PF K (T)
C888CEXF1C470VC ELECTRO16V RSS 47MF (5X11) TP
C950CEXF1H220VC ELECTRO50V RSS 22MF (5X11) TP
C968CMXL2E104KC MYLAR250V MEU 0.1MF K
CA10CCXB1H102K C CERA50V B 1000PF K (TAPPING)
F801A 4857415001CLIP FUSEPFC5000-0702
F801B 4857415001CLIP FUSEPFC5000-0702
I8051UPC574J--ICUPC574J
Q101TKTC3198Y-TRKTC3198Y
Q103TKTC3202Y-TRKTC3202Y (TP)
Q402T2SD1207T-TR2SD1207-T (TAPPING)2
Q403TKTC3198Y-TRKTC3198Y
Q501TKTA1266Y-TRKTA1266Y (TP)
Q502TKTC3198Y-TRKTC3198Y
Q503TKTC3198Y-TRKTC3198Y
Q504TKTC3198Y-TRKTC3198Y
- 20 -
Page 22
ELECTRICAL PARTS LIST
LOCPART CODEPART NAMEPART DESCRIPTIONREMARK
Q505TKTC3198Y-TRKTC3198Y
Q508TKTC3198Y-TRKTC3198Y
Q510TKTA1266Y-TRKTA1266Y (TP)
Q511TKTA1266Y-TRKTA1266Y (TP)
Q512TKTC3198Y-TRKTC3198Y
Q602TKTA1266Y-TRKTA1266Y (TP)
Q701TKTA1266Y-TRKTA1266Y (TP)
Q702TKTC3198Y-TRKTC3198Y
Q807TKTC3198Y-TRKTC3198Y
Q808TKTC3198Y-TRKTC3198Y
Q809TKTC3198Y-TRKTC3198Y
Q810TKTC3198Y-TRKTC3198Y
Q811TKTC3198Y-TRKTC3198Y
Q950TKTC3198Y-TRKTC3198Y
R401RN01B272JSR METAL FILM1W 2.7K OHM J SMALL
R415RN02B102JSR METAL FILM2W 1K OHM J SMALL
R450RN02B223JSR METAL FILM2W 22K OHM J SMALL
R816RN02B478JSR METAL FILM2W 0.47 OHM J SMALL
Z6015PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6025PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6055PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6065PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6075PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6085PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6095PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6105PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6115PXF1B471MFILTER EMICFI 06 B 1H 470PF
Z6125PXF1B471MFILTER EMICFI 06 B 1H 470PF
ZZ200 PTMPJAD395 PCB MAIN AXIAL ASDWP-28W2ZZF
102TM14006LBTAPE MASKING3M #232 6.0X2000M
202TM10006LBTAPE MASKING3M #232-MAP-C 6.2X2000M
A0014859804793PCB MAIN330X246 S1B
C103CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C104CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C108CCZB1H101K C CERA50V B 100PF K (AXIAL)
C110CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C513CBZF1H104ZC CERA SEMI50V F 0.1MF Z
C515CBZR1C222M C CERA16V Y5R 2200PF M (AXIAL)
C516CBZR1C472M C CERA16V Y5R 4700PF M (AXIAL)
C518CBZF1H104ZC CERA SEMI50V F 0.1MF Z
C520CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C521CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C523CBZF1H104ZC CERA SEMI50V F 0.1MF Z
C529CBZF1H104ZC CERA SEMI50V F 0.1MF Z
C533CCZB1H102K C CERA50V B 1000PF K (AXIAL)
C534CCZF1H223Z C CERA50V F 0.022MF Z
C535CCZF1H223Z C CERA50V F 0.022MF Z
C536CCZF1H223Z C CERA50V F 0.022MF Z
C577CCZB1H561K C CERA50V B 560PF K
LOCPART CODEPART NAMEPART DESCRIPTIONREMARK
C587CCZB1H101KC CERA50V B 100PF K (AXIAL)
C588CCZB1H101KC CERA50V B 100PF K (AXIAL)
C589CCZB1H101KC CERA50V B 100PF K (AXIAL)
C771CBZF1H104ZC CERA SEMI50V F 0.1MF Z
C809CCZB1H102KC CERA50V B 1000PF K (AXIAL)
C830CBZF1H104ZC CERA SEMI50V F 0.1MF Z
C850CCZB1H152KC CERA50V B 1500PF K (AXIAL)
CA01CCZB1H101K C CERA50V B 100PF K (AXIAL)
CA02CCZB1H101K C CERA50V B 100PF K (AXIAL)
CA03CCZB1H101K C CERA50V B 100PF K (AXIAL)
D101D1N4148---DIODE1N4148 (TAPPING)
D102D1SS85TA--DIODE1SS85TA
D313D1N4937G--DIODE1N4937G (TAPPING)
D360DUZ22BM---DIODE ZENERUZ-22BM
D361DUZ33B----DIODE ZENERUZ-33B
D367DUZ33B----DIODE ZENERUZ-33B
D381DUZ33B----DIODE ZENERUZ-33B
D405D1N4937G--DIODE1N4937G (TAPPING)
D406D1N4148---DIODE1N4148 (TAPPING)
D407D1N4937G--DIODE1N4937G (TAPPING)
D408D1N4937G--DIODE1N4937G (TAPPING)
D410D1N4004S--DIODE1N4004S
D411D1N4004S--DIODE1N4004S
D414D1N4004S--DIODE1N4004S
D450D1N4937G--DIODE1N4937G (TAPPING)
D502DUZ3R9B---DIODE ZENERUZ-3.9B
D505DUZ7R5BM--DIODE ZENERUZ-7.5BM
D520D1N4148---DIODE1N4148 (TAPPING)
D521D1N4148---DIODE1N4148 (TAPPING)
D591DUZ2R4B---DIODE ZENERUZ-2.4B
D601D1N4148---DIODE1N4148 (TAPPING)
D602D1N4148---DIODE1N4148 (TAPPING)
D701D1N4148---DIODE1N4148 (TAPPING)
D710DUZ5R1B---DIODE ZENERUZ-5.1B
D801DLT2A05G--DIODELT2A05G (TP)
D802DLT2A05G--DIODELT2A05G (TP)
D803DLT2A05G--DIODELT2A05G (TP)
D804DLT2A05G--DIODELT2A05G (TP)
D805D1N4937G--DIODE1N4937G (TAPPING)
D806D1N4937G--DIODE1N4937G (TAPPING)
D808D1N4937G--DIODE1N4937G (TAPPING)
D809D1N4937G--DIODE1N4937G (TAPPING)
D810D1N4937G--DIODE1N4937G (TAPPING)
D811DUZ5R6BM--DIODE ZENERUZ-5.6BM
D821D1N4937G--DIODE1N4937G (TAPPING)
D822DUZ9R1BM--DIODE ZENERUZ-9.1BM
D824D1N4148---DIODE1N4148 (TAPPING)
D825D1N4148---DIODE1N4148 (TAPPING)
D830D1N4937G--DIODE1N4937G (TAPPING)
- 21 -
Page 23
ELECTRICAL PARTS LIST
LOCPART CODEPART NAMEPART DESCRIPTIONREMARK
D831D1N4937G--DIODE1N4937G (TAPPING)
D840D1N4148---DIODE1N4148 (TAPPING)
D841D1N4148---DIODE1N4148 (TAPPING)
D904D1N4937G--DIODE1N4937G (TAPPING)
D905D1N4937G--DIODE1N4937G (TAPPING)
D906D1N4937G--DIODE1N4937G (TAPPING)
D951D1N4148---DIODE1N4148 (TAPPING)
D952D1N4148---DIODE1N4148 (TAPPING)
D953D1N4148---DIODE1N4148 (TAPPING)
D954D1N4148---DIODE1N4148 (TAPPING)
D955DLT2A05G--DIODELT2A05G (TP)
DA01D1N4148---DIODE1N4148 (TAPPING)
DA02DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA03DUZ5R1B---DIODE ZENERUZ-5.1B
DA04DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA06DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA08DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA09DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA10DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA11DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA13CBZR1C222M C CERA16V Y5R 2200PF M (AXIAL)
DA14CBZR1C222M C CERA16V Y5R 2200PF M (AXIAL)
DA15DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA16DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA20DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA23CBZR1C222M C CERA16V Y5R 2200PF M (AXIAL)
DA24CBZR1C222M C CERA16V Y5R 2200PF M (AXIAL)
DA27DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA28DUZ5R6BM--DIODE ZENERUZ-5.6BM
DA29DUZ5R6BM--DIODE ZENERUZ-5.6BM
J00185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00785801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J00985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01785801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J01985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
LOCPART CODEPART NAMEPART DESCRIPTIONREMARK
J02085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J02985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03785801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J03985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04785801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J04985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05785801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J05985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06785801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J06985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
- 22 -
Page 24
ELECTRICAL PARTS LIST
LOCPART CODEPART NAMEPART DESCRIPTIONREMARK
J07385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07585801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07785801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J07985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J08085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J08185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J08285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J08385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J08485801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J09085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J09885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J09985801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J10085801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J10185801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J10285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J10385801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J81685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J82685801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
J88885801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
JLL285801065GYWIRE COPPERAWG22 1/0.65 TIN COATING
L1015CPZ100K02COIL PEAKING10UH K (AXIAL 3.5MM)
L3505CPZ109M04COIL PEAKING1UH 10.5MM M (LAL04TB)
L3815CPZ109M04COIL PEAKING1UH 10.5MM M (LAL04TB)
L5005CPZ120K02COIL PEAKING12UH K (AXIAL 3.5MM)
L5015CPZ100K02COIL PEAKING10UH K (AXIAL 3.5MM)
L5025CPZ100K02COIL PEAKING10UH K (AXIAL 3.5MM)
L5105CPZ100K02COIL PEAKING10UH K (AXIAL 3.5MM)
L5115CPZ100K02COIL PEAKING10UH K (AXIAL 3.5MM)
L5125CPZ100K02COIL PEAKING10UH K (AXIAL 3.5MM)
L6015CPZ479K02COIL PEAKING4.7UH K (AXIAL 3.5MM)
L6025CPZ479K02COIL PEAKING4.7UH K (AXIAL 3.5MM)
L6035CPZ479K02COIL PEAKING4.7UH K (AXIAL 3.5MM)
L6505MC0000100COIL BEADHC-3550
L8015MC0000100COIL BEADHC-3550
L8035MC0000100COIL BEADHC-3550
R101RD-AZ473J-R CARBON FILM1/6 47K OHM J
R102RD-AZ472J-R CARBON FILM1/6 4.7K OHM J
R103RD-AZ123J-R CARBON FILM1/6 12K OHM J
R104RD-AZ104J-R CARBON FILM1/6 100K OHM J
R105RD-AZ392J-R CARBON FILM1/6 3.9K OHM J
R106RD-AZ101J-R CARBON FILM1/6 100 OHM J
R107RD-AZ101J-R CARBON FILM1/6 100 OHM J
R113RD-AZ562J-R CARBON FILM1/6 5.6K OHM J
R114RD-AZ562J-R CARBON FILM1/6 5.6K OHM J
R115RD-AZ682J-R CARBON FILM1/6 6.8K OHM J
R116RD-AZ222J-R CARBON FILM1/6 2.2K OHM J
686, AHYEON-DONG MAPO-GU
SEOUL, KOREA
C.P.O. BOX 8003 SEOUL, KOREA
TELEX : DWELEC K28177-8
CABLE : "DAEWOOELEC"
E-mail :djkoo@web.dwe.co.kr
TEL : 82-2-360-7806
FAX : 82-2-360-7877
Page 28
Appendix Service manual WP-795
1 - IC description
1-1 TDA936x TV signal processor - Teletext decoder with embedded µ-Controller.
TV-signal Processor
z Multi-standard vision IF circuit with alignment-free PLL demodulator
z Internal (switchable) time-constant for the IF-AGC circuit
z Source selection between 'Internal' CVBS and external CVBS or Y/C signals
z Integrated chrominance trap circuit
z Integrated luminance delay line with adjustable delay time
z Asymmetrical ‘delay line type’ peaking in the luminance channel
z Black stretching for non-standard luminance signals
z lntegrated chroma band-pass filter with switchable centre frequency
z Only one reference (12 MHz) crystal required for the µ-Controller, Teletext and the colour decoder
z PAL / NTSC or multistandard colour decoder with automatic search system
z Internal base-band delay line
z RGB control circuit with 'Continuous Cathode Calibration', white point and black level off set
adjustment so that the colour temperature of the dark and the bright parts of the screen can be chosen
independently.
z Linear RGB or YUV input with fast blanking for external RGB/YUV sources. The Text/OSD signals
are internally supplied from the µ-Controller/Teletext decoder
z Contrast reduction possibility during mixed-mode of OSD and Text signals
z Horizontal synchronisation with two control loops and alignment-free horizontal oscillator
z Vertical count-down circuit
z Vertical driver optimised for DC-coupled vertical output stages
z Horizontal and vertical geometry processing
z Horizontal and vertical zoom function for 16 : 9 applications
z Horizontal parallelogram and bow correction for large screen picture tubes
µ
-Controller
z 80C51 µ-controller core standard instruction set and timing
z 1µs machine cycle
z 32 - 128Kx8-bit late programmed ROM
z 3 - 12Kx8-bit Auxiliary RAM (shared with Display and Acquisition)
z Interrupt controller for individual enable/disable with two level priority
z Two 16-bit Timer/Counter registers
z Watchdog timer
z Auxiliary RAM page pointer
z 16-bit Data pointer
z IDLE and Power Down (PD) mode
z 14 bits PWM for Voltage Synthesis Tuning
z 8-bit A/D converter
z 4 pins which can be programmed as general I/0 pin, ADC input or PWM (6-bit) output
- 1 -
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Appendix Service manual WP-795
Data Capture
z
Text memory 10 pages
z
Inventory of transmitted Teletext pages stored in the Transmitted Page Table (TPT) and Subtitle Page
Table (SPT)
z
Data Capture for US Closed Caption
z
Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling (WSS) bit
decoding Automatic selection between 525 WST/625 WST
z
Automatic selection between 625 WST/VPS on line 16 of VBI
z
Real-time capture and decoding for WST Teletext in Hardware, to enable optimised µ-processor
throughput
z
Automatic detection of FASTEXT transmission
Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
z
z
Signal quality detector for video and WST/VPS data types
z
Comprehensive teletext language coverage
z
Full Field and Vertical Blanking lnterval (VBI) data capture of WST data
Display
z
Teletext and Enhanced OSD modes
z
Features of lever 1.5 WST and US Close Caption
z
Serial and Parallel Display Attributes
z
Single/Double/Quadruple Width and Height for characters
z
Scrolling of display region
z
Variable flash rate controlled by software
z
Enhanced display features including overlining, underlining and italics
z
Soft colours using CLUT with 4096 colour palette
z
Globally selectable scan lines per row (9/10/13/16) and character matrix [12x10, 12xl3, 12x16 (VxH)]
z
Fringing (Shadow) selectable from N-S-E-W direction
z
Fringe colour selectable
z
Meshing of defined area
z
Contrast reduction of defined area
z
Cursor
z
Special Graphics Characters with two planes, allowing four colours per character
4 WST Character sets (GO/G2) in single device (e.g. Latin, Cyrillic, Greek, Arabic)
z
G1 Mosaic graphics, Limited G3 Line drawing characters
z
WST Character sets and Closed Caption Character set in single device
Data Capture
The Data Capture section takes in the analogue Composite Vidéo and Blanking Signal (CVBS), and from
this extracts the required data, which is then decoded and stored in memory.
The extraction of the data is performed in the digital domain. The first stage is to convert the analogue
CVBS signal into a digital form. This is done using an ADC sampling at 12MHz. The data and clock
recovery is then performed by a Multi-Rate Video Input Processor (MuIVIP). From the recovered data
and clock the following data types are extracted WST Teletext (625/525), Closed Caption, VPS, WSS.
The extracted data is stored in either memory (DRAM) via the Memory Interface or in SFR locations.
- 2 -
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Appendix Service manual WP-795
Data Capture Features
- Video Signal Quality detector
- Data Capture for 625 line WST
- Data Capture for 525 line WST
- Data Capture for US Closed Caption
- Data Capture for VPS data (PDC system A)
- Data Capture for Wide Screen Signalling (WSS) bit decoding
- Automatic selection between 525 WST/625WST
- Automatic selection between 625WST/VPS on line 16 of VBI
- Real-time capture and decoding for WST Teletext in Hardware, to enable optimised microprocessor
throughput
- 10 pages stored On-Chip
- lnventory of transmitted Teletext pages stored in the Transmitted Page Table (TPT) and Sub title Page
Table (SPT)
- Automatic detection of FASTEXT transmission
- Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
- Signal quality detector for WST/VPS data types
- Comprehensive Teletext language coverage
- Full Field and Vertical Blanking Interval (VBI) data capture of WST data
- 3 -
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Appendix Service manual WP-795
- 4 -
Page 32
Appendix Service manual WP-795
TV processor version and µ-Controller capacity
IC version TDA9365 Nx / 5
TV range 110°
QSS sound IF amplifier with
separated input and AGC circuit
PAL decoder
SECAM decoder
NTSC decoder
Horizontal geometry (E-W)
Horizontal and vertical zoom
n.u. 1 Port 1.3 Not used.
SCL 2 I2C bus clock line
SDA 3 I2C Data line
SECAM L’ out 4 Port 2.0 : High when L’ selected (Push Pull )
OCP 5 Por t 3. 0 : Over Cu rrent Protection
- 5 -
Page 33
Appendix Service manual WP-795
RF AGC in 6 ADC 1 : For factory use only ( High impedance )
Key-in 7 ADC 2 : local key input ( High impedance )
S/SW 8 ADC 3 : Scart Slow switching input ( See XXX)
VssC/P 9
LED 1 10 port 0.5 ( 8mA current sinking capability )
PANO 11 port 0.6 ( 8mA current sinking capability )
VSSA 12 analog ground of teletext decoder and digital ground of TV
SEC PLL 13 SECAM PLL decoupling
VP2 14 2nd supply voltage TV-pr ocessor
DECDIG 15 decoupling digital supply of TV-processor
PH2LF 16 phase-2 filter
PH1LF 17 phase-1 filter
GND3 18 ground 3 for TV-processor
DECBG 19 bandgap decoupling
AVL/EWD 20 East / West drive output
VDRB 21 vertical drive B output
VDRA 22 vertical drive A output
IFIN1 23 IF input 1
IFIN2 24 IF input 2
IREF 25 reference current input
VSC 26 vertical sawtooth capacitor
TUNERAGC 27 tuner AGC output
SIFIN1 28 SIF input 1
SIFIN2 29 SIF input 2
GND2 30 ground 2 for TV processor
SIF AGC 31 AGC sound IF
REF0 32 n.u.
HOUT 33 horizontal output
FBISO 34 flyback input / sandcastle output
QSS out 35 QSS intercarrier output
EHT0 36 EHT/Overvoltage protection
PLLIF 37 IF PLL loop filter
IFVO 38 IF video output
VP1 39 main supply voltage TV-processor
CVBSINT 40 internal CVBS input
GND1 41 ground 1 for TV-processor
CVBS/Y 42 external CVBS/Y input
CHROMA 43 chrominance input (SVHS)
AMOUT 44 n.u.
INSSW2 45 2nd RGB insertion input
R2IN 46 2nd R input
G2IN 47 2nd G input
B2IN 48 2nd B input
BCLIN 49 beam current limiter input
BLKIN 50 black current input
R0 51 RED Output
G0 52 GREEN Output
digital ground for µ-controller core and peripheral
processor
- 6 -
Page 34
Appendix Service manual WP-795
B0 53 BLUE Output
VDDA 54 analog supply of Teletext decoder and digital supply of TV-
Processor (3.3V)
VPE 55 OTP programming supply
VDDC 56 digital supply to core (3.3V)
OSCGND 57 oscillator ground supply
XTALIN 58 crystal oscillator input
XTALOUT 59 crystal oscillator output
RESET 60 reset
VDDP 61 digital supply to periphery (3.3V)
Audio Mute 62 Port 1.0 : Audio mute output (Push Pull )
Power 63 Port 1.1 : Power output (Push Pull )
IR in 64 Interrupt input 0 : R/C Infrared input
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Appendix Service manual WP-795
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Appendix Service manual WP-795
1-2 MSP3415D Multistandard Sound Processor
The MSP 3415D is designed as a single-chip Multistandard Sound Processor for applications in analogue
and digital TV sets, video recorders, and PC cards.
MSP 3415D features
- sound IF input
- No external filters required
- Stereo baseband input via integrated AD converters
- Two pairs of DA converters
- Two carrier FM or NICAM processing
- AVC : Automatic Volume Correction
- Bass, treble, volume processing
- Full SCART in/out matrix without restrictions
- Improved FM-identification
- Demodulator short programming
- Autodetection for terrestrial TV - sound standards
- Precise bit-error rate indication
- Automatic switching from NICAM to FM/AM or vice versa
- Improved NICAM synchronisation algorithm
- Improved carrier mute algorithm
- Improved AM-demodulation
- Reduction of necessary controlling
- Less external components
Basic Features of the MSP 3415D
Demodulator and NICAM Decoder Section
The MSP 3415D is designed to simultaneously perform digital demodulation and decoding of NICAMcoded TV stereo sound, as well as demodulation of FM or AM mono TV sound. Alternatively, two
carrier FM systems according to the German terrestrial specs can be processed with the MSP 34 15D.
The MSP 3415D facilitates profitable multistandard capability, offering the following advantages:
- Automatic Gain Control (AGC) for analogue input: input range: 0.10 - 3 Vpp
- integrated A/D converter for sound-IF input
- all demodulation and filtering is performed on chip and is individually programmable
- easy realisation of all digital NICAM standards (B/G, I, L and D/K)
- FM-demodulation of all terrestrial standards (include identification decoding)
- no external filter hardware is required
- only one crystal clock (18.432 MHz) is necessary
- high deviation FM-mono mode (max. deviation: approx. ±360 kHz)
DSP-Section (Audio Baseband Processing)
-
flexible selection of audio sources to be processed
- performance of terrestrial de-emphasise systems (FM, NICAM)
- digitally performed FM-identification decoding and de-matrixing
- digital baseband processing: volume, bass, treble
- 9 -
Page 37
Appendix Service manual WP-795
- simple controlling of volume, bass, treble
Analogue Section
-
two selectable analogue pairs of audio baseband input (= two SCART inputs) input level: <2 V RMS,
input impedance: >25 kΩ
- one selectable analogue mono input (i.e. AM sound): Not used in this chassis
- two high-quality A/D converters, S/N-Ratio: >85 dB
- 20 Hz to 20 kHz bandwidth for SCART-to-SCART cop y facilities
- loudspeaker: one pair of four-fold oversampled D/A converters
output level per channel: max. 1.4 VRMS output resistance: max. 5 kΩ
S/N-ratio: >85 dB at maximum volume max. noise voltage in mute mode: < 10 µV (BW: 20 Hz... 16 kHz)
- one pair of four-fold oversampled D/A converters supplying a pair of SCART-outputs.
output level per channel: max. 2 V RMS, output resistance: max. 0.5 kΩ,
S/N-Ratio: >85 dB (20 Hz... 16 kHz)
Application Fields of the MSP 3415D
In the following sections, a brief overview about the two main TV sound standards, NICAM 728 and
German FM Stereo, demonstrates the complex requirements of a multistandard audio IC.
NICAM plus FM/AM-Mono
According to the British, Scandinavian, Spanish, and French TV-standards, high-quality stereo sound is
transmitted digitally. The systems allow two high-quality digital sound channels to be added to the
already existing FM/AM-channel. The sound coding follows the format of the so-called Near
Instantaneous Companding System (NICAM 728). Transmission is performed using Differential
Quadrature Phase Shift Keying (DQPSK. Table below offers an overview of the modulation parameters.
In the case of NICAM/FM (AM) mode, there are three different audio channels available: NICAM A,
NICAM B, and FM/AM-mono. NICAM A and B may belong either to a stereo or to a dual language
transmission. Information about operation mode and about the quality of the NICAM signal can be read
by the controlling software via the control bus. In the case of low quality (high bit error rate), the
controlling software may decide to switch to the analogue FM/AM-mono sound. Alternatively, an
automatic NICAM-FM/AM switching may be applied.
German 2-Carrier System (DUAL FM System)
Since September 1981, stereo and dual sound programs have been transmitted in Germany using th e 2carrier system. Sound transmission consists of the already existing first sound car r ier and a second sound
carrier additionally containing an identification signal. More details of this standard are given in Tables
below. For D/K very similar system is used.
- 10 -
Page 38
Appendix Service manual WP-795
TV standards
TV
system
B/G 5.5 / 5.7421875 FM Stereo PAL Germany
B/G 5.5 / 5.85 FM-Mono / NICAM PAL Scandinavia,
L 6.5 / 5.85 AM - Mono / NICAM SECAM-L France
I 6.0 / 6.552 FM-Mono / NICAM PAL UK
D/K 6.5 / 6.2578125 D/K1
Position of sound carrier
(MHz)
6.5 / 6.7421875 D/K2
6.5 / 5.85 D/K-NICAM
Sound modulation Color system Country
Spain
FM Stereo
FM-Mono / NICAM
SECAM-East USSR
Hungary
Architecture of MSP3415D
Pin connections and short description
Pin No. Pin Name Type Short description
1 TP Out Test pin
2 NC Not Connected
3 NC Not Connected
4 TP Out Test pin
5 TP Out Test pin
6 ADR_SEL In I2C bus Address select
7 STANDBYQ In Standby ( Low-active)
8 NC Not Connected
9 I2C_CL In / Out I2C Clock
10 I2C_DA In / Out I2C data
- 11 -
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Appendix Service manual WP-795
11 TP In / Out Test pin
12 TP In / Out Test pin
13 TP Out Test pin
14 NC Not Connected
15 TP Out Test pin
16 TP Out Test pin
17 TP Out Test pin
18 DVSUP Digital power supply +5V
19 DVSS Digital Ground
20 NC Not Connected
21 NC Not Connected
22 NC Not Connected
23 NC Not Connected
24 RESETQ In Power-On-reset
25 NC Not Connected
26 NC Not Connected
27 VREF2 Reference ground 2 high voltage part
28 DACM_R Out Loudspeaker out Right
29 DACM_L Out Loudspeaker out Left
30 NC Not Connected
31 TP Out Test pin
32 NC Not Connected
33 SC2_OUT_R Out Scart Output 2, right
34 SC2_OUT_L Out Scart Output 2, left
35 VREF1 Reference ground 1 high voltage part
36 SC1_OUT_R Out Scart output 1, right
37 SC1_OUT_L Out Scart output 1, left
38 NC Not Connected
39 AHVSUP Analog power supply 8.0V
40 CAPL_M Volume capacitor MAIN
41 AHVSS Analog ground
42 AGNDC Analog reference voltage high voltage part
43 NC Not Connected
44 NC Not Connected
45 NC Not Connected
46 NC Not Connected
47 NC Not Connected
48 ASG2 Analog Shield Ground 2
49 SC2_IN_L In Scart input 2 in, left
50 SC2_IN_R In Scart input 2 in, right
51 ASG1 Analog Shield Ground 1
52 SC1_IN_L In Scart input 1 in, left
53 SC1_IN_R In Scart input 1 in, right
54 VREFTOP Reference voltage IF A/D converter
55 MONO_IN In Mono input
56 AVSS Analog ground
57 AVSUP Analog power supply
58 ANA_IN1+ In IF input 1
- 12 -
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Appendix Service manual WP-795
59 ANA_IN1- In IF common
60 NC Not Connected
61 TESTEN In Test pin
62 XTAL_IN In Crystal oscillator
63 XTAL_OUT Out Crystal oscillator
64 NC Test pin
1-3 TDA894xJ Stereo Audio Amplifier
The TDA 8944J ( TDA 8946J ) is a dual-channel audio power amplifier with an output power of 2 x 7 W
( 2 x 15 W ) at an 8 Ω load and a 12 V supply. The circuit contains two Bridges Tied Load (BTL)
amplifiers with an all-NPN output stage and standby/mute logic. The TDA8944J comes in a 17-pin DIL
power package.
Features
Few external components
Fixed gain
Standby and mute mode
No on/off switching plops
low standby current
High supply voltage ripple rejection
Outputs short-circuit protected to ground, supply and across the load
Thermally protected
The TDA835xJ are power circuit for use in 90° and 110° colour deflection systems for field frequencies
of 25 to 200Hz and 16/9 picture tubes. The circuit provides a DC driven vertical deflection output
circuit, operating as a highly efficient class G system. Due to the full bridge output circuit the deflection
coils can be DC coupled.
The IC is constructed in a Low Voltage DMOS process that combines Bipolar, CMOS and DMOS
devices. MOS transistors are used in the output stage because of the absence of second breakdown.
- Short rise and fall time of the vertical flyback switch
- Guard circuit
- Temperature (thermal) protection
- High EMC because of common mode inputs
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Pinning
Pin Symbol Description
1 Vi(pos) input voltage (positive)
2 Vi(neg) input voltage (negative)
3 Vp supply voltage
4 VOB output voltage B
5 GND ground
6 Vflb flyback supply voltage
7 VOA output voltage A
8 V
9 VM input measuring resistor
guard output voltage
O(guard)
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1-4-1 TDA8358J
An East-West output stage is provided that is able to sink current
from the diode modulator circuit.
- Short rise and fall time of the vertical flyback switch
- Guard circuit
- Temperature (thermal) protection
- High EMC because of common mode inputs
- East-West output stage
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1-5 TDA6107Q
The TDA6107Q includes three video output amplifiers in one plastic DIL-Bent-SIL 9-pin medium
power package, using high voltage DMOS technology, and is intended to drive the three cathodes of a
colour CRT directly. To obtain maximum performance, the amplifier should be used with black-current
control.
Features
- Typical bandwidth of 5.5 MHz for an output signal of 60 Vpp
- High slew rate of 900V/ms
- No external components required
- Very simple application
- Single supply voltage of 200V
- Internal reference voltage of 2.5 V
- Fixed gain of 50.
- Black-current stabilisation (BCS) circuit
- Thermal protection
Pin description
Pin Symbol Description
1 V
2 V
3 V
4 GND ground (fin)
5 Iom black current measurement
6 VDD supply voltage
7 V
8 V
9 V
inverting input 1
i(1)
inverting input 2
i(2)
inverting input 3
i(3)
output
cathode output 3
OC(3)
cathode output 2
OC(2)
cathode output 1
OC(1)
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Block diagram TDA6107Q
1-6 24C
16 16 Kbit EEPROM
features :
16 Kbit serial I2C bus EEPROM
-
- Single supply voltage : 4.5 V to 5.5 V
- 1 Million Erase/Write cycles (minimum)
- 40 year data retention (minimum)
Pin description
Pin No. Name Description
1, 2, 3 E0, E1, E2 Device address
5 SDA Serial Data/Address Input/Output
6 SCL Serial clock
7 WC Write control
8 Vcc Supply voltage
4 Vss Ground
The memory device is compatible with the I2C memory standard. This is a two wire serial interface that
uses a bi-directionnal data bus and serial clock. The memory carries a built-in 4-bit unique device type
identifier code (1010) in accordance with the I2C bus definition.
Serial Clock (SCL)
The SCL input is used to strobe all data in and out of the memory.
Serial Data (SDA)
The SDA pin is bi-directionnal, and is used to transfer data in or out of the memory
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1-7 STR - F6653
1-7-1 General description
The STR-F6653 is an hybrid IC with a build-in MOSFET and control IC, designed for flyback
converter type switch mode power supply applications.
1-7-2 Features
- Small SIP fully isolated molded 5 pins package
- Many protection functions :
1-7-3 Block diagram
* Pulse-by-pulse overcurrent protection (OCP)
* Overvoltage protection with latch mode (OVP)
* Thermal protection with latch mode (TSD)
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1-7 -4 pin description
PIN NAME SYMBOL DESCRIPTION
1 Overcurrently
feedback
O.C. P/E.B. Input of over current detection signal and
feedback signal
2 Source S Mosfet source
3 Drain D Mosfet drain
4 Supply VIN Input of power supply for control circuit
5 Ground GND Ground
1-7 -5 Control part - electrical characteristics
Description
IC pins
Number
Symbol
Min. Type Max.
Rating
Unit
Operation start voltage 4-5 VIN (on) 14.4 16 17.6 V
Operation stop voltage 4-5 VIN (off) 9 10 111 V
Circuit current in operation 4-5 IIN (on) - - 30 mA
Circ. current in non-operation 4-5 IIN (off) - - 100
Maximum off time - T
Minimum time for input of quaxi
1-5 TTH (2) - - 1.0
(max) 45 - 55
OFF
µ
µ
SEC
µ
SEC
A
resonant signals
Minimum off time - T
O.C.P./F.B. terminal threshold
1-5 VTH (1) 0.68 0.73 0. 78 V
(min) - - 1.5
OFF
µ
SEC
voltage 1
O.C.P./F.B. terminal threshold
1-5 VTH (2) 1.3 1.45 1.6 V
voltage 2
O.C.P./F.B. terminal extraction
1-2 I
1.2 1.35 1.5 mA
OCP/FB
current
OVP operation voltage 4-5 VIN (OVP) 20.5 22.5 24.5 V
Latch circuit sustaining voltage 4-5 IIN (H) - - 400
µ
A
Latch circuit release voltage 4-5 VIN (Loff) 6.6 - 8.4 V
Thermal shutdown operating
- TJ (TSD) 140 - -
0
C
temperature
1-7 -6 MOSFET electrical characteristics
Description
Drain-to-source break down
IC pins
Number
3-2 V
Symbol
650 - - V
DSS
Min. Type Max.
Rating
Unit
voltage
Drain leakage current 3-2 I
On-resistance 3-2 RDS (on) - - 1.95
- - 300
DSS
µ
A
Ω
Switching time 3-2 tf - - 250 nsec
Thermal resistance - OCH - F - - 0.95
0
C/W
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2 - Circuit description
2-1 Block diagram
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FUNCTIONAL DESCRIPTION OF VIDEO PROCESSOR Vision IF amplifier
The vision IF amplifier can demodulate signals with positive and negative modulation. The PLL
demodulator is completely alignment-free.
The VCO of the PLL circuit is internal and the frequency is fixed to the required value by using the clock
frequency of the µ-Controller/Teletext decoder as a reference. The setting of the various frequencies is
made by the controlling software in subaddress 27H (38.9 MHz for all system except L’ or 33.9 MHz for
system L’). Because of the internal VCO the IF circuit has a high immunity to EMC interferences.
QSS Sound circuit
The sound IF amplifier is similar to the vision IF amplifier
and has an external AGC decoupling capacitor.
The single reference QSS mixer is realised by a multiplier. In this multiplier the SIF signal is converted to
the intercarrier frequency by mixing it with the regenerated picture carrier from the VCO. The mixer
output signal is supplied to the output via a high-pass filter for attenuation of the residual video sig nals.
With this system a high performance hi-fi stereo sound pr ocessing can be achieved.
Video switches
The video switch has one input for an external CVBS or Y/C signal. The selected CVBS signal can be
supplied to pin 38, the IF video output. The selection between both signals is realised by the controlling
software in subaddress 22H.
The video ident circuit is connected to the selected signal. This ident circuit is independent of the
synchronisation.
Synchronisation circuit
The IC contains separator circuits for the horizontal and vertical sync pulses and a data-slicing circuit
which extracts the digital teletext data from the analogue signal.
The horizontal drive signal is obtained from an internal VCO which is running at a frequency of 25 MHz.
This oscillator is stabilised to this frequency by using a 12 MHz signal coming from the reference
oscillator of the µ-Controller/Teletext decoder.
The horizontal drive is switched on and off via the soft start/stop procedure. This function is realised by
means of variation of the TON of the horizontal drive pulses.
The vertical synchronisation is realised by means of a divider circuit. The vertical ramp generator needs
an external resistor and capacitor. For the vertical drive a differential output current is available. The
outputs are DC coupled to the vertical output stage.
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In the type TDA9367, intended for 90° picture tubes the following geometry parameters can be adjusted:
•
Horizontal shift
•
Vertical amplitude
•
Vertical slope
•
S-correction
•
Vertical shift
The types which are intended to be used in combination with 110° picture tubes have an East-West
control circuit. The additional controls for these types are:
•
EW width
•
EW parabola width
•
EW upper and lower corner parabola correction
•
EW trapezium correction
•
Vertical zoom, horizontal parallelogram and bow correction.
Chroma and luminance processing
The chroma band-pass and trap circuits (including the SECAM cloche filter) are realised by means of
gyrators and are tuned to the right frequency by comparing the tuning frequency with the reference
frequency of the colour decoder. The luminance delay line and the delay cells for the peaking circuit are
also realised with gyrators. The circuit contains a black stretcher function which corrects the black level
for incoming signals which have a difference between the black level and the blanking level.
Colour decoder
The ICs can decode PAL, NTSC and SECAM signals. The PAL/NTSC decoder does not need external
reference crystals but has an internal clock generator which is stabilised to the required frequency by
using the 12 MHz clock signal from the reference oscillator of the µ-Controller/Teletext decoder.
The Automatic Colour Limiting (ACL) circuit (switchable via the ACL bit in sub address 2OH) prevents
that oversaturation occurs when signals with a high chroma-to-burst ratio are received. The ACL circuit is
designed such that it only reduces the chroma signal and not the burst signal. This has the advantage that
the colour sensitivity is not affected by this function.
SOFTWARE CONTROL
The CPU communicates with the peripheral functions using Special function Registers (SFRS) which are
addressed as RAM locations. The registers for the Teletext decoder appear as normal SFRs in the µController memory map and are written to these functions by using a serial bus. This bus is controlled by
dedicated hardware which uses a simple handshake system for software synchronisation.
For compatibility reasons and possible re-use of software blocks, the TV processor is controlled by I2C
bus. The TV processor control registers cannot be read. Only the status registers can be read ( Read
address 8A ).
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The SECAM decoder contains an auto-calibrating PLL demodulator which has two references, via the
divided 12 MHz reference frequency (obtained from the µ-Controller) which is used to tune the PLL to
the desired free-running frequency and the bandgap reference to obtain the correct absolute value of the
output signal. The VCO of the PLL is calibrated during each vertical blanking period, when the IC is in
search or SECAM mode.
The base-band delay line (TDA 4665 function) is integrated. This delay line is also active during NTSC
to obtain a good suppression of cross colour effects. The demodulated colour difference signals are
internally supplied to the delay line.
RGB output circuit and black-current stabilisation
In the RGB control circuit the signal is controlled on contrast, brightness and saturation. The ICs have a
linear input for external RGB signals. The signals for OSD and text are internally supplied to the control
circuit. The output signal has an amplitude of about 2 Volts black-to-white at nominal input signals and
nominal settings of the various controls.
To obtain an accurate biasing of the picture tube the 'Continuous Cathode Calibration’ system has been
included in these ICs. A black level off set can be made with respect to the level which is generated by
the black current stabilisation system. In this way differ ent colour temperatures can be obtained for the
bright and the dark part of the picture.
The black current stabilisation system checks the output level of the 3 channels and indicates whether the
black level of the highest output is in a certain window or below or above this window. This indication is
read from the status byte 01 and is used for automatic adjustment of the Vg2 voltage during the production
of the TV receiver.
During switch-off of the TV receiver a fixed beam current is generated by the black current control circuit.
This current ensures that the picture tube capacitance is discharged. During the switch-off period the
vertical deflection is placed in an overscan position so that the discharge is not visible on the screen.
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2-2 IF
The TDA936x has an alignment free IF PLL demodulator. Th e fully integrated oscillator is automatically
calibrated, using the 12 MHz crystal as a frequency reference. The IF frequency is simply set in TVProcessor by I2C bus.
The AFC information is available via I2C bus from the TV-Processor status bytes. The controlling
software uses this information for tuner frequency tracking ( automatic following ). The AFC windows is
typically 125Khz wide. The minimum frequency step of the tuner is 62.5 KHz.
This AFC function is disabled when a program is tuned using the direct frequency entry or after fine
tuning adjustment. Therefore it is recommended to tune channel with the TV search function ( manual or
ATSS ) or using the direct channel entry to enable the Automatic Frequency Control.
SAW filters
Ref. Standard Features
K3953M B/G - D/K - I - L/L’ - IF filter for video application
- TV IF filter with Nyquist slopes at 33.9 MHz and
38.9 MHz
- Constant group delay
K9650M B/G - D/K - I - L/L’ - IF filter for audio application
- TV IF audio filter with two channels
- Channel 1 (L’) with one pass band for sound
carrier at 40.40 MHz
- Channel 2 ( L, D/K, I, B/G) with one pass band for
sound carriers between 32.40 MHz and 33.40 MHz
For SECAM L and L’ the TDA936x is switched to positive modulation via I2C bus. SECAM L’ only
occur in VHF band I and have their picture and sound carrier interchanged, compared to SECAM L and
PAL B/G channels. For SECAM L’ the picture carrier is situated at 33.9 MHz and the AM sound carrier
at 40.40 MHz. The IF PLL reference is tuned from 38.9 to 33.9 MHz, this is done via I2C Bus and the SIF
filter is switched from channel 2 to channel 1 ; this is done by pin 4 of TDA 936x. The tuner AGC time
constant is slower than for negative modulation, because the TDA936x reduces its AGC current. To even
slower the AGC time constant an extra series resistor R103 is added. To prevent IF overload when
jumping from a very strong transmitter to a weak transmitter a diode D101 has been ad ded
The SAW filter ( SF1 ) has a double Nyquist slope at 38.9 MHz and 33.9 MHz needed for this
multistandard application. The disadvantage of this choice is that a 5.5 MHz trap filter ( Z501 ) is needed
to suppress the residual sound carrier in the video for B/G signals.
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Chassis block diagram : IF
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2-3 Source switching
The TDA936x has only one external video input, the external video switch ing circuit made with Q504,
Q505, Q507, Q508 and Q509 allows 2 external video signal inputs. The switching command can be either
the SCART1 slow switching pin 8 or the µ-Controller pin 8 when the software takes control of the video
source. The µ-Controller pin 8 is automatically configured by the controlling software ( See table below ).
This pin is also capable of detecting the 3 Status ( 0, 1A, 1B ) described in SCART specifications for
automatic format switching.
TV mode
µ
-Controller pin 8 Status
RF auto Input - High Impedance < 1V
RF Forced Input - High Impedance not defined
AV 1 Auto Input - High Impedance > 2.7 V
AV 1 Auto 16:9 Input - High Impedance 1 V < x < 2.7 V
AV 1 forced Output - Push Pull Max. 3.3V
AV 2 Output - Push Pull < 0.2 V
SVHS Output - Push Pull < 0.2 V
The controlling software via I2C bus selects the signal source :
- Video signal from tuner ( Pin 40 ).
- External video ( SCART 1 or 2 ) depending on Q508 base level.
- External SVHS from SCART 2.
The sound source switching is done in the MSP3415D ( I601 ), by the µ-Controller via I2C bus.
Fast R, G, B insertion : The external R, G, B insertion needs a fast switching and cannot be controlled b y
the software ( instruction cycle of 1µ sec ). The fast switching pin 16 of SCART 1 is directly connected to
the TV processor pin 45 ( Fast blanking input ). The display is synchronised with the selected video
source, i.e. to get stable R, G, B inserted signal they must be synchronised with the selected video source.
The controlling software only enable or disable ( AV2, SVHS, or Forced RF source selected ) fast
blanking.
2-4 µ-Controller I/O pin configuration and function
The I/O pins of the µ-Controller can be configured in many way. All port functions can be individually
programmed by use of the SFR registers.
Each I/O port pin can be individually programmed in these configurations :
Open drain
In this mode, the port can function as in and output. It requires an external pull-up resistor. The maximum
allowable supply voltage for this pull up resistor is +5V.
So in this mode it is possible to interface a 5 Volt environment like I2C while the µ-Controller has a 3.3
Volt supply.
Level
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Push-Pull
The push pull mode can be used for output only. Both sinking and sourcing is active, which lead s to sleep
slopes. The levels are 0 and Vddp, the supply voltage 3.3Volts.
High impedance
This mode can be used for input only operation of the port.
Special port for LED
Pin 10 has the same functionality as the general I/O pins but in addition, their current source and sink
capacity is 8 mA instead of 4 mA. These pins are used for driving LED’s via a series current limiting
resistor.
µ
-Controller I/O pin configuration and function table
pin name
Stand by TV ON
1 n.u. High impedance High impedance not used
2 SCL Open Drain Open Drain Serial clock line
3 SDA Open Drain Open Drain Serial data line
4 SECAM L’ High impedance Push Pull SIF filter swiching
5 OCP High impedance High impedance Over Current Protection
6 - High impedance High impedance For factory use only
7 Key in High impedance High impedance Local keyboard input
8 S/SW High impedance See table above external video switch
10 Red/Green
High impedance Open Drain
LED
11 Panorama Push Pull Push Pull Panorama mode switch
62 Audio mute Push Pull Push Pull High in stand by mode
2-5 Sound processing
Analogue sound IF - input section
The input pins ANA_IN1+ and ANA_IN- offer the possibility to connect sound IF sources to the MSP
3415D. The analogue-to-digital conversion of the preselected sound IF signal is done by an A/D converter,
whose output is used to control an analogue automatic gain circuit (AGC), providing an optimal level fo r a
wide range of input levels.
Quadrature Mixers
The digital input coming from the integrated A/D converter may contain audio information at a frequency
range of theoretically 0 to 9 MHz corresponding to the selected standards. By means of two
programmable quadrature mixers, two different audio sources ; for example, NICAM and FM-mono, may
be shifted into baseband position.
configuration
description
( Switch the set OFF if
the voltage on this pin is
<2.33V )
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Phase and AM discrimination
The filtered sound IF signals are demodulated by means of the phase and amplitude discriminator block.
On the output, the phase and amplitude is available for further processing. AM signals are derived from
the amplitude information, whereas the phase information serves for FM and NICAM demodulation.
NICAM decoder
In case of NICAM - mode, the phase samples are decoded according the DQPSK - coding scheme. The
output of this block contains the original NICAM bitstream.
DSP section
All audio baseband functions are performed by digital signal processing (DSP). The DSP section controls
the source and output selection, and the signals processing.
Sound Mode switching
In case of NICAM transmission, the controlling software read the bit error rate and the operation mode
from the NICAM Decoder. When the set is in “Auto detection” mode ( default mode after ATSS ) the
controlling software set automatically the sound mode ( NICAM mono, NICAM Dual 1 or NICAM Dual
2 ) depending on the transmitted mode.
In case of 2 Carrier FM transmission, the controlling software read the transmission mode and the signal
quality level from the Stereo Detection Register. When the set is in “Auto detection” mode the contro lling
software set automatically the sound mode ( mono, Stereo, Dual 1, Dual 2 ) depending on the transmitted
mode.
In “Auto detection” mode the controlling software evaluate the signal quality and automatically switch to
the analogy sound carrier 1, if the transmission quality is too poor. To avoid unwanted automatic
switching the threshold levels mono to stereo and stereo to mono is different.
In “forced mono “ mode ( Red OSD in recall section ), the controlling software configure the MSP3415D
to demodulate only the analogue (FM or AM) sound carrier 1, no matter the signal quality. The sound
mode “ forced “ or “ Autodetect” is stored for each programme.
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Sound signal flow diagram
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2-6 Sound amplification
The TDA8944J (TDA8946J) is a stereo BTL audio amplifier capable of delivering 2 x 7 W (2 x 15 W)
output power to an 8 Ω load at THD = 10%, using a 12 V power supply and an exter nal heatsink. The
voltage gain is fixed at 32dB.
With the three-level MODE input the device can be switched from ‘standby’ to ‘mute’ and to ‘operating’
mode.
The TDA 8944J outputs are protected by an internal thermal shutdown protection mechanism and shortcircuit protection.
Power amplifier
The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output stage, capable of
delivering a peak output current of 1.5 A.
The BTL principle offers the following advantages :
- Lower peak value of the supply current.
- The ripple frequency on the supply vo ltage is twice the signal frequency.
- No DC-blocking capacitor
- Good low frequency performance
Mode selection
The TDA894xJ has several functional modes, which can be selected by applying the proper DC voltage to
pin MODE.
Mute : In this mode the amplifier is DC biased but not operational (no audio output). This allows the input
coupling capacitors to be charged to avoid pop-noise. The devices is in mute mode when 2.5 V < V
(Vcc-1.5 V).
Operating : In this mode the amplifier is operating normally. The operating mode is activated at V
0.5 V.
2-7 Vertical deflection
The vertical driver circuit is a bridge configuration. The deflection coil is connected between the output
amplifiers, which are driven in phase opposition. The differential input circuit is voltage driven. The input
circuit is especially intended for direct connection to driver circuits which deliver symmetrical current
signals, but is also suitable for asymmetrical currents. The output current of these devices is converted to
voltages at the input pins via resistors R350 and R351. The differential input voltage is compared with the
output current through the deflection coils measured as voltage across R302, which provides internal
feedback information. The voltage across R302 is proportional to the output current.
Flyback voltage
The flyback voltage is determined by an additional supply voltage V
. The principle of operation with
flb
two supply voltages (class G) makes it possible to fix the supply vo ltage Vp optimum for the scan voltage
and the second supply voltage V
efficiency is achieved. The supply voltage V
optimum for the flyback voltage. Using this method, very high
flb
is almost totally available as flyback voltage across the coil,
flb
this being possible due to the absence of a coupling capacitor.
Protection
The output circuit has protection circuits for :
- Too high die temperature
- overvoltage of output stage A
Guard circuit
MODE
MODE
<
<
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The guard signal is not used by the TDA936x to blank the screen in case of fault condition.
Damping resistor
For HF loop stability a damping resistor (R305) is connected across the deflection coil.
EAST-WEST Amplifier (TDA8358J only)
The East-West amplifier is current driven. It can only sink currents of the diode modulator circuit. A
feedback resistor R397 is connected between the input and output of this inverting amplifier in order to
convert the East-West correction input into an output voltage.
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2-8 Power supply (STR F6653)
2-8 -1 STR-F6653 general description
The STR-F6653 is an hybrid IC with a build-in MOSFET and control IC, designed for flyback converter
type switch mode power supply applications.
2-8 -2Power supply primary part operations
An oscillator generates pulses signals which turn on and off a MOSFET transistor.
2-8 -2-1 Start -up circuit: V
IN
The start-up circuit is used to start and stop the operation of the control IC, by detecting a voltage
appearing at V
pin (pin 4).
IN
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When the power switch is pushed on, VIN increases slowly. During this time, C806 is charged through
R802.
As soon as V
smoothing the winding voltage which appears between pin6 and pin7 of the SMPS transformer.
As this winding voltage does not increase to the set voltage immediately after the control circuit starts
operating, V
drops to the shutdown voltage (at 11V), the control circuit continues operating (see below V
start-up). R805 resistor prevents that V
V
must be set higher than the shutdown voltage (VIN (off) = 11V
IN
(overvoltage protection) operating voltage
= 20.5V
(V
OVP
reaches 16V, the STR-F6653 control circuit starts operating. Then, VIN is obtained by
IN
starts dropping. However, as this winding voltag e reaches the set value before VIN voltage
IN
voltage at
IN
pin voltage varies according to the secondary side output current.
IN
) and lower than the O.V.P.
max
)
min
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2-8 -2-1 STR-F6653 oscillating operation
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C
When the MOSFET is ON, the STR-F6653 internal capacitor C1 is ch arged at the constant voltage
6.5V.
At the same time, the voltage at pin 1 (OCP / FB) increases with the same waveform as the MOSFET
drain current.
D
When the pin 1 voltage reaches the threshold voltage V
= 0.73V, the STR-F6653 internal
TH1
comparator 1 starts operating. The STR-F6653 internal oscillator is inverted and the MOSFET turns OFF.
E
When the MOSFET turns OFF, charging of STR-F6653 internal capacitor C1 is released and C1
starts discharging by the STR-F6653 internal resistance R1. So, C1 voltage starts falling in accordance
with the gradient regulated by the constant discharging time of C1 and R1. So, this means that the fixed
time determined by C1 and R1 is the OFF-time of the MOSFET.
F
When C1 voltage falls to around 3.7V, the STR-F6653 internal oscillator is reversed again and the
MOSFET turns ON. C1 is quickly charged to around 6.5V
The MOSFET continues to oscillate by repeating the above procedure.
2-8 -2-3 STR-F6653 protection circuits
• overcurrent protection function (OCP)
Overcurrent protection is performed pulse by pulse detecting at STR-F6653 pin 1 (OCP) the peak of the
MOSFET drain current in every pulse.
•
latch circuit
This circuit sustains an output low from the STR-F6653 internal oscillator and stops operation of the
power supply when overvoltage protection (OVP) and thermal shutdown (TSD) circuit are under
operation
•
thermal shutdown circuit (TSD)
This circuit triggers the latch circuit when the frame temperature of STR-F6653 IC exceeds 140
°
C
•
overvoltage protection circuit (OVP)
This circuit triggers the latch circuit when the V
voltage exceeds 22V (typ.)
in
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2-9 TV start-up, TV normal run and stand-by mode operations
TV start-up operations
2-9 1
2-9-1-1 Schematic diagram for start-up operations
2-9-1-2 TV start-up and microcontroller initialization
- When SW801 power switch is pushed, main AC voltage is applied to T801 transformer (after
rectification by D801...D804 diodes). Then, T801 SMPS transformer starts operating and supplies DC
voltage to I823 (3.3V regulator).
- This regulator provides 3.3V DC voltage to I501 microcontroller power supply pins (pins 54, 56, 61) and
to the reset pulse circuit which provides reset pulse to I501 microcontroller reset pin (pin 60).
- Then, the microcontroller starts its initialization. Its power pin (p in 63) is set to high which allows
delivery of power supply voltages (123V, 8V, 5V...). At this step, all IC’s start working but no picture
appears on screen: I501 IC doesn’t provide horizontal drive voltage.
- Then, the microcontroller consults I702 EEPROM via I2C bus to know the last TV set mode (normal run
mode or stand-by mode ) before switching off.
.
If the TV set was on normal run mode before switching off, the microcontroller delivers
horizontal drive voltage at pin 33 and picture appears on screen.
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.
If the TV set was on stand-by mode before switching off, the microcontroller sw itches TV set to
stand-by mode, decreasing power pin voltage (pin 63). this matter will be explained on
paragraph 5-9-2-b.
- When DC supply voltage from I823 regulator starts rising (from 0V to 1.2V), no current flows through
D591 zener diode. So, Q510 is in off mode.
Also V
=Vcc/2 -Vcc = -Vcc/2 > -0.6V. So, Q511 is in off mode.
be Q511
Then, no voltage reaches I501 pin 60.
- When this voltage reaches 1.2 V, Q510 stays in off mode
but V
= -0.6V. So, Q511 is switched on and starts driving DC supply voltage to I501 pin 60.
be Q511
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- When the DC supply voltage reaches (2.4V +0.6V ) =3.0V, Q510 starts conducting but as the Q511
base-emitter voltage is the same as the collector-emitter voltage of the saturated Q510, Q511 switches
off and no voltage reaches I501 pin 60.
- If the DC supply voltage decreases below 3 V, Q510 switches off immediately. Q511 starts conducting,
pulling I501 pin 60 high.
At the same time, it discharges the reset capacitor C501. Discharging this capacitor is necessary to
garantee a defined reset pulse duration.
2-9-2 TV normal run and stand-by mode operations
Depending on remote control commands, I501 microcontroller part pin 63 (power) is set to:
- high for normal run mode
- low for stand-by mode
2-9-2-1 TV on normal run mode
2-9-2-1-1 I501 microcontroller part pin 63 (power) effect
I501 microcontroller part pin 63 (power) is connected to the following circuit:
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Appendix Service manual WP-795
On normal run mode, I501 microcontroller pin 63 (power) is set to high
•
So, I810 controlled rectifier is not conducting
- Q809 is conducting. So, Q808 is not conducting and Q807 is conducting
- So, Q807 collector is connected to the ground and I810 controlled rectifier gate pin is set
to low (no conducting)
•
So, current from 11V DC voltage (from T801 SMPS transformer pin 13) does not flow through Q811
and Q810 transistors but flows through I806 IC error amplifier
- Q809 is conducting. So, Q810 is not conducting and no current flows from Q810 collector
to the ground
Therefore, the power circuit diagram is the following one:
2-9-2-1-2 power supply circuit diagram during TV set normal run
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Appendix Service manual WP-795
2-9-2-1-3 power supply functioning during TV set normal run mode
- I801 transmits controlled pulses to T801 which generates DC voltages after rectifications by secondary
part diodes and electro capacitors (by example by D820 and C813 on 1 43V supply voltage line).
- 8V, 5V, 3.3V supply voltage lines have stabilized voltages obtained by I8 20, I822, I823 voltage
regulators.
- On 143V supply voltage line, R823 resistor has been chosen to reach exact DC voltage required on this
line.
- 143V supply voltage line includes an IC error amplifier (I806) which corrects unexpected DC voltage
variations on this line.
2-9-2-1-4 power supply IC delivery during TV set normal run
power supply line IC power supply delivery Remarks
143V
14.5V I602 sound amplifier pins 3-16
11V T401 H- drive
8V I501 Main IC pins 14-39
I601 Sound Demod. pins 38-
6V I703 IR receiver pin 1
5V
I702 EEPROM pin 8
tuner
3.3V
FBT
39-40
I601 Sound Demod. pins 7-1857
Main IC µcom part pins 5456-61
FBT supplies 45V to I301 vertical IC
FBT supplies 45V to T401 H-drive
FBT supplies 14V to I301 vertical IC
FBT supplies 33V to the tuner
FBT supplies 185V to I901 video amplifier pin 6
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Appendix Service manual WP-795
2-9-2-2 TV set on stand-by mode
2-9-2-2-1 TV set circuit diagram on stand-by mode
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2-9-2-2-2 TV set stand-by mode operations
-On stand-by mode, I501 microcontroller pin 63 (power) is set to low.
- So, Q809 collector is set to high.
-Then, I810 controlled rectifier gate pin is set to high and I810 is conducting.
- So, current flows from pin 16 SMPS transformer to the ground via I804 photo coupler and Q810 and
Q811 transistors (which are conducting).
- In these conditions, I801 delivers pulses on light mode and T801 produces voltages with reduced power.
- As I810 is conducting, current flows also from pin 16 SMPS transformer to I823 (3.3V regulator) for
I501 µcom, IR receiver and front mask buttons supply voltage (then, remote control or front mask
buttons can be activated to leave stand-by mode).
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