Daewoo DTH-29U7 Schematic

OTC 2003

CHASSIS : CP-830F

MODEL :

DTH-29U7

S/M No.TCN830FEF0

CP830F Service Manual

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CONTENTS

DOCUMENT HISTORY 5 1 MAIN FEATURES 5

1.1SPECIFICATIONS 5

1.1.1 GENERAL 5

1.1.2 EURO-SCART 1 (21 Pin) 5

1.1.3 EURO-SCART 2 (21 Pin) 6

1.2CHANNEL/FREQUENCY TABLE 7

1.3ATSS SORTING METHOD 10

1.3.1 GENERAL CASE 10

1.3.2 SPECIAL CASE 10

2 SAFETY INSTRUCTION 12 3 ALIGNMENT INSTRUCTIONS 13

3.1MICROCONTROLLER CONFIGURATION : SERVICE MODE 13

3.2SERVICE MODE NAVIGATION 13

3.3MICROCONTROLLER CONFIGURATION : OPTION BITS 13

3.3.1 OPTION 1 14

3.3.2 OPTION 2 14

3.4 TV SET ALIGNMENT 14

3.4.1 LOCAL OSCILLATOR ALIGNMENT 14

3.4.2 G2 ALIGNMENT 14

3.4.3 WHITE BALANCE 15

3.4.4 FOCUS 15

3.4.5 VERTICAL GEOMETRY 15

3.4.6 HORIZONTAL PICTURE CENTRING 15

3.4.7 EAST / WEST CORRECTION 15

3.4.8 AGC 16

4 IC DESCRIPTION 17

4.1TELETEXT DECODER WITH EMBEDDED 8-BIT CONTROLLER 17

4.1.1 BLOCK DIAGRAM OF THE SDA55XX 17

4.1.2 DESCRIPTION 17

4.1.3 IC MARKING AND VERSION 18

4.1.4 PINNING 18

4.2 VSP9412A - SCAN RATE CONVERTER INCLUDING MULTISTANDARD COLOUR DECODER 19

4.2.1 BLOCK DIAGRAM OF THE VSP9412A 20

4.2.2 DESCRIPTION 20

4.2.3 PINNING 22

4.3DDP 3315C - DISPLAY AND DEFLECTION PROCESSOR 23

4.3.1 BLOCK DIAGRAM OF THE DDP 3315C 24

4.3.2 DESCRIPTION 24

4.3.3 PINNING 26

4.4MSP341X MULTISTANDARD SOUND PROCESSOR 28

4.4.1 BASIC FEATURES OF THE MSP 341X 28

4.4.1.1 Demodulator & NICAM Decoder Section 28

4.4.1.2 DSP-Section (Audio Baseband Processing) 29

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4.4.1.3 Analogue Section 29

4.4.1.4 NICAM & FM/AM-Mono 29

4.4.1.5 German 2-Carrier System (DUAL FM System) 29

4.5 TDA4470 - MULTISTANDARD VIDEO-IF AND QUASI PARALLEL SOUND PROCESSOR 32

4.5.1 DESCRIPTION 32

4.5.2 FEATURES 32

4.5.3 PINNING 32

4.5.4 BLOCK DIAGRAM 33

4.6TDA894XJ STEREO AUDIO AMPLIFIER 34

4.6.1 FEATURES 34

4.7TDA835XJ VERTICAL AMPLIFIER 35

4.7.1 TDA8357J 35

4.7.2 TDA8358J 37

4.8TDA6107Q 39

4.924C16 - 16 KB EEPROM 40

4.10 STR - F6654 41

4.10.1 GENERAL DESCRIPTION 41

4.10.2 FEATURES 41

4.10.3 BLOCK DIAGRAM 41

4.10.4 PIN DESCRIPTION 42

4.10.5 CONTROL PART - ELECTRICAL CHARACTERISTICS 42

4.10.6 MOSFET ELECTRICAL CHARACTERISTICS 43

5 CP830 CHASSIS DESCRIPTION 44

5.1BLOCK DIAGRAM 44

5.2IF SECTION 45

5.2.1 BLOCK DIAGRAM 45

5.2.2 VISION IF AMPLIFIER 46

5.2.3 TUNER-AND VIF-AGC 46

5.2.4 FPLL, VCO AND AFC 46

5.2.5 VIDEO DEMODULATION AND AMPLIFIER 47

5.2.6 SOUND IF AMPLIFIER AND SIF-AGC 47

5.2.7 QUASI-PARALLEL-SOUND (QPS) MIXER 47

5.2.8 STANDARD SWITCH 47

5.2.9 L

SWITCH 47

5.2.10 INTERNAL VOLTAGE STABILISER 47

5.3VIDEO / RGB 51

5.3.1 FRONT END 47

5.3.1.1 CVBS Front-End

5.3.1.2 Input Selector

5.3.1.3 Signal Levels And Gain Control 48

5.3.1.4 Synchronization 48

5.3.1.5 Chroma Decoder 48

5.3.1.6 Luminance Processing

5.3.1.7 RGB Front-End

5.3.1.8 Signal Processing 48

5.3.1.8.1 Horizontal Prescaler 48

5.3.1.8.2 Noise Reduction 49

5.3.1.8.3 Noise Measurement 49

5.3.1.8.4 Operation Modes 49

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5.3.1.8.5Digital 656 Output 49

5.3.2BACK END 49

5.3.2.1 Digital Input Interface 49

5.3.2.2 Horizontal Scaler 49

5.3.2.3 Luma Contrast and Brightness 49

5.3.2.4 Black Level Expander/Compressor (BLEC) 49

5.3.2.5 Luma Sharpness Enhancer (LSE) 50

5.3.2.6 Dynamic Peaking 50

5.3.2.7 Luma Transient Improvement (LTI) 50

5.3.2.8 Mixing of Dynamic Peaking and LTI 50

5.3.2.9 Chroma Transient Improvement 50

5.3.2.10 Analog Back End 51

5.3.2.11 Analog RGB Insertion 51

5.3.2.12 CRT Measurement and Control 51

5.3.2.13 Synchronization and Deflection 52

5.3.2.14 EHT Compensation 52

5.4MICROCONTROLLER 52

5.4.1MICROCONTROLLER FEATURES 52

5.4.2ACQUISITION FEATURES 53

5.4.3PORTS 53

5.4.4

-CONTROLLER I/O PIN CONFIGURATION AND FUNCTION TABLE 53

5.4.5TUNING 54

5.4.6AUTOMATIC PICTURE FORMAT SWITCHING 54

5.4.6.1 WSS Data 54

5.4.6.2 SCART Pin 8 Data (Slow Switching) 55

5.4.6.3 Picture Format Description 55

5.4.6.3.1 16:9 CRT 55

5.4.6.3.2 4:3 CRT 56

5.4.7EXTERNAL SOURCE CONTROL LOGIC 57

5.4.8OVER CURRENT PROTECTION 58

5.5TELETEXT DISPLAY 58

5.6SOUND PROCESSING

5.6.1ANALOGUE SOUND IF - INPUT SECTION

5.6.2QUADRATURE MIXERS

5.6.3PHASE AND AM DISCRIMINATION

5.6.4NICAM DECODER 60

5.6.5DSP SECTION

5.6.6SOUND MODE SWITCHING

5.7SOUND AMPLIFICATION

5.7.1POWER AMPLIFIER

5.7.2MODE SELECTION 60

5.8VERTICAL DEFLECTION

5.8.1FLYBACK VOLTAGE

5.8.2PROTECTION 61

5.8.3GUARD CIRCUIT 61

5.8.4DAMPING RESISTOR 61

5.8.5EAST-WEST AMPLIFIER (TDA8358J ONLY)

5.9POWER SUPPLY (STR F6654)

5.9.1STR-F6654 GENERAL DESCRIPTION 61

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5.9.2POWER SUPPLY PRIMARY PART OPERATIONS 61

5.9.2.1 Start -up Circuit: VIN

5.9.2.2 STR-F6654 Oscillating Operation

5.9.2.3 STR-F6654 Protection Circuits 64

5.10 TV START-UP, TV NORMAL RUN AND STAND BY MODE OPERATIONS 65

5.10.1 TV START-UP OPERATIONS 65

5.10.1.1 Schematic Diagram For Start-Up Operations 65

5.10.1.2 TV Start-Up And Microcontroller Initialisation 65

5.10.2 TV NORMAL RUN AND STAND-BY MODE OPERATIONS 67

5.10.2.1 TV On Normal Run Mode 67

5.10.2.2 TV Set On Stand-By Mode 70

6 SERVICE PARTS LIST 72

6.1 DTH-29U7ZL 72

7 EXPLODED VIEW 88

7.1 DTH-29U7 88

8 PRINTED CIRCULT BOARD 93

8.1 MAIN PCB 93

8.2 CRT PCB 94

8.3 PFC PCB 95

9 SCHEMATIC DIAGRAM 96

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DOCUMENT HISTORY

VERSION DATE COMMENTS

V1.00 18/11/02 Creation of document (Author M Hearn) for project CP830 100Hz TV. V1.01 22/11/02 Reformatting of the document, plus insertion of Document History section

1 MAIN FEATURES

1.1 SPECIFICATIONS

1.1.1 GENERAL

TV standard PAL - SECAM B/G D/K, PAL I/I, SECAM L/L Colour system Tuner PAL, SECAM

AV PAL, SECAM, PAL 60, NTSC M, NTSC 4.43

Sound system NICAM B/G, I, D/K, L,

FM 2Carrier B/G, D/K Power 29"(4:3) Real Flat :84W approx. consumption Sound Output Power 7W x 2 (at 60% mod, 10%THD) Speaker 12W 8 ohm x2 Teletext system 9 pages memory FASTEXT (FLOF or TOP) Aerial input 75 ohm unbalanced Channel coverage Off-air channels, S-cable channels and hyperband Tuning system frequency synthesiser tuning system Visual screen size

29" : 68cm Channel indication On Screen Display Program Selection 100 programmes Aux. terminal EURO-SCART 1 : Audio / Video In and Out, R/G/B

In, Slow and Fast switching.

EURO-SCART 2 : Audio / Video In and Out, SVHS In.

AV3 : Audio-Video Jack on front of cabinet.

Headphone jack (3.5 mm) on front of cabinet

SVHS3 (option) : Jack on front of cabinet ? sound

input common with AV3. Remote Control R-46G22

Unit

1.1.2 EURO-SCART 1 (21 Pin)

Pin Signal Description Matching value

1 Audio Output Right 0.5 Vrms, Impedance < 1 k , ( RF 54% Mod ) 2 Audio Input Right 0.5 Vrms, Impedance > 10 k 3 Audio Output Left 0.5 Vrms, Impedance < 1 k , ( RF 54% Mod ) 4 Audio Earth 5 Blue Earth 6 Audio Input Left 0.5 Vrms, Impedance > 10 k 7 Blue Input 0.7 Vpp 0.1V, Impedance 75

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1.1.3 EURO-SCART 2 (21 Pin)

9 Green Earth 10 N.C. 11 Green Input 0.7 Vpp 0.1V, Impedance 75 12 N.C. 13 Red Earth 14 Blanking Earth 15 Red Input 0.7 Vpp 0.1V, Impedance 75

16 Fast Switching 0 to 0.4V : Logic 0 , 1 to 3V : Logic 1 , Impedance 75 17 Video Out Earth 18 Video In Earth

19 Video Output 1 Vpp 3dB, Impedance 75 20 Video Input 1 Vpp 3dB, Impedance 75 21 Common Earth

Pin Signal Description Matching value

1 Audio Output Right 0.5 Vrms, Impedance < 1 k ( RF 54% Mod )

2 Audio Input Right 0.5 Vrms, Impedance > 10 k

3 Audio Output Left 0.5 Vrms, Impedance < 1 k , ( RF 54% Mod )

4 Audio Earth

5 Earth

6 Audio Input Left 0.5 Vrms, Impedance > 10 k

7 N.C.

8 N.C.

9 N.C.

10 N.C. 11 N.C. 12 N.C. 13 Earth 14 Earth 15 Chroma Input 3dB for a luminance signal of 1 Vpp 16 N.C. 17 Earth 18 Video In Earth 19 Video Output 1 Vpp 3dB, Impedance 75 ( Monitor output ) 20 Video Input, Y In. 1 Vpp 3dB, Impedance 75 21 Common Earth

2468101214161820

13579111315171921

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1.2 CHANNEL/FREQUENCY TABLE

CHANNEL EUROPE CCIR FRANCE GB(IRELAND) EAST OIRT

C01 46.25 - 45.75 49.75 C02 48.25 55.75 (L ) 53.75 59.25 C03 55.25 60.5 (L ) 61.75 77.25 C04 62.25 63.75 (L ) 175.25 85.25

C05 175.25 176.00 183.25 93.25 C06 182.25 184.00 191.25 175.25 C07 189.25 192.00 199.25 183.25 C08 196.25 200.00 207.25 191.25 C09 203.25 208.00 215.25 199.25 C10 210.25 216.00 223.25 207.25 C11 217.25 189.25 (LUX) 231.25 215.25

C12 224.25 69.25 (L ) 239.25 223.25 C13 53.75 76.25 (L ) 247.25 C14 - 83.25 (L ) 49.75 -

C15 82.25 90.25 57.75 C16 - 97.25 65.75 C17 183.75 - 77.75 C18 192.25 - 85.75 C19 201.25 - - C20 - - - C21 471.25 471.25 471.25 471.25 C22 479.25 479.25 479.25 479.25 C23 487.25 487.25 487.25 487.25 C24 495.25 495.25 495.25 495.25 C25 503.25 503.25 503.25503.25 C26 511.25 511.25 511.25 511.25 C27 519.25 519.25 519.25 519.25 C28 527.25 527.25 527.25 527.25 C29 535.25 535.25 535.25 535.25 C30 543.25 543.25 543.25 543.25 C31 551.25 551.25 551.25 551.25 C32 559.25 559.25 559.25 559.25 C33 567.25 567.25 567.25 567.25 C34 575.25 575.25 575.25 575.25 C35 583.25 583.25 583.25 583.25 C36 591.25 591.25 591.25 591.25 C37 599.25 599.25 599.25 599.25 C38 607.25 607.25 607.25 607.25 C39 615.25 615.25 615.25 615.25 C40 623.25 623.25 623.25 623.25 C41 631.25 631.25 631.25 631.25 C42 639.25 639.25 639.25 639.25 C43 647.25 647.25 647.25 647.25 C44 655.25 655.25 655.25 655.25 C45 663.25 663.25 663.25 663.25

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CHANNEL EUROPE CCIR FRANCE GB(IRELAND) EAST OIRT

C46 671.25 671.25 671.25 671.25 C47 679.25 679.25 679.25 679.25 C48 687.25 687.25 687.25 687.25 C49 695.25 695.25 695.25 695.25 C50 703.25 703.25 703.25 703.25 C51 711.25 711.25 711.25 711.25 C52 719.25 719.25 719.25 719.25 C53 727.25 727.25 727.25 727.25 C54 735.25 735.25 735.25 735.25 C55 743.25 743.25 743.25 743.25 C56 751.25 751.25 751.25 751.25 C57 759.25 759.25 759.25 759.25 C58 767.25 767.25 767.25 767.25 C59 775.25 775.25 775.25 775.25 C60 783.25 783.25 783.25 783.25 C61 791.25 791.25 791.25 791.25 C62 799.25 799.25 799.25 799.25 C63 807.25 807.25 807.25 807.25 C64 815.25 815.25 815.25 815.25 C65 823.25 823.25 823.25 823.25 C66 831.25 831.25 831.25 831.25 C67 839.25 839.25 839.25 839.25 C68 847.25 847.25 847.25 847.25 C69 855.25 855.25 855.25 855.25 C70 863.25 863.25 863.25 863.25 C71 69.25 - - C72 76.25 - - C73 83.25 - - C74 90.25 - - C75 97.25 - - C76 59.25 - - C77 93.25 - - S01 105.25 104.75 103.25 105.25 S02 112.25 116.75 111.25 112.25 S03 119.25 128.75 119.25 119.25 S04 126.25 140.75 127.25 126.25 S05 133.25 152.75 135.25 133.25 S06 140.25 164.75 143.25 140.25 S07 147.25 176.75 151.25 147.25 S08 154.25 188.75 159.25 154.25 S09 161.25 200.75 167.25 161.25 S10 168.25 212.75 - 168.25 S11 231.25 224.75 - 231.25 S12 238.25 236.75 - 238.25 S13 245.25 248.75 255.25 245.25 S14 252.25 260.75 263.25 252.25 S15 259.25 272.75 271.25 259.25 S16 266.25 284.75 279.25 266.25

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CHANNEL EUROPE CCIR FRANCE GB(IRELAND) EAST OIRT

S17 273.25 296.75 287.25 273.25 S18 280.25 136.00 295.25 280.25 S19 287.25 160.00 303.25 287.25 S20 294.25 - - 294.25 S21 303.25 303.25 - 303.25 S22 311.25 311.25 311.25 311.25 S23 319.25 319.25 319.25 319.25 S24 327.25 327.25 327.25 327.25 S25 335.25 335.25 335.25 335.25 S26 343.25 343.25 343.25 343.25 S27 351.25 351.25 351.25 351.25 S28 359.25 359.25 359.25 359.25 S29 367.25 367.25 367.25 367.25 S30 375.25 375.25 375.25 375.25 S31 383.25 383.25 383.25 383.25 S32 391.25 391.25 391.25 391.25 S33 399.25 399.25 399.25 399.25 S34 407.25 407.25 407.25 407.25 S35 415.25 415.25 415.25 415.25 S36 423.25 423.25 423.25 423.25 S37 431.25 431.25 431.25 431.25 S38 439.25 439.25 439.25 439.25 S39 447.25 447.25 447.25 447.25 S40 455.25 455.25 455.25 455.25 S41 463.25 463.25 463.25 463.25

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1.3 ATSS SORTING METHOD

The TV set sweeps all the TV bands from beginning of VHF to end of UHF. The TV controlling software for each program checks if a VPS CNI code is transmitted (this system exists for German, Swiss and Austrian transmissions). If no VPS CNI code is found, then the system checks if a CNI code is transmitted as part of the teletext transmission ( Packet 8/30 format 1 and format 2). If such a code ( VPS or teletext ) is found and if this code is in the ATSS list, the program is automatically named. If the transmission does not have VPS CNI, and no teletext service is available, then there is no possibility of the program being automatically named. The programs found are then sorted in 4 groups :

Group I : It contains all the programs from the selected country and named by the TV controlling software. Within this group the sorting order is fixed by the ATSS list.

Group II : It contains all the programs with a strong signal strength which are not listed in group I. Group III : It contains all the programs with a weak signal strength which are not listed in group I. Group IV : If two or more programs with the same code are found, only the strongest ( or if they have the same level

the one with the lowest frequency) is listed in group I, II or III. The others are listed in group IV.

1.3.1 GENERAL CASE 1.3.2 SPECIAL CASE

Program

Group Skip

number

1 2 Group I

...

n+1

... Group II m

m+1

... Group III

p+1

... Group IV

q+1

... not used

Program

Group Skip

number

1 ... Group II m

m+1

... Group III

p+1

... Group IV

q+1

... not used

Special case : Country selection = Others

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Note : If two programs with the same name but a different code are found these two programs are listed in group I, II or III .

The sorting order within group II, III, and IV is based on the channel frequency. The program with the lowest frequency is allocated the first rank in its group, and so forth until the last program of the group which has the highest frequency.

Special case : France If France is selected, the TV controlling software first sweeps all TV bands with France system selected ( positive video modulation) and then a second time with Europe system selected ( negative video modulation).

Special case : Switzerland If Switzerland is selected the TV controlling software first sweeps all TV bands with Europe system selected (negative video modulation) and then a second time with France system selected ( positive video modulation).

Special case : GB Note for satellite receiver users : Before starting ATSS turn on your satellite receiver and tune to

SKY NEWS . If GB is selected the TV controlling software seeks for programs only in UHF ( C21 to C70 ). The sorting order is : 1 - BBC1 2 - BBC2 3 - ITV 4 - CH4 5 - CH5 6 ? NEWS (Sky News)

If two or more

identical programs ( same name but different code e.g. BBC1 and BBC1

Scotland ) are found the following programs in the list will be shifted up. (1 - BBC1, 2 - BBC1, 3

BBC2, 4 - ITV, 5 - CH4, 6 - CH5, 7 - NEWS, ..)

If one of the programs above is not found, the associated program number remains empty ( freq.=467.25 MHz - Skip selected - no name ? system = GB). example A : 1 - BBC1, 2 - BBC2, 3 - ITV, 4 - -----, 5 - CH5, 6 - NEWS, ... example B ( if 2 BBC1 found ) : 1 - BBC1, 2 - BBC1, 3 - BBC2, 4 - ITV, 5 - -----, 6 - CH5, 7 NEWS, ...

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2 SAFETY INSTRUCTION WARNING: Only competent service personnel may carry out work involving the testing or repair

of this equipment.

X-RAY RADIATION PRECAUTION

1. Excessive high voltage can produce potentially hazardous X-RAY RADIATION. To avoid such hazards, the high voltage must not exceed the specified limit. The nominal value of the high

voltage of this receiver is 25-26 KV (20

-21 ) or 26 KV (25 - 28 ) at max beam current. The

high voltage must not, under any circumstances, exceed 27.5 KV (20

), 29KV (21 ), 29.5 KV (25 )

or 30 KV (28

). Each time a receiver requires servicing, the high voltage should be checked. It is

important to use an accurate and reliable high voltage meter.

2. The only source of X-RAY Radiation in this TV receiver is the picture tube. For continued X-RAY RADIATION protection, the replacement tube must be exactly the same type tube as specified in the parts list.

SAFETY PRECAUTION

Potentials of high voltage are present when this receiver is operating. Operation of the receiver outside the cabinet or with the back board removed involves a shock hazard from the receiver. Servicing should not be attempted by anyone who is not thoroughly familiar with the precautions necessary when working on high voltage equipment. Discharge the high potential of the picture tube before handling the tube. The picture tube is highly evacuated and if broken, glass fragments will be violently expelled. If any Fuse in this TV receiver is blown, replace it with the FUSE specified in the Replacement Parts List. When replacing a high wattage resistor (metal oxide film resistor) in the circuit board, keep the resistor 10 mm away from circuit board. Keep wires away from high voltage or high temperature components. This receiver must operate under AC 230 volts, 5O Hz. NEVER connect to a DC supply or any other voltage or frequency.

PRODUCT SAFETY NOTICE

Many electrical and mechanical parts in this equipment have special safety-related characteristics. These characteristics are often passed unnoticed by a visual inspection and the X-RAY RADIATION protection afforded by them cannot necessarily be obtained by using replacement components rated for higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in this manual and its supplements, electrical components having such features are identified by designated symbol on the parts list. Before replacing any of these components, read the parts list in this manual carefully. The use of substitutes replacement parts which do not have the same safety characteristics as specified in the parts list may create X-RAY Radiation.

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3 ALIGNMENT INSTRUCTIONS

3.1MICROCONTROLLER CONFIGURATION : SERVICE MODE To switch the TV set into service mode please see instruction below.

1 - Select PR. number 91 2 - Adjust sharpness to minimum and exit all menus. 3 - Within 2 seconds press the key sequence : RED - GREEN - menu

The software version is displayed beside the word Service, e.g.

SERVICE V1.00 .

To exit SERVICE menu press menu key or Std By key.

3.2SERVICE MODE NAVIGATION Pr Up/Down remote keys : cycle through the service items available.

Vol -/+ remote keys : Dec./Increment the values within range - Cycle trough option bits. OK key : Toggle bits in option byte

Order Item Default setting

1 HOR CEN 2 RED GAIN 3 GRN GAIN 4 BLUE GAIN 5 RED BIAS 6 GRN BIAS 7 AGC LEVEL 8 G2 - SCREEN

9AFT 10 OPTION1 11 OPTION2 12 PARABOLA 13 HOR WIDTH 14 CORNER T 15 CORNER B 16 HOR. PARAL 17 V. LINEAR 18 EW TRAPEZ 19 S CORRECT 20 VERT CENT 21 VERT SIZE

3.3 MICROCONTROLLER CONFIGURATION : OPTION BITS There are two option bytes available (16 bits in all). These option bits are available from Service

mode. First find the OPTION1 or OPTION2 control, and then use the Volume PLUS/MINUS buttons on the remote control keypad to locate the bits, and OK key to toggle them. The table below shows the two option bytes available;

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3.3.1 OPTION 1 B7 B6 B5 B4 B3 B2 B1 B0

TOP FASTEXT TUBE Headphone Dolby SVHS Tuner options

1 text (FLOF) 4:3 Volume/Balance Virtual 3 00 = Philips

OFF OFF control OFF OFF disable 01 = not used TOP FASTEXT TUBE Headphone Dolby SVHS 10 = ALPS

0 text ON (FLOF) 16:9 Volume/Balance Virtual 3 11 = PARTSNIC

ON control ON ON enable (DW)

3.3.2 OPTION 2

B7 B6 B5 B4 B3 B2 B1 B0

1 Fixed to ‘0’ JVC remote control AVL control OFF PICTURE TILT ON Program list enabled

See table below.

0 Daewoo Remote control AVL control ON PICTURE TILT OFF Program list disabled

Beam Current

Tube (mA) B2 B1 B0

Nominal Max

0.95 1.10 0 0 0

1.00 1.15 0 0 1

4/3 - Super Flat, 16/9 – Super Flat 1.05 1.20 0 1 0

1.10 1.25 0 1 1

1.20 1.35 1 0 0

1.25 1.40 1 0 1

4/3 - Real Flat, 16/9 – Real Flat 1.30 1.45 1 1 0

1.35 1.50 1 1 1

All values modified are immediately memorised in eeprom.

3.4 TV SET ALIGNMENT

3.4.1 LOCAL OSCILLATOR ALIGNMENT

Tune a colour bar pattern. The frequency of the signal carrier must be accurate ( Max +/- 10KHz deviation from the nominal channel frequency).

Find

AFT item in service mode.

Adjust the coil L150 to bring the cursor to central position : 32.

3.4.2 G2 ALIGNMENT

- Tune a colour bar pattern.

- Find the

G2 - SCREEN item in service mode.

- Adjust screen volume ( on FBT ) to bring the cursor to central position : 32.

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3.4.3 WHITE BALANCE

- Select a dark picture and adjust RED BIAS and GRN BIAS to the desired colour temperature.

- Select a bright picture and adjust RED, GRN and BLUE GAIN to the desired colour temperature.

3.4.4 FOCUS Adjust the Focus volume ( on FBT ) to have the best resolution on screen.

3.4.5 VERTICAL GEOMETRY Adjust V. LINEAR (linearity), S CORRECT (S. Correction), VERT SIZE (Vertical amplitude), VERT CENT (vertical centring) to compensate for vertical distortion.

3.4.6 HORIZONTAL PICTURE CENTRING Adjust HOR CEN (Horizontal centre) to have the picture in the centre of the screen.

3.4.7 EAST / WEST CORRECTION Adjust the PARABOLA, HOR WIDTH, CORNER, HOR PARAL, EW TRAPEZ, to compensate for geometrical distortion.

HOR PARAL

HOR WIDTH

adjust for 93% overscan.

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PARABOLA

CORNER B & CORNER T

EW TRAPEZ

3.4.8 AGC

- Make sure option bits are correct for the tuner fitted on the chassis (See above how to change option bits).

- Adjust the antenna signal level at 64 dB

V± 2

- Tune a colour bar pattern.

- Find the

AGC item in service mode.

- Press the key

OK on the remote keypad and wait until AGC level stabilise to the optimum value.

- Alternatively, use

Vol Up/Dwn keys to adjust manually to the desired Tuner Take Over Point (TOP).

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4 IC DESCRIPTION

4.1 TELETEXT DECODER WITH EMBEDDED 8-BIT CONTROLLER TVText Pro is a 8-bit controller based on a enhanced 8051 core with embedded teletext, On screen Display and TV controller functions.

4.1.1 BLOCK DIAGRAM OF THE SDA55XX

4.1.2 DESCRIPTION The SDA 55xx is a single chip teletext decoder for decoding World System Teletext data as well as Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling (WSS) data used for PAL plus transmissions (line 23). The device provides an integrated general-purpose, fully 8051-compatible Microcontroller with television specific hardware features. The microcontroller has been enhanced to provide powerful features such as memory banking, data pointers and additional interrupts etc. The on-chip display unit for displaying Level 1.5 teletext data is also used for customer defined on-screen displays. Internal XRAM consists of 16 Kbytes. Device has an internal ROM of 128 Kbytes. The SDA 55xx supports a wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented characters (DRCS).

The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does most of the internal TTX acquisition processing, transfers data to/from external memory interface and receives/transmits data via I 2 C-firmware user-interface. The slicer combined with dedicated hardware stores TTX data in a VBI buffer of 1 Kilobyte. The Microcontroller firmware performs all the acquisition tasks (hamming-and parity-checks, page search

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and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext-features like Packet-26-handling, FLOF, TOP and list-pages.

4.1.3 IC MARKING AND VERSION Chassis IC marking OSD languages ATSS countries Text

CP830 BULGARIAN, Austria, Belgium,

CZECH, GERMAN, Switzerland, Czech DANISH, SPANISH, Republic, Germany, FRENCH, FINNISH, Denmark, Spain, PAN-EUROPEAN ENGLISH, GREEK, France, Finland, GB, LATIN, CYRILLIC, HUNGARIAN, Greece, Hungary, Italy, GREEK. ITALIAN, Ireland, Norway, NORWEGIAN, Netherlands, Portugal, DUTCH, POLISH, Poland, Sweden, ROMANIAN, Slovak Republic, RUSSIAN, Others SWEDISH, SLOVAKIAN.

4.1.4 PINNING

PSDIP 52-pin Pin Name Type Short Description

1 SCL IN/OUT Software driven I2C bus Clock line 2 SDA IN/OUT Software driven I2C bus Data line 3 S/SW2 IN Slow switching control for SCART 2. 4 S/SW2 IN (See Microcontroller I/O pin configuration) 5 S/SW1 IN Slow switching control for SCART 1. 6 S/SW1 IN (See Microcontroller I/O pin configuration) 7 n.c.

8 Reset Out OUT Driven by controlling software to reset video IC s. 9 VDD2.5 IN Supply voltage 2.5V

10 VSS IN Ground (0V)

11 VDD3.3 IN Input/Output 3.3V 12 CVBS IN CVBS input for the acquisition circuit 13 VDDA2.5 IN Supply voltage for analog components 14 VSSA IN Ground for analog components 15 AFT IN ADC input, AFT input 16 AGC IN ADC input, for AGC alignment only 17 KEY IN ADC input, local key sensing 18 OCP IN Switch Off the set when the voltage goes below a trigger level 19 HS IN Horizontal sync for OSD/Txt synchronisation 20 VS IN Vertical sync for OSD/Txt synchronisation 21 MODESW OUT High : Negative video modulation (B, G, D, K,I)

Low : Positive video modulation (L / L )

22 L/L OUT High : L , Low : L 23 IR IN Remote control signal input 24 INT IN Interrupt input from audio processor

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PSDIP 52-pin Pin Name Type Short Description

25 n.c. 26 n.c. 27 n.c. 28 n.c. 29 VSS IN Ground (0V) 30 VDD3.3 IN Input/Output 3.3V 31 n.c. 32 n.c. 33 RESET IN A low level on this pin resets the device. 34 XTAL2 OUT Output of the inverting oscillator amplifier 35 XTAL1 IN Input of the inverting oscillator amplifier 36 VSSA IN Ground for analog components 37 VDDA2.5 IN Supply voltage for analog components 38 R OUT OUT Red output 39 G OUT OUT Green output 40 B OUT OUT Blue output 41 BK OUT OUT Blanking 42 VDD2.5 IN Supply voltage 2.5V 43 VSS IN Ground (0V) 44 VDD3.3 IN Input / Output 3.3V 45 n.c. 46 n.c. 47 n.c. 48 AGC OUT Tuner TOP adjustment 49 n.c. 50 n.c. 51 LED OUT High : Green LED, Low : Red LED 52 POWER OUT High : SMPS ON, Low : SMPS in stand by

4.2 VSP9412A - SCAN RATE CONVERTER INCLUDING MULTISTANDARD COLOUR DECODER The VSP 94x2A comprises all main functions of a digital featurebox in one monolithic IC. The device comprises a digital multistandard color decoder, a RGB interface with fast-blank capability (SCART), digital ITU656 input, scaling units including panorama, embedded DRAM for upconversion, picture improvements, temporal noise reduction as well as A/D and D/A converter.

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4.2.1 BLOCK DIAGRAM OF THE VSP9412A

Data

Acquisition

Input

Processing

Clock

Generation

Memory Output

Processing

Display

Processing

Hor. Scaling

Panorama

Peaking, CTI

Source Select

A/D Conversion

Color Decoder Frontend Sync

Soft Mix

CVBS

R/Cr

G/Y

B/Cb

FBL

ITU 656

CLK 656

(Y/C)

(OUT)

2 2

2 2 8

20.25 MHz

SCL SDA

Noise

Reduction

Mem. Controller

Field Memory

4:2:2 Format

Display Sync

D/A conversion

Oversampling

(9402/9432)

Digital Output

(9412/9442)

HOUT VOUT CLK27

Y Cr Cb

Digital 656 CLK 656

cybs1 cybs2 cybs3 cybs4 cybs5 cybs6 cybs7

min1

gin1 bin1

fbt1

rin2 gin2 bin2

fbt2

656clk 656io0 656io1 656io2 656io3 656io4 656io5 656io6 656io7

Soruce

Select

(1)

Soruce

Select

(16)

ADC1

(2)

ADC2

(2)

ADCR

(12)

ADCG

(13)

ADCB

(14)

ADCF

(15)

ITO656

Decoder

(41)

CLKF20

CLKB36

CLKF2PAD

CVBS Frontend

(4/4/6/7/8)

RBB Frontend

Clock generation

(9/10/11)

Soft-mix

(30)

Channel

mix (31)

Sample tate

Converter

(33/34)

Output

Data

Controller

(55)

Noise

reduction

(35/36/37/38)

eDRAM

Output

Sync

Controller

(40)

clkout vout hout

memory

controller

(39)

Noise

measurerrent

(32)

PRIMUS

VSP94x2A

free-running clocks

Iine-locked clocks

buffer

data

U,V

656hinf clkf20

656vln tclk tms adntd scl sda

test-controller,

memory hist

interface

(56)

Panorama Scaler

(42/43/44/57)

line locked or

free-running

ITU656 Encoder

(51)

Peaking/DCTI/delzly

(45/46/49/50)

Y DAC (52)

U DAC (53)

V DAC (54)

ayout

auout

avout

cybso1 cybso2 cybso3 reset h50 v50 xout xinv

4.2.2 DESCRIPTION

Integrated Video Matrix switch

- Up to seven CVBS inputs, up to two Y/C inputs,

- Up to three CVBS outputs (even when Y/C input)

- 9 bit amplitude resolution for CVBS, Y/C A/D converter

- AGC (Automatic Gain Control)

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Multi-standard colour decoder

- PAL/NTSC/SECAM including all substandards

- Automatic recognition of chroma standard

- Only one crystal necessary for all standards

RGB-FBL or YUV-H-V input

- 8 bit amplitude resolution for RGB or YUV

- 8 bit amplitude resolution for FBL or H

ITU656 support

- ITU656 output

- DS656 output (double-scan

656like output)

Noise reduction

- Motion adaptive temporal noise reduction

- Field-based temporal noise reduction for luminance and chrominance

- Different motion detectors for luminance and chrominance or identical

- Flexible programming of the temporal noise reduction parameters

- Automatic measurement of the noise level

Horizontal scaling of the 1fH signal

- Split-screen possible with additional PiP or Text processor

Flexible digital horizontal scaling of the 2fH signal (Not used in this chassis)

- Scaling factors: 3, ... [2 pixel resolution], ..., 0.75 including 16:9 compatibility

- 5 zone panorama generator

Embedded memory

- On-chip memory controller

- Embedded DRAM core for field memory

- SRAM for PAL/SECAM delay line

Data format 4:2:2 Flexible clock and synchronisation concept

- Horizontal line-locked or free-running mode

- Vertical locked or free-running mode

Scan-rate-conversion

- Simple interlaced modes (100/120 Hz): AABB, AAAA, BBBB (9402A/9412A only)

Flexible output sync controller

- Flexible positioning of the output signal

- Flexible programming of the output sync raster

Blank signal generation

Signal manipulations

- Still field

- Insertion of coloured background

- Windowing

- Vertical chrominance shift for improved VCR picture quality

Sharpness improvement (not used in this chassis)

- Digital color transition improvement (DCTI)

- Peaking (luminance)

1920 active pixel/per line in default configuration I2C-bus control (400 kHz)

- selectable I

C address

1.8V 5% and 3.3V 5% supply voltages P-MQFP-80 package

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4.2.3 PINNING Pin Name I/O Description Remarks

52 cvbs1 I CVBS input 53 cvbs2 I CVBS input 54 cvbs3 I CVBS input 55 cvbs4 I CVBS input or Y1 56 cvbs5 I CVBS input or C1 57 cvbs6 I CVBS input or Y2 58 cvbs7 I CVBS input or C2 63 Cvbso1 O CVBS output 1 62 Cvbso2 O CVBS output 2 61 Cvbso3 O CVBS output 3 70 Xin I Crystal connection 1 69 Xout O Crystal connection 2 23 Vout O Vertical output 17 Hout O Horizontal output

3 i656i7 I 656 input (MSB) 2 i656i6 I 656 input

1 i656i5 I 656 input 80 i656i4 I 656 input 79 i656i3 I 656 input 78 i656i2 I 656 input 77 i656i1 I 656 input 76 i656i0 I 656 input (LSB) 75 i656iclk I 656 input clock 39 Rin1 I R in 1 40 Gin1 I G in 1 41 Bin1 I B in 1 37 Fbl1 I Fast Blank input 1 46 Rin2 I R in 2 47 Gin2 I G in 2 48 Bin2 I B in 2 38 Fbl2 I Fast Blank input 2 14 V I Vertical pulse for RGB input

6 Sda I/O I2C ?Bus data 13 Scl I I2C ?Bus clock

7 Tms I Test mode select 19 Adr/tdi I I2C Address / test data in 24 Reset I Reset input Reset when low 27 Clkout O Output clock 27MHz 59 Vdd33c S Supply voltage CVBS 3.3V 60 Vss33c S Supply voltage CVBS 0V 50 Vddac1 S Supply voltage CVBS1 1.8V 51 Vssac1 S Supply voltage CVBS1 0V 64 Vddac2 S Supply voltage CVBS2 1.8V 65 Vssac2 S Supply voltage CVBS2 0V 44 Vdd33rgb S Supply voltage RGB 3.3V

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Pin Name I/O Description Remarks

45 Vss33rgb S Supply voltage RGB 0V 42 Vddargb S Supply voltage for RGB 1.8V 43 Vssargb S Supply voltage for RGB 0V 35 Vddafbl S Supply voltage for FBL 1.8V 36 Vssafbl S Supply voltage for FBL 0V 68 Vddapll S Supply voltage for PLL 1.8V 66 Vddd1 S Supply voltage for digital 1.8V digital 67 Vssdl S Supply voltage for digital 0V digital

5 Vddd2 S Supply voltage for digital 1.8V digital

4 Vssd2 S Supply voltage for digital 0V digital 28 Vddd3 S Supply voltage for DRAM 1.8V digital 29 Vssd3 S Supply voltage for digital 0V digital 34 Vddd4 S Supply voltage for digital 1.8V digital 33 Vssd4 S Supply voltage for digital 0V digital 72 Vddp1 S Supply voltage for digital 3.3V pad 73 Vssp1 S Supply voltage for digital 0V digital 12 Vddp2 S Supply voltage for digital 3.3V pad

11 Vssp2 S Supply voltage for digital 0V pad 25 Vddp3 S Supply voltage for digital 3.3V pad 26 Vssp3 S Supply voltage for digital 0V pad 71 Tclk I Testclock Connect to vss 18 H50 O Hout 50 Hz 20 V50 O Vout 50 Hz 32 656io0 I/O Digital input / output LSB 31 656io1 I/O Digital input / output 30 656io2 I/O Digital input / output 22 656io3 I/O Digital input / output 21 656io4 I/O Digital input / output 16 656io5 I/O Digital input / output 15 656io6 I/O Digital input / output 10 656io7 I/O Digital input / output

9 656clk I/O Digital input / output clock

74 656hin/clkf20 I/O Separate H input for 20.25 clock

output

8 656vin/blank I/O Separate V input for 656 / BLANK

output

49 Vssd5 S Supply voltage for digital 0V

4.3 DDP 3315C - DISPLAY AND DEFLECTION PROCESSOR The DDP 3315C is a mixed-signal single-chip digital display and deflection processor, designed

for high-quality backend applications in double scan and HDTV TV sets with 4:3 or 16:9 picture tubes. The interfaces qualify the IC to be combined with state of the art digital scan rate converters, as well as analog HDTV sources. The DDP 3315C contains the entire digital video component, deflection processing, and all analog interfaces to display the picture on a CRT.

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4.3.1 BLOCK DIAGRAM OF THE DDP 3315C

Clock

Generator

Input

Interface

Upcon-

Version/

Scaling

Matrix /

PFG /

NCE

Video

DAC

Analog

RGB

Switch

Tube

Control

H & V

H / V

dynamic

focus

Sawtooth /

Parabola

Generation

H-Drive

Generation

Display-

Freq.

Doubling

Sync

Pro-

cessing

EHT

Interface

General purpose

PWM

SDA SCL

LLC 27/32/ 54 MHz

Y / 656 YCrCb

CrCb 4:2:2 / 4:1:1

PWM 1/2 2H / 2V

(1H / 1V)

FIFO

Controlling

HFLB

DFVBL

PWMV

VPROT

HSAFETY

HOUT

E/W

VERT

VERT+

Output

Input

Sense Input

Security

Unit

Picture

Improve-

ment

R G B

Pr Y Pb FBL

RGB

FBL

SVM

analog

RGBMatrix

4.3.2 DESCRIPTION

Video Processing

- linear horizontal scaling (0.25 ... 4), as well as nonlinear horizontal scaling

panorama vision

- dynamic black level expander

- luma sharpness enhancement by dynamic peaking and luma transient improvement (LTI)

- color transient improvement (CTI)

- programmable RGB matrix

- black stretch, blue stretch, gamma correction via programmable Non-linear Colorspace Enhancer (NCE) on RGB

- two analog double scan inputs with fast blank (one RGB and one RGB/YC r C b /YP r P b selectable)

- average and peak beam current limiter

- automatic picture tube adjustment (cutoff, drive)

- histogram calculation

Deflection Processing

- scan velocity modulation output

- digital EHT compensation for vertical / east-west

- soft start/stop of horizontal-drive

- vertical angle and bow correction

- differential vertical outputs

- vertical zoom via deflection adjustment

- horizontal and vertical protection circuit

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- horizontal frequency for VGA/SVGA/1080I

- black switch off procedure

- supports horizontal and vertical dynamic focus

Miscellaneous

- selectable ITU-R 601 4:1:1 / 4:2:2 YC r C b input at 27/32 MHz or double scan ITU-R 656 input at 54 MHz line-locked clock

- crystal oscillator for horizontal safety

- picture frame generator

- hardware for simple 50/60 Hz to 100/120 Hz conversion (display frequency doubling)

- PQFP80 package, 5 V analog and 3.3 V digital supply

IC architecture

A clock generator converts different external line locked clock rates to a common internal sample rate of ~40 MHz, in order to provide a higher horizontal resolution. The input interface accepts ITU-R 601 at 27 or 32 MHz and ITU-R 656 with encoded or external sync at 54 MHz. The horizontal scaler is used for the scan rate conversion and for the nonlinear aspect ratio conversion as well. For the picture improvement, luma and chroma are processed separately. The luminance contrast ratio can be extended with a dynamic black level expander. In addition the frequency characteristic is improved by a transient improvement (LTI) and an adaptive dynamic peaking circuit. The peaking adapts to small AC amplitudes of high frequency parts, while large AC amplitudes are processed by the LTI. The chroma signal is enhanced with a transient improvement (CTI) with proper limitation to avoid wrong colours. The full programmable RGB matrix covers control of colour saturation and temperature. A digital white drive control is used to adjust the white balance and for the beam current limitation to prevent the CRT from over-load. A non-linear colorspace enhancer (NCE) for RGB gives full flexibility for any amplitude characteristic. High speed10-bit D/A converters are used to convert digital RGB to analog signals. Separate 9-bit D/A converters control brightness and cutoff. For picture tubes equipped with an appropriate yoke a scan velocity modulation (SVM) signal is calculated using a differentiated luminance signal.Two analog sources can be inserted in the main RGB, controlled by separate fastblank (FBL) signals. Contrast and brightness are adjusted separately from main RGB. One input is dedicated to RGB for on screen display (OSD). The second input is processed with an analog RGB matrix to insert YCbCr/YpbPr or RGB with control of colour saturation and programmable half contrast. The bandwidth of ~30MHz guarantees pixel based graphics to be displayed with full accuracy. All previously mentioned features are implemented in dedicated hardware. An integrated processor controls the horizontal and vertical deflection, tube measurement loops and beam current limitation. It is also used to calculate an amplitude histogram of the displayed image. The horizontal deflection is synchronized with two numeric phase-locked loops (PLL) to the incoming sync. One PLL generates the horizontal timing signals, e.g. blanking and key-clamping. The second PLL adjusts the phase of the horizontal drive pulse with a subpixel accuracy less than 1 ns. Vertical deflection and east/west correction waveforms are calculated as 6th order polynomials. This allows adjustment

of an east/west parabola with trapezoidal, pincushion and an upper/lower corner correction (even for real flat CRT

s), as well as a vertical sawtooth with linearity and S-correction. Scaling both waveforms, and limiting to fix amplitudes, performs a vertical zoom or compression of the displayed image. A field and line frequent control loop compensates picture content depending EHT distortions.

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