OTC 2003
CHASSIS : CP-830F
MODEL :
DTH-29U3
S/M No.TCN830FEF0
CP830F Service Manual
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CONTENTS
DOCUMENT HISTORY 5
1 MAIN FEATURES 5
1.1SPECIFICATIONS 5
1.1.1 GENERAL 5
1.1.2 EURO-SCART 1 (21 Pin) 5
1.1.3 EURO-SCART 2 (21 Pin) 6
1.2CHANNEL/FREQUENCY TABLE 7
1.3ATSS SORTING METHOD 10
1.3.1 GENERAL CASE 10
1.3.2 SPECIAL CASE 10
2 SAFETY INSTRUCTION 12
3 ALIGNMENT INSTRUCTIONS 13
3.1MICROCONTROLLER CONFIGURATION : SERVICE MODE 13
3.2SERVICE MODE NAVIGATION 13
3.3MICROCONTROLLER CONFIGURATION : OPTION BITS 13
3.3.1 OPTION 1 14
3.3.2 OPTION 2 14
3.4 TV SET ALIGNMENT 14
3.4.1 LOCAL OSCILLATOR ALIGNMENT 14
3.4.2 G2 ALIGNMENT 14
3.4.3 WHITE BALANCE 15
3.4.4 FOCUS 15
3.4.5 VERTICAL GEOMETRY 15
3.4.6 HORIZONTAL PICTURE CENTRING 15
3.4.7 EAST / WEST CORRECTION 15
3.4.8 AGC 16
4 IC DESCRIPTION 17
4.1TELETEXT DECODER WITH EMBEDDED 8-BIT CONTROLLER 17
4.1.1 BLOCK DIAGRAM OF THE SDA55XX 17
4.1.2 DESCRIPTION 17
4.1.3 IC MARKING AND VERSION 18
4.1.4 PINNING 18
4.2 VSP9412A - SCAN RATE CONVERTER INCLUDING MULTISTANDARD COLOUR
DECODER 19
4.2.1 BLOCK DIAGRAM OF THE VSP9412A 20
4.2.2 DESCRIPTION 20
4.2.3 PINNING 22
4.3DDP 3315C - DISPLAY AND DEFLECTION PROCESSOR 23
4.3.1 BLOCK DIAGRAM OF THE DDP 3315C 24
4.3.2 DESCRIPTION 24
4.3.3 PINNING 26
4.4MSP341X MULTISTANDARD SOUND PROCESSOR 28
4.4.1 BASIC FEATURES OF THE MSP 341X 28
4.4.1.1 Demodulator & NICAM Decoder Section 28
4.4.1.2 DSP-Section (Audio Baseband Processing) 29
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4.4.1.3 Analogue Section 29
4.4.1.4 NICAM & FM/AM-Mono 29
4.4.1.5 German 2-Carrier System (DUAL FM System) 29
4.5 TDA4470 - MULTISTANDARD VIDEO-IF AND QUASI PARALLEL SOUND PROCESSOR 32
4.5.1 DESCRIPTION 32
4.5.2 FEATURES 32
4.5.3 PINNING 32
4.5.4 BLOCK DIAGRAM 33
4.6TDA894XJ STEREO AUDIO AMPLIFIER 34
4.6.1 FEATURES 34
4.7TDA835XJ VERTICAL AMPLIFIER 35
4.7.1 TDA8357J 35
4.7.2 TDA8358J 37
4.8TDA6107Q 39
4.924C16 - 16 KB EEPROM 40
4.10 STR - F6654 41
4.10.1 GENERAL DESCRIPTION 41
4.10.2 FEATURES 41
4.10.3 BLOCK DIAGRAM 41
4.10.4 PIN DESCRIPTION 42
4.10.5 CONTROL PART - ELECTRICAL CHARACTERISTICS 42
4.10.6 MOSFET ELECTRICAL CHARACTERISTICS 43
5 CP830 CHASSIS DESCRIPTION 44
5.1BLOCK DIAGRAM 44
5.2IF SECTION 45
5.2.1 BLOCK DIAGRAM 45
5.2.2 VISION IF AMPLIFIER 46
5.2.3 TUNER-AND VIF-AGC 46
5.2.4 FPLL, VCO AND AFC 46
5.2.5 VIDEO DEMODULATION AND AMPLIFIER 47
5.2.6 SOUND IF AMPLIFIER AND SIF-AGC 47
5.2.7 QUASI-PARALLEL-SOUND (QPS) MIXER 47
5.2.8 STANDARD SWITCH 47
5.2.9 L
SWITCH 47
5.2.10 INTERNAL VOLTAGE STABILISER 47
5.3VIDEO / RGB 51
5.3.1 FRONT END 47
5.3.1.1 CVBS Front-End
47
5.3.1.2 Input Selector
48
5.3.1.3 Signal Levels And Gain Control 48
5.3.1.4 Synchronization 48
5.3.1.5 Chroma Decoder 48
5.3.1.6 Luminance Processing
48
5.3.1.7 RGB Front-End
48
5.3.1.8 Signal Processing 48
5.3.1.8.1 Horizontal Prescaler 48
5.3.1.8.2 Noise Reduction 49
5.3.1.8.3 Noise Measurement 49
5.3.1.8.4 Operation Modes 49
CP830F Service Manual
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5.3.1.8.5Digital 656 Output 49
5.3.2BACK END 49
5.3.2.1 Digital Input Interface 49
5.3.2.2 Horizontal Scaler 49
5.3.2.3 Luma Contrast and Brightness 49
5.3.2.4 Black Level Expander/Compressor (BLEC) 49
5.3.2.5 Luma Sharpness Enhancer (LSE) 50
5.3.2.6 Dynamic Peaking 50
5.3.2.7 Luma Transient Improvement (LTI) 50
5.3.2.8 Mixing of Dynamic Peaking and LTI 50
5.3.2.9 Chroma Transient Improvement 50
5.3.2.10 Analog Back End 51
5.3.2.11 Analog RGB Insertion 51
5.3.2.12 CRT Measurement and Control 51
5.3.2.13 Synchronization and Deflection 52
5.3.2.14 EHT Compensation 52
5.4MICROCONTROLLER 52
5.4.1MICROCONTROLLER FEATURES 52
5.4.2ACQUISITION FEATURES 53
5.4.3PORTS 53
5.4.4
-CONTROLLER I/O PIN CONFIGURATION AND FUNCTION TABLE 53
5.4.5TUNING 54
5.4.6AUTOMATIC PICTURE FORMAT SWITCHING 54
5.4.6.1 WSS Data 54
5.4.6.2 SCART Pin 8 Data (Slow Switching) 55
5.4.6.3 Picture Format Description 55
5.4.6.3.1 16:9 CRT 55
5.4.6.3.2 4:3 CRT 56
5.4.7EXTERNAL SOURCE CONTROL LOGIC 57
5.4.8OVER CURRENT PROTECTION 58
5.5TELETEXT DISPLAY 58
5.6SOUND PROCESSING
59
5.6.1ANALOGUE SOUND IF - INPUT SECTION
59
5.6.2QUADRATURE MIXERS
59
5.6.3PHASE AND AM DISCRIMINATION
59
5.6.4NICAM DECODER 60
5.6.5DSP SECTION
60
5.6.6SOUND MODE SWITCHING
60
5.7SOUND AMPLIFICATION
60
5.7.1POWER AMPLIFIER
60
5.7.2MODE SELECTION 60
5.8VERTICAL DEFLECTION
61
5.8.1FLYBACK VOLTAGE
61
5.8.2PROTECTION 61
5.8.3GUARD CIRCUIT 61
5.8.4DAMPING RESISTOR 61
5.8.5EAST-WEST AMPLIFIER (TDA8358J ONLY)
61
5.9POWER SUPPLY (STR F6654)
61
5.9.1STR-F6654 GENERAL DESCRIPTION 61
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5.9.2POWER SUPPLY PRIMARY PART OPERATIONS 61
5.9.2.1 Start -up Circuit: VIN
62
5.9.2.2 STR-F6654 Oscillating Operation
63
5.9.2.3 STR-F6654 Protection Circuits 64
5.10 TV START-UP, TV NORMAL RUN AND STAND BY MODE OPERATIONS 65
5.10.1 TV START-UP OPERATIONS 65
5.10.1.1 Schematic Diagram For Start-Up Operations 65
5.10.1.2 TV Start-Up And Microcontroller Initialisation 65
5.10.2 TV NORMAL RUN AND STAND-BY MODE OPERATIONS 67
5.10.2.1 TV On Normal Run Mode 67
5.10.2.2 TV Set On Stand-By Mode 70
6 SERVICE PARTS LIST 72
6.1 DTH-29U7ZL 72
7 EXPLODED VIEW 88
7.1 DTH-29U7 88
8 PRINTED CIRCULT BOARD 93
8.1 MAIN PCB 93
8.2 CRT PCB 94
8.3 PFC PCB 95
9 SCHEMATIC DIAGRAM 96
CP830F Service Manual
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DOCUMENT HISTORY
VERSION DATE COMMENTS
V1.00 18/11/02 Creation of document (Author M Hearn) for project CP830 100Hz TV.
V1.01 22/11/02 Reformatting of the document, plus insertion of Document History section
1 MAIN FEATURES
1.1 SPECIFICATIONS
1.1.1 GENERAL
TV standard PAL - SECAM B/G D/K, PAL I/I, SECAM L/L
Colour system Tuner PAL, SECAM
AV PAL, SECAM, PAL 60, NTSC M, NTSC 4.43
Sound system NICAM B/G, I, D/K, L,
FM 2Carrier B/G, D/K
Power 29"(4:3) Real Flat :84W approx.
consumption
Sound Output Power 7W x 2 (at 60% mod, 10%THD)
Speaker 12W 8 ohm x2
Teletext system 9 pages memory FASTEXT (FLOF or TOP)
Aerial input 75 ohm unbalanced
Channel coverage Off-air channels, S-cable channels and hyperband
Tuning system frequency synthesiser tuning system
Visual screen size
29" : 68cm
Channel indication On Screen Display
Program Selection 100 programmes
Aux. terminal EURO-SCART 1 : Audio / Video In and Out, R/G/B
In, Slow and Fast switching.
EURO-SCART 2 : Audio / Video In and Out, SVHS In.
AV3 : Audio-Video Jack on front of cabinet.
Headphone jack (3.5 mm) on front of cabinet
SVHS3 (option) : Jack on front of cabinet ? sound
input common with AV3.
Remote Control R-46G22
Unit
1.1.2 EURO-SCART 1 (21 Pin)
Pin Signal Description Matching value
1 Audio Output Right 0.5 Vrms, Impedance < 1 k , ( RF 54% Mod )
2 Audio Input Right 0.5 Vrms, Impedance > 10 k
3 Audio Output Left 0.5 Vrms, Impedance < 1 k , ( RF 54% Mod )
4 Audio Earth
5 Blue Earth
6 Audio Input Left 0.5 Vrms, Impedance > 10 k
7 Blue Input 0.7 Vpp 0.1V, Impedance 75
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1.1.3 EURO-SCART 2 (21 Pin)
9 Green Earth
10 N.C.
11 Green Input 0.7 Vpp 0.1V, Impedance 75
12 N.C.
13 Red Earth
14 Blanking Earth
15 Red Input 0.7 Vpp 0.1V, Impedance 75
16 Fast Switching 0 to 0.4V : Logic 0 , 1 to 3V : Logic 1 , Impedance 75
17 Video Out Earth
18 Video In Earth
19 Video Output 1 Vpp 3dB, Impedance 75
20 Video Input 1 Vpp 3dB, Impedance 75
21 Common Earth
Pin Signal Description Matching value
1 Audio Output Right 0.5 Vrms, Impedance < 1 k ( RF 54% Mod )
2 Audio Input Right 0.5 Vrms, Impedance > 10 k
3 Audio Output Left 0.5 Vrms, Impedance < 1 k , ( RF 54% Mod )
4 Audio Earth
5 Earth
6 Audio Input Left 0.5 Vrms, Impedance > 10 k
7 N.C.
8 N.C.
9 N.C.
10 N.C.
11 N.C.
12 N.C.
13 Earth
14 Earth
15 Chroma Input 3dB for a luminance signal of 1 Vpp
16 N.C.
17 Earth
18 Video In Earth
19 Video Output 1 Vpp 3dB, Impedance 75 ( Monitor output )
20 Video Input, Y In. 1 Vpp 3dB, Impedance 75
21 Common Earth
2468101214161820
13579111315171921
CP830F Service Manual
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1.2 CHANNEL/FREQUENCY TABLE
CHANNEL EUROPE CCIR FRANCE GB(IRELAND) EAST OIRT
C01 46.25 - 45.75 49.75
C02 48.25 55.75 (L ) 53.75 59.25
C03 55.25 60.5 (L ) 61.75 77.25
C04 62.25 63.75 (L ) 175.25 85.25
C05 175.25 176.00 183.25 93.25
C06 182.25 184.00 191.25 175.25
C07 189.25 192.00 199.25 183.25
C08 196.25 200.00 207.25 191.25
C09 203.25 208.00 215.25 199.25
C10 210.25 216.00 223.25 207.25
C11 217.25 189.25 (LUX) 231.25 215.25
C12 224.25 69.25 (L ) 239.25 223.25
C13 53.75 76.25 (L ) 247.25 C14 - 83.25 (L ) 49.75 -
C15 82.25 90.25 57.75 C16 - 97.25 65.75 C17 183.75 - 77.75 C18 192.25 - 85.75 C19 201.25 - - C20 - - - C21 471.25 471.25 471.25 471.25
C22 479.25 479.25 479.25 479.25
C23 487.25 487.25 487.25 487.25
C24 495.25 495.25 495.25 495.25
C25 503.25 503.25 503.25503.25
C26 511.25 511.25 511.25 511.25
C27 519.25 519.25 519.25 519.25
C28 527.25 527.25 527.25 527.25
C29 535.25 535.25 535.25 535.25
C30 543.25 543.25 543.25 543.25
C31 551.25 551.25 551.25 551.25
C32 559.25 559.25 559.25 559.25
C33 567.25 567.25 567.25 567.25
C34 575.25 575.25 575.25 575.25
C35 583.25 583.25 583.25 583.25
C36 591.25 591.25 591.25 591.25
C37 599.25 599.25 599.25 599.25
C38 607.25 607.25 607.25 607.25
C39 615.25 615.25 615.25 615.25
C40 623.25 623.25 623.25 623.25
C41 631.25 631.25 631.25 631.25
C42 639.25 639.25 639.25 639.25
C43 647.25 647.25 647.25 647.25
C44 655.25 655.25 655.25 655.25
C45 663.25 663.25 663.25 663.25
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CHANNEL EUROPE CCIR FRANCE GB(IRELAND) EAST OIRT
C46 671.25 671.25 671.25 671.25
C47 679.25 679.25 679.25 679.25
C48 687.25 687.25 687.25 687.25
C49 695.25 695.25 695.25 695.25
C50 703.25 703.25 703.25 703.25
C51 711.25 711.25 711.25 711.25
C52 719.25 719.25 719.25 719.25
C53 727.25 727.25 727.25 727.25
C54 735.25 735.25 735.25 735.25
C55 743.25 743.25 743.25 743.25
C56 751.25 751.25 751.25 751.25
C57 759.25 759.25 759.25 759.25
C58 767.25 767.25 767.25 767.25
C59 775.25 775.25 775.25 775.25
C60 783.25 783.25 783.25 783.25
C61 791.25 791.25 791.25 791.25
C62 799.25 799.25 799.25 799.25
C63 807.25 807.25 807.25 807.25
C64 815.25 815.25 815.25 815.25
C65 823.25 823.25 823.25 823.25
C66 831.25 831.25 831.25 831.25
C67 839.25 839.25 839.25 839.25
C68 847.25 847.25 847.25 847.25
C69 855.25 855.25 855.25 855.25
C70 863.25 863.25 863.25 863.25
C71 69.25 - - C72 76.25 - - C73 83.25 - - C74 90.25 - - C75 97.25 - - C76 59.25 - - C77 93.25 - - S01 105.25 104.75 103.25 105.25
S02 112.25 116.75 111.25 112.25
S03 119.25 128.75 119.25 119.25
S04 126.25 140.75 127.25 126.25
S05 133.25 152.75 135.25 133.25
S06 140.25 164.75 143.25 140.25
S07 147.25 176.75 151.25 147.25
S08 154.25 188.75 159.25 154.25
S09 161.25 200.75 167.25 161.25
S10 168.25 212.75 - 168.25
S11 231.25 224.75 - 231.25
S12 238.25 236.75 - 238.25
S13 245.25 248.75 255.25 245.25
S14 252.25 260.75 263.25 252.25
S15 259.25 272.75 271.25 259.25
S16 266.25 284.75 279.25 266.25
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CHANNEL EUROPE CCIR FRANCE GB(IRELAND) EAST OIRT
S17 273.25 296.75 287.25 273.25
S18 280.25 136.00 295.25 280.25
S19 287.25 160.00 303.25 287.25
S20 294.25 - - 294.25
S21 303.25 303.25 - 303.25
S22 311.25 311.25 311.25 311.25
S23 319.25 319.25 319.25 319.25
S24 327.25 327.25 327.25 327.25
S25 335.25 335.25 335.25 335.25
S26 343.25 343.25 343.25 343.25
S27 351.25 351.25 351.25 351.25
S28 359.25 359.25 359.25 359.25
S29 367.25 367.25 367.25 367.25
S30 375.25 375.25 375.25 375.25
S31 383.25 383.25 383.25 383.25
S32 391.25 391.25 391.25 391.25
S33 399.25 399.25 399.25 399.25
S34 407.25 407.25 407.25 407.25
S35 415.25 415.25 415.25 415.25
S36 423.25 423.25 423.25 423.25
S37 431.25 431.25 431.25 431.25
S38 439.25 439.25 439.25 439.25
S39 447.25 447.25 447.25 447.25
S40 455.25 455.25 455.25 455.25
S41 463.25 463.25 463.25 463.25
CP830F Service Manual
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1.3 ATSS SORTING METHOD
The TV set sweeps all the TV bands from beginning of VHF to end of UHF. The TV controlling software for each
program checks if a VPS CNI code is transmitted (this system exists for German, Swiss and Austrian transmissions).
If no VPS CNI code is found, then the system checks if a CNI code is transmitted as part of the teletext transmission
( Packet 8/30 format 1 and format 2). If such a code ( VPS or teletext ) is found and if this code is in the ATSS list, the
program is automatically named.
If the transmission does not have VPS CNI, and no teletext service is available, then there is no possibility of the
program being automatically named.
The programs found are then sorted in 4 groups :
Group I : It contains all the programs from the selected country and named by the TV controlling software. Within this
group the sorting order is fixed by the ATSS list.
Group II : It contains all the programs with a strong signal strength which are not listed in group I.
Group III : It contains all the programs with a weak signal strength which are not listed in group I.
Group IV : If two or more programs with the same code are found, only the strongest ( or if they have the same level
the one with the lowest frequency) is listed in group I, II or III. The others are listed in group IV.
1.3.1 GENERAL CASE 1.3.2 SPECIAL CASE
Program
Group Skip
number
1
2 Group I
...
n
n+1
... Group II
m
m+1
... Group III
p
p+1
... Group IV
q
q+1
... not used
99
0
Program
Group Skip
number
1
... Group II
m
m+1
... Group III
p
p+1
... Group IV
q
q+1
... not used
99
0
Special case : Country selection = Others
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Note : If two programs with the same name but a different code are found these two programs
are listed in group I, II or III .
The sorting order within group II, III, and IV is based on the channel frequency. The program
with the lowest frequency is allocated the first rank in its group, and so forth until the last
program of the group which has the highest frequency.
Special case : France
If France is selected, the TV controlling software first sweeps all TV bands with France system
selected ( positive video modulation) and then a second time with Europe system selected (
negative video modulation).
Special case : Switzerland
If Switzerland is selected the TV controlling software first sweeps all TV bands with Europe
system selected (negative video modulation) and then a second time with France system
selected ( positive video modulation).
Special case : GB
Note for satellite receiver users : Before starting ATSS turn on your satellite receiver and tune to
SKY NEWS .
If GB is selected the TV controlling software seeks for programs only in UHF ( C21 to C70 ).
The
sorting order is :
1 - BBC1
2 - BBC2
3 - ITV
4 - CH4
5 - CH5
6 ? NEWS (Sky News)
If two or more
identical programs ( same name but different code e.g. BBC1 and BBC1
Scotland ) are found the following programs in the list will be shifted up. (1 - BBC1, 2 - BBC1, 3
BBC2, 4 - ITV, 5 - CH4, 6 - CH5, 7 - NEWS, ..)
If one of the programs above is not found, the associated program number remains empty (
freq.=467.25 MHz - Skip selected - no name ? system = GB).
example A : 1 - BBC1, 2 - BBC2, 3 - ITV, 4 - -----, 5 - CH5, 6 - NEWS, ...
example B ( if 2 BBC1 found ) : 1 - BBC1, 2 - BBC1, 3 - BBC2, 4 - ITV, 5 - -----, 6 - CH5, 7 NEWS, ...
CP830F Service Manual
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2 SAFETY INSTRUCTION
WARNING: Only competent service personnel may carry out work involving the testing or repair
of this equipment.
X-RAY RADIATION PRECAUTION
1. Excessive high voltage can produce potentially hazardous X-RAY RADIATION. To avoid
such hazards, the high voltage must not exceed the specified limit. The nominal value of the
high
voltage of this receiver is 25-26 KV (20
-21 ) or 26 KV (25 - 28 ) at max beam current. The
high
voltage must not, under any circumstances, exceed 27.5 KV (20
), 29KV (21 ), 29.5 KV (25 )
or
30 KV (28
). Each time a receiver requires servicing, the high voltage should be checked. It is
important to use an accurate and reliable high voltage meter.
2. The only source of X-RAY Radiation in this TV receiver is the picture tube. For continued
X-RAY RADIATION protection, the replacement tube must be exactly the same type tube as
specified in the parts list.
SAFETY PRECAUTION
Potentials of high voltage are present when this receiver is operating. Operation of the receiver
outside the cabinet or with the back board removed involves a shock hazard from the receiver.
Servicing should not be attempted by anyone who is not thoroughly familiar with the
precautions
necessary when working on high voltage equipment.
Discharge the high potential of the picture tube before handling the tube. The picture tube is
highly evacuated and if broken, glass fragments will be violently expelled.
If any Fuse in this TV receiver is blown, replace it with the FUSE specified in the Replacement
Parts List.
When replacing a high wattage resistor (metal oxide film resistor) in the circuit board, keep the
resistor 10 mm away from circuit board.
Keep wires away from high voltage or high temperature components.
This receiver must operate under AC 230 volts, 5O Hz. NEVER connect to a DC supply or any
other voltage or frequency.
PRODUCT SAFETY NOTICE
Many electrical and mechanical parts in this equipment have special safety-related
characteristics. These characteristics are often passed unnoticed by a visual inspection and the
X-RAY RADIATION protection afforded by them cannot necessarily be obtained by using
replacement components rated for higher voltage, wattage, etc. Replacement parts which have
these special safety characteristics are identified in this manual and its supplements, electrical
components having such features are identified by designated symbol on the parts list. Before
replacing any of these components, read the parts list in this manual carefully. The use of
substitutes replacement parts which do not have the same safety characteristics as specified in
the parts list may create X-RAY Radiation.
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3 ALIGNMENT INSTRUCTIONS
3.1MICROCONTROLLER CONFIGURATION : SERVICE MODE
To switch the TV set into service mode please see instruction below.
1 - Select PR. number 91
2 - Adjust sharpness to minimum and exit all menus.
3 - Within 2 seconds press the key sequence : RED - GREEN - menu
The software version is displayed beside the word Service, e.g.
SERVICE V1.00 .
To exit SERVICE menu press menu key or Std By key.
3.2SERVICE MODE NAVIGATION
Pr Up/Down remote keys : cycle through the service items available.
Vol -/+ remote keys : Dec./Increment the values within range - Cycle trough option bits.
OK key : Toggle bits in option byte
Order Item Default setting
1 HOR CEN
2 RED GAIN
3 GRN GAIN
4 BLUE GAIN
5 RED BIAS
6 GRN BIAS
7 AGC LEVEL
8 G2 - SCREEN
9AFT
10 OPTION1
11 OPTION2
12 PARABOLA
13 HOR WIDTH
14 CORNER T
15 CORNER B
16 HOR. PARAL
17 V. LINEAR
18 EW TRAPEZ
19 S CORRECT
20 VERT CENT
21 VERT SIZE
3.3 MICROCONTROLLER CONFIGURATION : OPTION BITS
There are two option bytes available (16 bits in all). These option bits are available from Service
mode. First find the OPTION1 or OPTION2 control, and then use the Volume PLUS/MINUS
buttons on the remote control keypad to locate the bits, and OK key to toggle them. The table
below shows the two option bytes available;
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3.3.1 OPTION 1
B7 B6 B5 B4 B3 B2 B1 B0
TOP FASTEXT TUBE Headphone Dolby SVHS Tuner options
1 text (FLOF) 4:3 Volume/Balance Virtual 3 00 = Philips
OFF OFF control OFF OFF disable 01 = not used
TOP FASTEXT TUBE Headphone Dolby SVHS 10 = ALPS
0 text ON (FLOF) 16:9 Volume/Balance Virtual 3 11 = PARTSNIC
ON control ON ON enable (DW)
3.3.2 OPTION 2
B7 B6 B5 B4 B3 B2 B1 B0
1 Fixed to ‘0’ JVC remote control AVL control OFF PICTURE TILT ON Program list enabled
See table below.
0 Daewoo Remote control AVL control ON PICTURE TILT OFF Program list disabled
Beam Current
Tube (mA) B2 B1 B0
Nominal Max
0.95 1.10 0 0 0
1.00 1.15 0 0 1
4/3 - Super Flat, 16/9 – Super Flat 1.05 1.20 0 1 0
1.10 1.25 0 1 1
1.20 1.35 1 0 0
1.25 1.40 1 0 1
4/3 - Real Flat, 16/9 – Real Flat 1.30 1.45 1 1 0
1.35 1.50 1 1 1
All values modified are immediately memorised in eeprom.
3.4 TV SET ALIGNMENT
3.4.1 LOCAL OSCILLATOR ALIGNMENT
Tune a colour bar pattern. The frequency of the signal carrier must be accurate ( Max +/- 10KHz deviation from the
nominal channel frequency).
Find
AFT item in service mode.
Adjust the coil L150 to bring the cursor to central position : 32.
3.4.2 G2 ALIGNMENT
- Tune a colour bar pattern.
- Find the
G2 - SCREEN item in service mode.
- Adjust screen volume ( on FBT ) to bring the cursor to central position : 32.
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3.4.3 WHITE BALANCE
- Select a dark picture and adjust RED BIAS and GRN BIAS to the desired colour temperature.
- Select a bright picture and adjust RED, GRN and BLUE GAIN to the desired colour temperature.
3.4.4 FOCUS
Adjust the Focus volume ( on FBT ) to have the best resolution on screen.
3.4.5 VERTICAL GEOMETRY
Adjust V. LINEAR (linearity), S CORRECT (S. Correction), VERT SIZE (Vertical amplitude), VERT CENT (vertical
centring) to compensate for vertical distortion.
3.4.6 HORIZONTAL PICTURE CENTRING
Adjust HOR CEN (Horizontal centre) to have the picture in the centre of the screen.
3.4.7 EAST / WEST CORRECTION
Adjust the PARABOLA, HOR WIDTH, CORNER, HOR PARAL, EW TRAPEZ, to compensate for
geometrical distortion.
HOR PARAL
HOR WIDTH
adjust for 93% overscan.
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PARABOLA
CORNER B & CORNER T
EW TRAPEZ
3.4.8 AGC
- Make sure option bits are correct for the tuner fitted on the chassis (See above how to change option bits).
- Adjust the antenna signal level at 64 dB
V± 2
- Tune a colour bar pattern.
- Find the
AGC item in service mode.
- Press the key
OK on the remote keypad and wait until AGC level stabilise to the optimum value.
- Alternatively, use
Vol Up/Dwn keys to adjust manually to the desired Tuner Take Over Point (TOP).
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4 IC DESCRIPTION
4.1 TELETEXT DECODER WITH EMBEDDED 8-BIT CONTROLLER
TVText Pro is a 8-bit controller based on a enhanced 8051 core with embedded teletext, On screen Display and TV
controller functions.
4.1.1 BLOCK DIAGRAM OF THE SDA55XX
4.1.2 DESCRIPTION
The SDA 55xx is a single chip teletext decoder for decoding World System Teletext data as well as Video
Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling (WSS) data used for PAL
plus transmissions (line 23).
The device provides an integrated general-purpose, fully 8051-compatible Microcontroller with television specific
hardware features. The microcontroller has been enhanced to provide powerful features such as memory banking,
data pointers and additional interrupts etc.
The on-chip display unit for displaying Level 1.5 teletext data is also used for customer defined on-screen displays.
Internal XRAM consists of 16 Kbytes. Device has an internal ROM of 128 Kbytes.
The SDA 55xx supports a wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS,
PDC, TTX and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 TTX
data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented characters (DRCS).
The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does most of the
internal TTX acquisition processing, transfers data to/from external memory interface and receives/transmits data via I
2 C-firmware user-interface. The slicer combined with dedicated hardware stores TTX data in a VBI buffer of 1
Kilobyte. The Microcontroller firmware performs all the acquisition tasks (hamming-and parity-checks, page search
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and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext-features
like Packet-26-handling, FLOF, TOP and list-pages.
4.1.3 IC MARKING AND VERSION
Chassis IC marking OSD languages ATSS countries Text
CP830 BULGARIAN, Austria, Belgium,
CZECH, GERMAN, Switzerland, Czech
DANISH, SPANISH, Republic, Germany,
FRENCH, FINNISH, Denmark, Spain, PAN-EUROPEAN
ENGLISH, GREEK, France, Finland, GB, LATIN, CYRILLIC,
HUNGARIAN, Greece, Hungary, Italy, GREEK.
ITALIAN, Ireland, Norway,
NORWEGIAN, Netherlands, Portugal,
DUTCH, POLISH, Poland, Sweden,
ROMANIAN, Slovak Republic,
RUSSIAN, Others
SWEDISH,
SLOVAKIAN.
4.1.4 PINNING
PSDIP 52-pin Pin Name Type Short Description
1 SCL IN/OUT Software driven I2C bus Clock line
2 SDA IN/OUT Software driven I2C bus Data line
3 S/SW2 IN Slow switching control for SCART 2.
4 S/SW2 IN (See Microcontroller I/O pin configuration)
5 S/SW1 IN Slow switching control for SCART 1.
6 S/SW1 IN (See Microcontroller I/O pin configuration)
7 n.c.
8 Reset Out OUT Driven by controlling software to reset video IC s.
9 VDD2.5 IN Supply voltage 2.5V
10 VSS IN Ground (0V)
11 VDD3.3 IN Input/Output 3.3V
12 CVBS IN CVBS input for the acquisition circuit
13 VDDA2.5 IN Supply voltage for analog components
14 VSSA IN Ground for analog components
15 AFT IN ADC input, AFT input
16 AGC IN ADC input, for AGC alignment only
17 KEY IN ADC input, local key sensing
18 OCP IN Switch Off the set when the voltage goes below a trigger level
19 HS IN Horizontal sync for OSD/Txt synchronisation
20 VS IN Vertical sync for OSD/Txt synchronisation
21 MODESW OUT High : Negative video modulation (B, G, D, K,I)
Low : Positive video modulation (L / L )
22 L/L OUT High : L , Low : L
23 IR IN Remote control signal input
24 INT IN Interrupt input from audio processor
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PSDIP 52-pin Pin Name Type Short Description
25 n.c.
26 n.c.
27 n.c.
28 n.c.
29 VSS IN Ground (0V)
30 VDD3.3 IN Input/Output 3.3V
31 n.c.
32 n.c.
33 RESET IN A low level on this pin resets the device.
34 XTAL2 OUT Output of the inverting oscillator amplifier
35 XTAL1 IN Input of the inverting oscillator amplifier
36 VSSA IN Ground for analog components
37 VDDA2.5 IN Supply voltage for analog components
38 R OUT OUT Red output
39 G OUT OUT Green output
40 B OUT OUT Blue output
41 BK OUT OUT Blanking
42 VDD2.5 IN Supply voltage 2.5V
43 VSS IN Ground (0V)
44 VDD3.3 IN Input / Output 3.3V
45 n.c.
46 n.c.
47 n.c.
48 AGC OUT Tuner TOP adjustment
49 n.c.
50 n.c.
51 LED OUT High : Green LED, Low : Red LED
52 POWER OUT High : SMPS ON, Low : SMPS in stand by
4.2 VSP9412A - SCAN RATE CONVERTER INCLUDING MULTISTANDARD COLOUR DECODER
The VSP 94x2A comprises all main functions of a digital featurebox in one monolithic IC.
The device comprises a digital multistandard color decoder, a RGB interface with fast-blank capability (SCART), digital
ITU656 input, scaling units including panorama, embedded DRAM for upconversion, picture improvements, temporal
noise reduction as well as A/D and D/A converter.
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4.2.1 BLOCK DIAGRAM OF THE VSP9412A
Data
Acquisition
Input
Processing
Clock
Generation
I
2
C
Memory Output
Processing
Display
Processing
Hor. Scaling
Panorama
Peaking, CTI
Source Select
A/D Conversion
Color Decoder
Frontend Sync
Soft Mix
CVBS
CVBS
R/Cr
G/Y
B/Cb
FBL
ITU 656
CLK 656
(Y/C)
(OUT)
7
3
2
2
2
2
8
20.25 MHz
SCL SDA
Noise
Reduction
Mem. Controller
Field Memory
4:2:2 Format
Display Sync
D/A conversion
Oversampling
(9402/9432)
Digital Output
(9412/9442)
HOUT
VOUT
CLK27
Y
Cr
Cb
Digital 656
CLK 656
B
cybs1
cybs2
cybs3
cybs4
cybs5
cybs6
cybs7
min1
gin1
bin1
fbt1
rin2
gin2
bin2
fbt2
656clk
656io0
656io1
656io2
656io3
656io4
656io5
656io6
656io7
Soruce
Select
(1)
Soruce
Select
(16)
ADC1
(2)
ADC2
(2)
ADCR
(12)
ADCG
(13)
ADCB
(14)
ADCF
(15)
ITO656
Decoder
(41)
CLKF20
CLKB36
CLKF2PAD
CVBS Frontend
(4/4/6/7/8)
RBB Frontend
Clock generation
(9/10/11)
Soft-mix
(30)
Channel
mix
(31)
Sample tate
Converter
(33/34)
Output
Data
Controller
(55)
Noise
reduction
(35/36/37/38)
eDRAM
Output
Sync
Controller
(40)
clkout
vout
hout
memory
controller
(39)
Noise
measurerrent
(32)
PRIMUS
VSP94x2A
free-running
clocks
Iine-locked
clocks
buffer
buffer
data
data
Y
Y
U,V
U,V
656hinf
clkf20
656vln tclk tms adntd scl sda
test-controller,
memory hist
PC
interface
(56)
Panorama Scaler
(42/43/44/57)
line locked or
free-running
ITU656 Encoder
(51)
Peaking/DCTI/delzly
(45/46/49/50)
Y DAC (52)
U DAC (53)
V DAC (54)
ayout
auout
avout
8
cybso1 cybso2 cybso3 reset h50 v50 xout xinv
4.2.2 DESCRIPTION
Integrated Video Matrix switch
- Up to seven CVBS inputs, up to two Y/C inputs,
- Up to three CVBS outputs (even when Y/C input)
- 9 bit amplitude resolution for CVBS, Y/C A/D converter
- AGC (Automatic Gain Control)
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Multi-standard colour decoder
- PAL/NTSC/SECAM including all substandards
- Automatic recognition of chroma standard
- Only one crystal necessary for all standards
RGB-FBL or YUV-H-V input
- 8 bit amplitude resolution for RGB or YUV
- 8 bit amplitude resolution for FBL or H
ITU656 support
- ITU656 output
- DS656 output (double-scan
656like output)
Noise reduction
- Motion adaptive temporal noise reduction
- Field-based temporal noise reduction for luminance and chrominance
- Different motion detectors for luminance and chrominance or identical
- Flexible programming of the temporal noise reduction parameters
- Automatic measurement of the noise level
Horizontal scaling of the 1fH signal
- Split-screen possible with additional PiP or Text processor
Flexible digital horizontal scaling of the 2fH signal (Not used in this chassis)
- Scaling factors: 3, ... [2 pixel resolution], ..., 0.75 including 16:9 compatibility
- 5 zone panorama generator
Embedded memory
- On-chip memory controller
- Embedded DRAM core for field memory
- SRAM for PAL/SECAM delay line
Data format 4:2:2
Flexible clock and synchronisation concept
- Horizontal line-locked or free-running mode
- Vertical locked or free-running mode
Scan-rate-conversion
- Simple interlaced modes (100/120 Hz): AABB, AAAA, BBBB (9402A/9412A only)
Flexible output sync controller
- Flexible positioning of the output signal
- Flexible programming of the output sync raster
-
Blank signal generation
Signal manipulations
- Still field
- Insertion of coloured background
- Windowing
- Vertical chrominance shift for improved VCR picture quality
Sharpness improvement (not used in this chassis)
- Digital color transition improvement (DCTI)
- Peaking (luminance)
1920 active pixel/per line in default configuration
I2C-bus control (400 kHz)
- selectable I
C address
1.8V 5% and 3.3V 5% supply voltages
P-MQFP-80 package
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4.2.3 PINNING
Pin Name I/O Description Remarks
52 cvbs1 I CVBS input
53 cvbs2 I CVBS input
54 cvbs3 I CVBS input
55 cvbs4 I CVBS input or Y1
56 cvbs5 I CVBS input or C1
57 cvbs6 I CVBS input or Y2
58 cvbs7 I CVBS input or C2
63 Cvbso1 O CVBS output 1
62 Cvbso2 O CVBS output 2
61 Cvbso3 O CVBS output 3
70 Xin I Crystal connection 1
69 Xout O Crystal connection 2
23 Vout O Vertical output
17 Hout O Horizontal output
3 i656i7 I 656 input (MSB)
2 i656i6 I 656 input
1 i656i5 I 656 input
80 i656i4 I 656 input
79 i656i3 I 656 input
78 i656i2 I 656 input
77 i656i1 I 656 input
76 i656i0 I 656 input (LSB)
75 i656iclk I 656 input clock
39 Rin1 I R in 1
40 Gin1 I G in 1
41 Bin1 I B in 1
37 Fbl1 I Fast Blank input 1
46 Rin2 I R in 2
47 Gin2 I G in 2
48 Bin2 I B in 2
38 Fbl2 I Fast Blank input 2
14 V I Vertical pulse for RGB input
6 Sda I/O I2C ?Bus data
13 Scl I I2C ?Bus clock
7 Tms I Test mode select
19 Adr/tdi I I2C Address / test data in
24 Reset I Reset input Reset when low
27 Clkout O Output clock 27MHz
59 Vdd33c S Supply voltage CVBS 3.3V
60 Vss33c S Supply voltage CVBS 0V
50 Vddac1 S Supply voltage CVBS1 1.8V
51 Vssac1 S Supply voltage CVBS1 0V
64 Vddac2 S Supply voltage CVBS2 1.8V
65 Vssac2 S Supply voltage CVBS2 0V
44 Vdd33rgb S Supply voltage RGB 3.3V
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Pin Name I/O Description Remarks
45 Vss33rgb S Supply voltage RGB 0V
42 Vddargb S Supply voltage for RGB 1.8V
43 Vssargb S Supply voltage for RGB 0V
35 Vddafbl S Supply voltage for FBL 1.8V
36 Vssafbl S Supply voltage for FBL 0V
68 Vddapll S Supply voltage for PLL 1.8V
66 Vddd1 S Supply voltage for digital 1.8V digital
67 Vssdl S Supply voltage for digital 0V digital
5 Vddd2 S Supply voltage for digital 1.8V digital
4 Vssd2 S Supply voltage for digital 0V digital
28 Vddd3 S Supply voltage for DRAM 1.8V digital
29 Vssd3 S Supply voltage for digital 0V digital
34 Vddd4 S Supply voltage for digital 1.8V digital
33 Vssd4 S Supply voltage for digital 0V digital
72 Vddp1 S Supply voltage for digital 3.3V pad
73 Vssp1 S Supply voltage for digital 0V digital
12 Vddp2 S Supply voltage for digital 3.3V pad
11 Vssp2 S Supply voltage for digital 0V pad
25 Vddp3 S Supply voltage for digital 3.3V pad
26 Vssp3 S Supply voltage for digital 0V pad
71 Tclk I Testclock Connect to vss
18 H50 O Hout 50 Hz
20 V50 O Vout 50 Hz
32 656io0 I/O Digital input / output LSB
31 656io1 I/O Digital input / output
30 656io2 I/O Digital input / output
22 656io3 I/O Digital input / output
21 656io4 I/O Digital input / output
16 656io5 I/O Digital input / output
15 656io6 I/O Digital input / output
10 656io7 I/O Digital input / output
9 656clk I/O Digital input / output clock
74 656hin/clkf20 I/O Separate H input for 20.25 clock
output
8 656vin/blank I/O Separate V input for 656 / BLANK
output
49 Vssd5 S Supply voltage for digital 0V
4.3 DDP 3315C - DISPLAY AND DEFLECTION PROCESSOR
The DDP 3315C is a mixed-signal single-chip digital display and deflection processor, designed
for high-quality backend applications in double scan and HDTV TV sets with 4:3 or 16:9 picture
tubes. The interfaces qualify the IC to be combined with state of the art digital scan rate
converters, as well as analog HDTV sources. The DDP 3315C contains the entire digital video
component, deflection processing, and all analog interfaces to display the picture on a CRT.
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4.3.1 BLOCK DIAGRAM OF THE DDP 3315C
Clock
Generator
Input
Interface
Upcon-
Version/
Scaling
Matrix /
PFG /
NCE
Video
DAC
Analog
RGB
Switch
Tube
Control
H & V
H / V
V
V
H
HH
EW
V
H
EW
V
dynamic
focus
Sawtooth /
Parabola
Generation
H-Drive
Generation
Display-
Freq.
Doubling
Sync
Pro-
cessing
EHT
I
2
C
Interface
General
purpose
PWM
SDA
SCL
LLC
27/32/
54 MHz
Y /
656 YCrCb
CrCb
4:2:2 /
4:1:1
PWM 1/2 2H / 2V
(1H / 1V)
FIFO
Controlling
HFLB
DFVBL
PWMV
VPROT
HSAFETY
HOUT
E/W
VERT
VERT+
Output
Input
Sense
Input
Security
Unit
Picture
Improve-
ment
Y
Cb
Cr
Y
Cb
Cr
Y
Cb
Cr
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
R
G
B
Pr
Y
Pb
FBL
RGB
FBL
SVM
SVM
analog
RGBMatrix
4.3.2 DESCRIPTION
Video Processing
- linear horizontal scaling (0.25 ... 4), as well as nonlinear horizontal scaling
panorama vision
- dynamic black level expander
- luma sharpness enhancement by dynamic peaking and luma transient improvement (LTI)
- color transient improvement (CTI)
- programmable RGB matrix
- black stretch, blue stretch, gamma correction via programmable Non-linear Colorspace Enhancer (NCE) on RGB
- two analog double scan inputs with fast blank (one RGB and one RGB/YC r C b /YP r P b selectable)
- average and peak beam current limiter
- automatic picture tube adjustment (cutoff, drive)
- histogram calculation
Deflection Processing
- scan velocity modulation output
- digital EHT compensation for vertical / east-west
- soft start/stop of horizontal-drive
- vertical angle and bow correction
- differential vertical outputs
- vertical zoom via deflection adjustment
- horizontal and vertical protection circuit
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- horizontal frequency for VGA/SVGA/1080I
- black switch off procedure
- supports horizontal and vertical dynamic focus
Miscellaneous
- selectable ITU-R 601 4:1:1 / 4:2:2 YC r C b input at 27/32 MHz or double scan ITU-R 656 input at 54 MHz line-locked
clock
- crystal oscillator for horizontal safety
- picture frame generator
- hardware for simple 50/60 Hz to 100/120 Hz conversion (display frequency doubling)
- PQFP80 package, 5 V analog and 3.3 V digital supply
IC architecture
A clock generator converts different external line locked clock rates to a common internal sample rate of ~40 MHz, in
order to provide a higher horizontal resolution. The input interface accepts ITU-R 601 at 27 or 32 MHz and ITU-R 656
with encoded or external sync at 54 MHz. The horizontal scaler is used for the scan rate conversion and for the
nonlinear aspect ratio conversion as well.
For the picture improvement, luma and chroma are processed separately. The luminance contrast ratio can be
extended with a dynamic black level expander. In addition the frequency characteristic is improved by a transient
improvement (LTI) and an adaptive dynamic peaking circuit. The peaking adapts to small AC amplitudes of high
frequency parts, while large AC amplitudes are processed by the LTI. The chroma signal is enhanced with a transient
improvement (CTI) with proper limitation to avoid wrong colours. The full programmable RGB matrix covers control of
colour saturation and temperature. A digital white drive control is used to adjust the white balance and for the beam
current limitation to prevent the CRT from over-load. A non-linear colorspace enhancer (NCE) for RGB gives full
flexibility for any amplitude characteristic. High speed10-bit D/A converters are used to convert digital RGB to analog
signals. Separate 9-bit D/A converters control brightness and cutoff. For picture tubes equipped with an appropriate
yoke a scan velocity modulation (SVM) signal is calculated using a differentiated luminance signal.Two analog sources
can be inserted in the main RGB, controlled by separate fastblank (FBL) signals. Contrast and brightness are adjusted
separately from main RGB. One input is dedicated to RGB for on screen display (OSD). The second input is
processed with an analog RGB matrix to insert YCbCr/YpbPr or RGB with control of colour saturation and
programmable half contrast. The bandwidth of ~30MHz guarantees pixel based graphics to be displayed with full
accuracy. All previously mentioned features are implemented in dedicated hardware. An integrated processor controls
the horizontal and vertical deflection, tube measurement loops and beam current limitation. It is also used to calculate
an amplitude histogram of the displayed image.
The horizontal deflection is synchronized with two numeric phase-locked loops (PLL) to the incoming sync. One PLL
generates the horizontal timing signals, e.g. blanking and key-clamping. The second PLL adjusts the phase of the
horizontal drive pulse with a subpixel accuracy less than 1 ns.
Vertical deflection and east/west correction waveforms are calculated as 6th order polynomials. This allows adjustment
of an east/west parabola with trapezoidal, pincushion and an upper/lower corner correction (even for real flat CRT
s),
as well as a vertical sawtooth with linearity and S-correction. Scaling both waveforms, and limiting to fix amplitudes,
performs a vertical zoom or compression of the displayed image. A field and line frequent control loop compensates
picture content depending EHT distortions.
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4.3.3 PINNING
Pin No. Pin Name I/O Description Remarks
1 Y6 I Picture bus Luma
2 Y7 I Picture bus Luma (MSB)
3 656EN I Enable 656 input mode
4 LLC2 I System clock input
5 HS I Horizontal Sync Input
6 VS I Vertical Sync Input
7 FREQSEL I Selection of H-Drive Frequency Range
8 CM1 I Clock select 1
9 CM0 I Clock select 0
10 VS2 I Additionnal VSYNC input
11 XTAL2 O Analog Crystal Output
12 XTAL1 I Analog Crystal Input
13 NC
14 GNDP S Ground, Output Pin Driver
15 VSUPP S Supply voltage, Output Pin Driver
16 FIFORRD O FIFO Read Counter Reset
17 FIFORD O FIFO Read Enable
18 FIFOWR O FIFO Write Enable
19 FIFORWR O FIFO Write Counter Reset
20 PWM1 O I2C controlled DAC
21 PWM2 O I2C controlled DAC / Tilt output
22 PWMV O I2C controlled DAC
23 HOUT O Horizontal drive output
24 VSTBY S Standby supply voltage, Hout generation
25 DFVBL O Dynamic focus blanking / horizontal DAF
pulse
26 HSYNC O Horizontal sync output
27 VSYNC O Vertical sync output
28 NC
29 ASG1 S Analog Shield Ground
30 HFBL I Horizontal flyback input
31 SAFETY I Safety input
32 VPROT I Vertical protection input
33 RSW2 O Range Switch2, measurement ADC
34 RSW1 I/O Range Switch1, measurement ADC
35 SENSE I Sense ADC input
36 GNDM S Ground, MADC input
37 VERT+ O Differential Vertical Sawtooth Output
38 VERT- O Differential Vertical Sawtooth Output
39 EW O East / West Correction Output
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Pin No. Pin Name I/O Description Remarks
40 NC
41 SVM O Scan Velocity Modulator
42 ROUT O Analog Output Red
43 GOUT O Analog Output Green
44 BUT O Analog Output Blue
45 GNDO S Ground, analog Back End
46 XREF I Reference Input for RGB DAC s
47 VSUPO S Supply voltage, Analog Back End
48 VRD/BCS I DAC Reference, Beam current safety
49 AGND S Analog Ground for Analog Matrix
50 FBLIN1 I Fast Blank1input
51 RIN1 I Analog Red1input
52 GIN1 I Analog Green1 input
53 BIN1 I Analog Blue1input
54 FBLIN2 I Fast Blank2 input
55 RIN2 / PR I Analog Red2 input / PR Input
56 GIN2 / Y I Analog Green2 input / Y Input
57 BIN2/ PB I Analog Blue2 input / PB Input
58 ASG2 S Analog Shield Ground
59 HCS I Half Contrast
60 NC
61 TEST I
62 RESQ I Reset Input, active low
63 SCL I/O I2C Bus clock
64 SDA I/O I2C Bus data
65 C0 I Picture Bus Chroma (LSB)
66 C1 I Picture Bus Chroma
67 C2 I Picture Bus Chroma
68 C3 I Picture Bus Chroma
69 C4 I Picture Bus Chroma
70 C5 I Picture Bus Chroma
71 C6 I Picture Bus Chroma
72 C7 I Picture Bus Chroma (MSB)
73 VSUPD S Supply voltage, Digital Circuitry
74 GNDD S Ground, Digital Circuitry
75 Y0 I Picture Bus Luma (LSB)
76 Y1 I Picture Bus Luma
77 Y2 I Picture Bus Luma
78 Y3 I Picture Bus Luma
79 Y4 I Picture Bus Luma
80 Y5 I Picture Bus Luma
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4.4 MSP341X MULTISTANDARD SOUND PROCESSOR
The MSP 341x is designed as a single-chip Multistandard Sound Processor for applications in analogue and digital TV
sets, video recorders, and PC cards.
The MSP3411 has all functions of MSP3410 with the addition of a virtual surround sound features.
Surround sound can be reproduced to a certain extent with two loudspeakers. The MSP3411 includes virtualizer
algorithm
3D Panorama which has been approved by the Dolby laboratories for compliance with the Virtual Dolby
Surround
technology. In addition, the MSP3411 includes Micronas Panorama algorithm.
MSP 341x features:
sound IF input
No external filters required
Stereo baseband input via integrated AD converters
Two pairs of DA converters
Two carrier FM or NICAM processing
AVC : Automatic Volume Correction
Bass, treble, volume processing
Full SCART in/out matrix without restrictions
Improved FM-identification
Demodulator short programming
Auto-detection for terrestrial TV - sound standards
Precise bit-error rate indication
Automatic switching from NICAM to FM/AM or vice versa
Improved NICAM synchronisation algorithm
Improved carrier mute algorithm
Improved AM-demodulation
Reduction of necessary controlling
Less external components
4.4.1 BASIC FEATURES OF THE MSP 341X
4.4.1.1 Demodulator & NICAM Decoder Section
The MSP 341x is designed to simultaneously perform digital demodulation and decoding of NICAM-coded TV stereo
sound, as well as demodulation of FM or AM mono TV sound. Alternatively, two carrier FM systems according to the
German terrestrial specs can be processed with the MSP 341x.
The MSP 341x facilitates profitable multistandard capability, offering the following advantages:
Automatic Gain Control (AGC) for analogue input: input range: 0.10 - 3 Vpp
integrated A/D converter for sound-IF input
all demodulation and filtering is performed on chip and is individually programmable
easy realisation of all digital NICAM standards (B/G, I, L and D/K)
FM-demodulation of all terrestrial standards (include identification decoding)
no external filter hardware is required
only one crystal clock (18.432 MHz) is necessary
high deviation FM-mono mode (max. deviation: approx. 360 kHz)
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4.4.1.2 DSP-Section (Audio Baseband Processing)
flexible selection of audio sources to be processed
performance of terrestrial de-emphasise systems (FM, NICAM)
digitally performed FM-identification decoding and de-matrixing
digital baseband processing: volume, bass, treble
simple controlling of volume, bass, treble
4.4.1.3 Analogue Section
two selectable analogue pairs of audio baseband input (= two SCART inputs) input level: <2 V RMS, input
impedance: >25
one selectable analogue mono input (i.e. AM sound): Not used in this chassis
two high-quality A/D converters, S/N-Ratio: >85 dB
20 Hz to 20 kHz bandwidth for SCART-to-SCART copy facilities
loudspeaker: one pair of four-fold oversampled D/A converters. Output level per channel: max.
1.4 VRMS output resistance: max. 5 k
. S/N-ratio: >85 dB at maximum volume max. noise voltage in mute mode:
< 10
(BW: 20 Hz... 16 kHz)
one pair of four-fold oversampled D/A converters supplying a pair of SCART-outputs. Output level per channel:
max. 2 V RMS, output resistance: max. 0.5 k
, S/N-Ratio: >85 dB (20 Hz... 16 kHz)
4.4.1.4 NICAM & FM/AM-Mono
According to the British, Scandinavian, Spanish, and French TV-standards, high-quality stereo sound is transmitted
digitally. The systems allow two high-quality digital sound channels to be added to the already existing FM/AM-channel.
The sound coding follows the format of the socalled Near Instantaneous Companding System (NICAM 728).
Transmission is performed using Differential Quadrature Phase Shift Keying (DQPSK. Table below offers an overview of
the modulation parameters.
In the case of NICAM/FM (AM) mode, there are three different audio channels available: NICAM A, NICAM B, and
FM/AM-mono. NICAM A and B may belong either to a stereo or to a dual language transmission. Information about
operation mode and about the quality of the NICAM signal can be read by the controlling software via the control bus. In
the case of low quality (high bit error rate), the controlling software may decide to switch to the analogue FM/AM-mono
sound.
Alternatively, an automatic NICAM-FM/AM switching may be applied.
4.4.1.5 German 2-Carrier System (DUAL FM System)
Since September 1981, stereo and dual sound programs have been transmitted in Germany using the 2-carrier system.
Sound transmission consists of the already existing first sound carrier and a second sound carrier additionally
containing an identification signal. More details of this standard are given in Tables below. For D/K very similar system
is used.
TV standards
TV system Position of sound carrier (MHz) Sound modulation Colour system Country
B/G 5.5 / 5.7421875 FM Stereo PAL GERMANY
B/G 5.5 / 5.85 FM-Mono / NICAM PAL Scandinavia,
Spain
L 6.5 / 5.85 AM - Mono / NICAM SECAM-L France
I 6.0 / 6.552 FM-Mono / NICAM PAL UK
D/K 6.5 / 6.2578125 D/K1 FM Stereo SECAM- USSR
6.5 / 6.7421875 D/K2 FM-Mono / NICAM East Hungary
6.5 / 5.85 D/K-NICAM
CP830F Service Manual
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ADC
De-
modulator
Pre-
processing
Prescale
Prescale
DAC
Source Select
Loud-
speaker
Sound
Processing
Headphone
Sound
Processing
DAC
LoudspeakerSound IF 1
Sound IF 2
I
2
S2
I
2
S1
SCART 1
SCART 2
SCART 3
SCART 4
MONO
Architecture of MSP341x
Subwoofer
Headphone
I
2
S
SCART1
SCART2
DAC
SCART
Output
Select
DAC
ADC
DSP
SCART
Input
Select
Pin connections and short description
Pin No. Pin Name Type Short description
1 NC Not Connected
2 NC Not Connected
3 NC Not Connected
4 INT Out Interrupt out
5 MUTE Out Mute out
6 ADR_SEL In I2C bus Address select
7 STANDBYQ In Standby ( Low-active)
8 NC Not Connected
9 I2C_CL In / Out I2C Clock
10 I2C_DA In / Out I2C data
11 NC Not Connected
12 NC Not Connected
13 NC Not Connected
14 NC Not Connected
15 NC Not Connected
16 NC Not Connected
17 NC Not Connected
18 DVSUP Digital power supply +5V
19 DVSS Digital Ground
20 NC Not Connected
21 NC Not Connected
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Pin No. Pin Name Type Short description
22 NC Not Connected
23 NC Not Connected
24 RESETQ In Power-On-reset
25 DACA_R Out Headphone out right
26 DACA_L Out Headphone out left
27 VREF2 Reference ground 2 high voltage part
28 DACM_R Out Loudspeaker out Right
29 DACM_L Out Loudspeaker out Left
30 NC Not Connected
31 NC Not Connected
32 NC Not Connected
33 SC2_OUT_R Out Scart output 2 right
34 SC2_OUT_L Out Scart output 2 left
35 VREF1 Reference ground 1 high voltage part
36 SC1_OUT_R Out Scart output 1, right
37 SC1_OUT_L Out Scart output 1, left
38 CAPL_A Volume capacitor AUX
39 AHVSUP Analog power supply 8.0V
40 CAPL_M Volume capacitor MAIN
41 AHVSS Analog ground
42 AGNDC Analog reference voltage high voltage part
43 NC Not Connected
44 NC Not Connected
45 NC Not Connected
46 SC3_IN_L In Scart input 3 in, left
47 SC3_IN_R In Scart input 3 in, right
48 ASG2 Analog Shield Ground 2
49 SC2_IN_L In Scart input 2 in, left
50 SC2_IN_R In Scart input 2 in, right
51 ASG1 Analog Shield Ground 1
52 SC1_IN_L In Scart input 1 in, left
53 SC1_IN_R In Scart input 1 in, right
54 VREFTOP Reference voltage IF A/D converter
55 MONO_IN In Mono input
56 AVSS Analog ground
57 AVSUP Analog power supply
58 ANA_IN1+ In IF input 1
59 ANA_IN1- In IF common
60 NC Not Connected
61 TESTEN In Test pin
62 XTAL_IN In Crystal oscillator
63 XTAL_OUT Out Crystal oscillator
64 NC Test pin
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4.5 TDA4470 - MULTISTANDARD VIDEO-IF AND QUASI PARALLEL SOUND PROCESSOR
4.5.1 DESCRIPTION
The TDA4470 is an integrated bipolar circuit for multi-standard video/sound IF (VIF/SIF) signal processing in TV/VCR
and multimedia applications. The circuit processes all TV video IF signals with negative modulation (e.g., B/G
standard), positive modulation (e.g., L standard) and the AM, FM/NICAM sound IF signals.
4.5.2 FEATURES
- 5 V supply voltage; low power consumption.
- Active carrier generation by FPLL principle (frequency-phase-locked-loop) for true synchronous demodulation.
- Very linear video demodulation, good pulse response and excellent intermodulation figures.
- VCO circuit operates at picture carrier frequency, the VCO frequency is switchable for L
-mode
- Alignment-free AFC without external reference circuit, polarity of the AFC curve is switchable.
- VIF-AGC for negative modulated signals (peak sync. detection) and for positive modulation (peak white/black level
detector).
- Tuner AGC with adjustable take over point.
- Alignment-free quasi parallel sound (QPS) mixer for FM/NICAM sound IF signals.
- Intercarrier output signal is gain controlled (necessary for digital sound processing).
- Complete alignment-free AM demodulator with gain controlled AF output.
- Separate SIF-AGC with average detection
- Two independent SIF inputs
-Parallel operation of the AM demodulator and QPS mixer (for NICAM-L stereo sound).
4.5.3 PINNING
Pin Symbol Function
1, 2 Vi, SIF1 SIF1 input (symmetrical)
3 VSW Input selector switch
4, 9, 16 GND Ground
5 VAGC SIF - AGC (time constant)
6, 7 Vi, VIF VIF input (symmetrical)
8 CAGC VIF - AGC (time constant)
10 RTOP Take Over Point, tuner AGC
11 Itun Tuner AGC output current
12 VO, VID Video output
13 VSW Standard switch
14 VSW L switch
15 Cbl Black level capacitor
17 Cref Internal reference voltage
18 LF Loop Filter
19 VSW AFC switch
20, 21 VVCO VCO circuit
22 VAFC AFC output
23 VS Supply voltage
24 VO, FM Intercarrier output
25 VO, AM AF output - AM sound
26 Rcomp Offset compensation
27, 28 Vi, SIF2 SIF2 input (symmetrical)
CP830F Service Manual
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4.5.4 BLOCK DIAGRAM
Offset
26 18 20
21 14
VCO
l' switch
VCO
Control
phase shift
FPLL
VIF amp
Loop
filter
comp.
(optional)
+
4,9,16AM det.
FM det.
25
24
17
C
ref
23
13
22
19
6
7
8
15
11
10
27
28
3
1
2
SIF 1
C
AGC
5
Standard
Video det.
VIF
C
AGC
C
BL
AGC
(VIF)
Tuner
AGC
AGC
(SIF)
Tuner
SIF 2
SIF input
switch
SIF amp
Take over
point
Video
AFC
AFC
switch
AFC
Supply
Standard
switch
V
AF
(AM)
Intercarrier
(FM/NICAM)
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4.6 TDA894XJ STEREO AUDIO AMPLIFIER
The TDA 8944J ( TDA 8946J ) is a dual-channel audio power amplifier with an output power of 2 x 7 W ( 2 x 15 W ) at
an 8 ? load and a 12 V supply. The circuit contains two Bridges Tied Load (BTL) amplifiers with an all-NPN output stage
and standby/mute logic. The TDA8944J comes in a 17-pin DIL power package.
4.6.1 FEATURES
Few external components
Fixed gain
Standby and mute mode
No on/off switching plops
low standby current
High supply voltage ripple rejection
Outputs short-circuit protected to ground, supply and across the load
Thermally protected
Pin description
Pin Symbol Description
1 OUT1- negative loudspeaker terminal 1
2 GND1 ground channel 1
3 Vcc1 supply voltage channel 1
4 OUT1+ positive loudspeaker terminal 1
5 n.c. not connected
6 IN1+ positive input1
7 n.c. not connected
8 IN1- negative input1
9 IN2- negative input2
10 MODE mode selection input
11 SVR half supply voltage decoupling (ripple rejection)
12 IN2+ positive input2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
OUT1-
GND1
Vcc1
OUT1+
n.c.
IN1+
n.c.
IN1-
IN2-
MODE
SVR
IN2+
n.c
OUT2+
GND2
Vcc2
OUT2-
TDA8944J
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4.7 TDA835XJ VERTICAL AMPLIFIER
The TDA835xJ are power circuit for use in 90
and 110 colour deflection systems for field frequencies of 25 to 200Hz
and 16/9 picture tubes. The circuit provides a DC driven vertical deflection output circuit, operating as a highly efficient
class G system. Due to the full bridge output circuit the deflection coils can be DC coupled.
The IC is constructed in a Low Voltage DMOS process that combines Bipolar, CMOS and DMOS devices. MOS
transistors are used in the output stage because of the absence of second breakdown.
4.7.1 TDA8357J
Features :
Few external components
Highly efficient fully DC-coupled vertical output bridge circuit
Short rise and fall time of the vertical flyback switch
Guard circuit
Temperature (thermal) protection
High EMC because of common mode inputs
V
CC1
V
CC
10
11
12
9
IN2-
TDA8944J
IN2+
MODE
SVR
STANDBY/
MUTE LOGIC
316
IN1-
IN1+
8
6
1
4
17
14
215
MBK933
OUT1-
OUT1+
OUT2-
OUT2+
GND2
GND1
Block Diagram TDA8944J
SHORT CIRCUIT
AND
TEMPERATURE
PROTECTION
V
CC2
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Vi(pos)
Vi(neg)
Vp
Vc
B
GND
Vflb
Vc
A
Vo(guard)
V
M
1
2
3
4
5
6
7
8
9
TDA8357J
Pin Symbol Description
1 Vi(pos) input voltage (positive)
2 Vi(neg) input voltage (negative)
3 Vp supply voltage
4 VOB output voltage B
5 GND ground
6 Vflb flyback supply voltage
7 VOA output voltage A
8 VO(guard) guard output voltage
9 VM input measuring resistor
Pinning
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4.7.2 TDA8358J
An East-West output stage is provided that is able to sink current from the diode modulator circuit.
Features :
Few external components
Highly efficient fully DC-coupled vertical output bridge circuit
Short rise and fall time of the vertical flyback switch
Guard circuit
Temperature (thermal) protection
High EMC because of common mode inputs
East-West output stage
V
0(guard)
V
p
63
7
2
+V
i(diff)
V
i(sb)
-V
i(diff)
+V
i(diff)
V
i(sb)
-V
i(diff)
V
i(neg)
1
input/
feedback
V
i(neg)
V
i(pos)
4
9
8
5
guard
V
flb
V
oA
V
M
V
oB
GND
EW
GND
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Vi(pos)
Vi(neg)
Vp
Vc
B
VEw
GND
v
GNDEw
Vo
Ew
Vflb
Vo
A
Vo(guard)
V
M
lcomp
1
2
3
4
5
6
7
8
9
10
11
12
13
TDA8357J
I
comp
V
0(guard)
V
p
93
M5
D3
D2
10
M2
M4
M1
5
2
+V
i(diff)
V
i(sb)
-V
i(diff)
+V
i(diff)
V
i(sb)
-V
i(diff)
I
iEW(top)
I
iEW(bot)
V
i(neg)
1
input/
feedback
V
i(neg)
V
i(pos)
M3
M6
8
4
7
6
12
D1
1113
comp
guard
V
flb
V
oA
V
M
V
oB
V
oEW
GND
EW
GND
V
CP830F Service Manual
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4.8 TDA6107Q
The TDA6107Q includes three video output amplifiers in one plastic DIL-Bent-SIL 9-pin medium
power package, using high voltage DMOS technology, and is intended to drive the three
cathodes of a colour CRT directly. To obtain maximum performance, the amplifier should be
used with black-current control.
Features
Typical bandwidth of 5.5 MHz for an output signal of 60 Vpp
High slew rate of 900V/
No external components required
Very simple application
Single supply voltage of 200V
Internal reference voltage of 2.5 V
Fixed gain of 50.
Black-current stabilisation (BCS) circuit
Thermal protection
Pin description
Pin Symbol Description
1 Vi(1) inverting input 1
2 Vi(2) inverting input 2
3 Vi(3) inverting input 3
4 GND ground (fin)
5 Iom black current measurement output
6 VDD supply voltage
7 VOC(3) cathode output 3
8 VOC(2) cathode output 2
9 VOC(1) cathode output 1
Vi(1)
GND
i(2)
V
Vi(3)
1
2
3
4
om
I
VDD
Voc(3)
Voc(2)
Voc(1)
5
TDA6107Q
6
7
8
9
CP830F Service Manual
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Block diagram TDA6107Q
4.9 24C16 - 16 KB EEPROM
Features :
16 Kbit serial I2C bus EEPROM
Single supply voltage : 4.5 V to 5.5 V
1 Million Erase/Write cycles (minimum)
40 year data retention (minimum)
Pin description
Pin No. Name Description
1, 2, 3 E0, E1, E2 Device address ? not used
5 SDA Serial Data/Address Input/Output
6 SCL Serial clock
7 WC Write control
8 Vcc Supply voltage
4 Vss Ground
The memory device is compatible with the I2C memory standard. This is a two wire serial interface that uses a bidirectional data bus and serial clock. The memory carries a built-in 4-bit unique device type identifier code (1010) in
accordance with the I2C bus definition.
Serial Clock (SCL)
The SCL input is used to strobe all data in and out of the memory.
Serial Data (SDA)
The SDA pin is bi-directional, and is used to transfer data in or out of the memory
CP830F Service Manual
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4.10 STR - F6654
4.10.1 GENERAL DESCRIPTION
The STR-F6654 is an hybrid IC with a build-in MOSFET and control IC, designed for flyback converter type switch
mode power supply applications.
4.10.2 FEATURES
Small SIP fully isolated moulded 5 pins package
Many protection functions :
Pulse-by-pulse overcurrent protection (OCP)
Overvoltage protection with latch mode (OVP)
Thermal protection with latch mode (TSD)
4.10.3 BLOCK DIAGRAM
CP830F Service Manual
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4.10.4 PIN DESCRIPTION
PIN NAME SYMBOL DESCRIPTION
1 Overcurrent feedback O.C. Input of over current detection signal and feedback signal
P/E.B.
2 Source S Mosfet source
3 Drain D Mosfet drain
4 Supply VIN Input of power supply for control circuit
5 Ground GND Ground
4.10.5 CONTROL PART - ELECTRICAL CHARACTERISTICS
DESCRIPTION
IC PIN
SYMBOL
RATING
UNIT
NUMBER MIN. TYPE MAX
Operation start voltage 4-5 VIN (on) 14.4 16 17.6 V
Operation stop voltage 4-5 VIN (off) 9 10 111 V
Circuit current in operation 4-5 IIN (on) - - 30 mA
Circ. current in non-operation 4-5 IIN (off) - - 100
Maximum off time - TOFF 45 - 55 SEC
(max)
Minimum time for input of 1-5 TTH (2) - - 1.0
SEC
quaxi resonant signals
Minimum off time - TOFF - - 1.5
SEC
(min)
O.C.P./F.B. terminal 1-5 VTH (1) 0.68 0.73 0.78 V
threshold voltage 1
O.C.P./F.B. terminal 1-5 VTH (2) 1.3 1.45 1.6 V
threshold voltage 2
O.C.P./F.B. terminal 1-2 IOCP/FB 1.2 1.35 1.5 mA
extraction current
OVP operation voltage 4-5 VIN 20.5 22.5 24.5 V
(OVP)
Latch circuit sustaining 4-5 IIN (H) - - 400
voltage
Latch circuit release voltage 4-5 VIN (Loff) 6.6 - 8.4 V
Thermal shutdown operating - TJ (TSD) 140 - - 0C
temperature
CP830F Service Manual
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4.10.6 MOSFET ELECTRICAL CHARACTERISTICS
DESCRIPTION
IC PIN
SYMBOL
RATING
NUMBER MIN. TYPE MAX
UNIT
Drain-to-source break down voltage 3-2 VDSS 650 - - V
Drain leakage current 3-2 IDSS - - 300
On-resistance 3-2 RDS (on) - - 1.95
Switching time 3-2 tf - - 250 noec
Thermal resistance - OCH - F - - 0.95 0C/W
CP830F Service Manual
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5 CP830 CHASSIS DESCRIPTION
5.1 BLOCK DIAGRAM
CP830F Service Manual
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5.2 IF SECTION
5.2.1 BLOCK DIAGRAM
CP830F Service Manual
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5.2.2 VISION IF AMPLIFIER
The video IF signal (VIF) is fed through a SAW filter to the differential input (Pin 6-7) of the VIF
amplifier. This amplifier consists of three AC-coupled amplifier stages. Each differential amplifier
is gain controlled by the automatic gain control (VIF-AGC). The output signal of the VIF amplifier
is applied to the FPLL carrier generation and the video demodulator.
SAW filters
Ref. Standard Features
K3953M B/G - D/K - I - L/L
IF filter for video application
TV IF filter with Nyquist slopes at
33.9 MHz and 38.9 MHz
Constant group delay
K9650M B/G - D/K - I - L/L
IF filter for audio application
TV IF audio filter with two channels
Channel 1 (L ) with one pass band
for sound carrier at 40.40 MHz
Channel 2 ( L, D/K, I, B/G) with one
pass band for sound carriers
between 32.40 MHz and 33.40 MHz
5.2.3 TUNER-AND VIF-AGC
At Pin 8, the VIF-AGC charges/discharges the AGC capacitor to generate a control voltage for setting the gain of the
VIF amplifier and tuner in order to keep the video output signal at a constant level. Therefore, in the case of all negative
modulated signals (e.g., B/G standard) the sync. level of the demodulated video signal is the criterion for a fast
charge/discharge of the AGC capacitor. For positive modulation (e.g., L standard) the peak white level of video signal
controls the charge current. In order to reduce reaction time for positive modulation, where a large time constant is
needed, an additional black level detector controls the discharge current in the event of decreasing VIF input signal.
The control voltage (AGC voltage at Pin 8) is transferred to an internal control signal, and is fed to the tuner AGC to
generate the tuner AGC current at Pin 11 (open collector output). The take over point of the tuner AGC is adjusted at
Pin 10 by an external dc voltage from microprocessor. A PWM output from microcontroller is low pass filtered for this
AGC control. See also
AGC adjustment for details on how to align TOP in SERVICE mode.
5.2.4 FPLL, VCO AND AFC
The FPLL circuit (frequency phase locked loop) consists of a frequency and phase detector to generate the control
voltage for the VCO tuning. In the locked mode, the VCO is controlled by the phase detector and in unlocked mode, the
frequency detector is superimposed. The VCO operates with an external resonance circuit (L and C parallel) and is
controlled by internal varicaps. The VCO control voltage is also converted to a current and represents the AFC output
signal at Pin 22. At the AFC switch (Pin 19) three operating conditions of the AFC are possible: AFC curve
rising or
falling and AFC off . A practicable VCO alignment of the external coil is the adjustment to zero AFC output current
at Pin 22. At center frequency the AFC output current is equal to zero. Furthermore, at Pin 14, the VCO center
frequency can be switched for setting to the required L
value (L standard). The optional potentiometer at Pin 26
allows an offset compensation of the VCO phase for improved sound quality (fine adjustment). Without a potentiometer
(open circuit at Pin 26), this offset compensation is not active. The oscillator signal passes a phase shifter and supplies
the in-phase signal (?
) and the quadrature signal (9? )of the generated picture carrier.
CP830F Service Manual
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5.2.5 VIDEO DEMODULATION AND AMPLIFIER
The video IF signal, which is applied from the gain controlled IF amplifier, is multiplied with the inphase component of
the VCO signal. The video demodulator is designed for low distortion and large bandwidth. The demodulator output
signal passes an integrated low pass filter for attenuation of the residual vision carrier and is fed to the video amplifier.
The video amplifier is realised by an operational amplifier with internal feedback and 8 MHz bandwidth (?3 dB). A
standard dependent dc level shift in this stage delivers the same sync. level for positive and negative modulation. An
additional noise clipping is provided. The video signal is fed to VIF-AGC and to the video output buffer. This amplifier
with a 6 dB gain offers easy adaptation of the sound trap. For nominal video IF modulation the video output signal at
Pin 12 is 2 Vpp.
5.2.6 SOUND IF AMPLIFIER AND SIF-AGC
The SIF amplifier is nearly identical with the 3-stage VIF amplifier. Only the first amplifier stage exists twice and is
switchable by a control voltage at Pin 3. Therefore with a minimal external expense it is possible to switch between two
different SAW filters. Both SIF inputs features excellent cross-talk attenuation and an input impedance which is
independent from the switching condition. The SIF-AGC is related to the average level of AM- or FM-carrier and
controls the SIF amplifier to provide a constant SIF signal to the AM demodulator and QPS mixer.
5.2.7 QUASI-PARALLEL-SOUND (QPS) MIXER
The QPS mixer is realised by a multiplier. The SIF signal (FM or NICAM carrier) is converted to the intercarrier
frequency by the regenerated picture carrier (quadrature signal) which is provided from the VCO. The intercarrier signal
is fed via an output amplifier to Pin 24.
5.2.8 STANDARD SWITCH
To have equal polarity of the video output signal the polarity can be switched in the demodulation stage in accordance
with the TV standard. Additional a standard dependent dc level shift in the video amplifier delivers the same sync. level.
In parallel to this, the correct VIF-AGC is selected for positive or negative modulated VIF signals. In the case of
negative modulation (e.g., B/G standard) the AM output signal is switched off. For positive modulation (L standard) the
AM demodulator and QPS mixer is active. This condition allows a parallel operation of the AM sound signal and the
NICAM-L stereo sound.
5.2.9 L
SWITCH
With a control voltage at Pin 14 the VCO frequency can be switched for setting to the required L
value (L standard).
Also a fine adjustment of the L
-VCO center frequency is possible via a potentiometer. The L switch is only active for
positive modulated video IF-signals (standard switch in L mode).
5.2.10 INTERNAL VOLTAGE STABILISER
The internal bandgap reference ensures constant performance independent of supply voltage
and temperature.
5.3 VIDEO / RGB
5.3.1 FRONT END
5.3.1.1 CVBS Front-End
The CVBS front-end consists of the colour-decoding circuit itself, a sync processing circuit for generation of H/V signals
out of the CVBS signal, and the luminance processing. The main task of the luminance processing is to remove the
colour carrier by means of a notch filter. For PAL and SECAM operation a baseband delay line is used for U and V
signals. This can be used as comb filter in NTSC operation (only for chrominance). The RGB input from SCART is used
CP830F Service Manual
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as an overlay for the CVBS channel (RGB+FBL).
This block contains a matrix (for RGB signals).
5.3.1.2 Input Selector
The analog CVBS or SVHS luma signal are fed to the inputs CVBS1...7 of VSP94x2A (amplitude 0.5...1.5 V pp ). One
signal is selected and fed to the first ADC. A second signal (SVHS Chroma) can be selected and fed to the other ADC.
After clamping to the back porch both signals are AD-converted with an amplitude resolution of 9 bit. The AD
conversion is done using a 20.25 MHz free-running stable crystal clock. Before the A to D conversion the signals are
lowpass filtered to avoid antialias effects. One input is looped back to output CVBSO1(#63). A signal addition is
performed to output a CVBS signal even when separate Y/C signals are used at input.
5.3.1.3 Signal Levels And Gain Control To adjust to different CVBS input voltages a digitally working automatic gain
control is implemented. Input voltages in the range between 0.6 to 1.8 V pp can be applied to the CVBS inputs.
5.3.1.4 Synchronization
After elimination of the high frequent components of the CVBS signal by a low pass filter, horizontal and vertical sync
pulses are separated. Horizontal sync pulses are generated by a digital phase locked loop. The time constant is
adjusted between fast and slow behaviour to accommodate different input sources (e.g. VCR).
5.3.1.5 Chroma Decoder
The digital multistandard chroma decoder is able to decode NTSC and PAL signals with a subcarrier frequency of 3.58
MHz and 4.43 MHz as well as SECAM signals with automatic standard detection. The TV controller software has
configured the colour decoder to operate in automatic detection mode. When the signal source comes from the tuner,
only SECAM and PAL (50Hz) standard are enabled. In AV mode or when program number 0 is selected the following
standards are also enabled : NTSC M, NTSC 4.43 and PAL 60. The demodulation is done with a regenerated colourcarrier.
5.3.1.6 Luminance Processing
A luminance notch filter is implemented to separate the chroma information from the luminance. Depending on the
colour standard, one out of three different notch characteristics is chosen (
PAL , NTSC , SECAM ) automatically.
5.3.1.7 RGB Front-End
An analogue RGB input port for an external RGB source is available. The incoming signal is clamped to the back porch
by a clamping pulse. This input as an overlay input (soft mix). The RGB signal must then be synchronised to the main
CVBS/YC signal.
5.3.1.8 Signal Processing
5.3.1.8.1 Horizontal Prescaler
The main application of the horizontal prescaler is the conversion of the number of pixels coming form the 40.5/20.25
MHz pixel clock domain down to the number of pixels stored in the memory (factor 2/3). Generally the number of
incoming pixels can be decimated by a factor between 1 and 64 in a granularity of 2 output pixels. The horizontal scaler
reduces the number of incoming pixels by subsampling. To prevent the introduction of alias distortion low pass filters
are used for luminance and chrominance processing. The horizontal prescaler consists of two main subsampling
stages. The first stage is a scaler for rational decimation factors in a range of 1 to 2. The second stage decimates in
integer steps (1,2,3,4...32).
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5.3.1.8.2 Noise Reduction
The structure of the temporal motion adaptive noise reduction is the same for luminance as for chrominance signal.
The output of the motion detector is weighted. The look-up table input value range is separated into 8 segments. It is
possible to freely program different behaviour of the noise reduction by using predefined curve characteristic for each
segment.
5.3.1.8.3 Noise Measurement
The noise measurement algorithm is used to sort program during ATSS. This is done by the TV- microcontroller which
reads the noise level in VSP. The value is determined by averaging over several fields.
5.3.1.8.4 Operation Modes
The interlaced input signal (e.g. 50 Hz PAL or 60 Hz NTSC) is composed of a field A (odd lines) and a field B (even
lines). The 100Hz operation mode used is simply AABB, where each stored field in the memory is displayed double
times on the TV screen. A still field can be displayed using FREEZE command, the operation mode becomes ABAB.
5.3.1.8.5 Digital 656 Output
The output data format corresponds to CCIR 656 with double-scan format (8-bit bus at a data rate of 54 MHz). There all
frequencies and data-rates are doubled compared to standard CCIR656 specification. Timing reference codes (SAV,
EAV) are inserted according to the specification. The output is set to 720 pixels per line and the display clock is set to
54 MHz.
5.3.2 BACK END
5.3.2.1 Digital Input Interface
The digital input interface is set to receive 8 bit 4:2:2 Y Cr Cb multiplexed with separate H/V-syncs and clock (ITU-R656 format). The data inputs Y0...Y7 and C0...C7 are clocked with the external clock LLC2. The clock frequency is 54
MHz for 8 bit data input. The horizontal sync pulse at the HS pin should be an active video signal, which is not vertically
blanked. A clock generator converts the different external line locked clock rates to a common internal sample rate of
approximately 40.5 MHz, in order to provide a fix bandwidth for all digital filters. Therefore the input data is sample rate
converted to the common processing frequency by the horizontal scaler.
5.3.2.2 Horizontal Scaler
The horizontal scaler supports linear or nonlinear horizontal scaling of the digital input video signal in the range of 0.25
to 4. Nonlinear scaling, also called
panorama vision , provides a geometrical distortion of the input picture. It is used to
fit a picture with 4:3 format on a 16:9 screen by stretching the picture geometry at the borders. Also, the inverse effect
can be produced by the scaler. See also microcontroller section to find details on format switching logic.
5.3.2.3 Luma Contrast and Brightness
The luminance signal is multiplied by a factor of 0...2 (contrast adjustment). The signal can be shifted by
100% of its
maximal amplitude with the digital brightness value
5.3.2.4 Black Level Expander/Compressor (BLEC)
The black level expander/compressor modifies the luminance signal with an adjustable non-linear function to enhance
the contrast of the picture.Dark areas are stretched to black, while bright areas remain unchanged. Advantageously, this
black level processing is performed dynamically and only if it will be most noticeable to the viewer.
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5.3.2.5 Luma Sharpness Enhancer (LSE)
Sharpness is one of the most critical features for optimum picture quality. This important processing is performed in the
LSE circuitry of DDP 3315C. It consists of the dynamic peaking, the luma transient improvement (LTI) and an adaptive
mixer. The luma input signal is processed in the peaking and LTI block in parallel. Both output signals are combined in
the mixer depending on the selected LSE characteristic.
5.3.2.6 Dynamic Peaking
The dynamic peaking improves the details of a picture by contour emphasis. It adapts to the amplitude and the
frequency of the input signal. Small detail amplitudes are sharpened, while large detail amplitudes stay nearly
unmodified.
5.3.2.7 Luma Transient Improvement (LTI)
For small detail amplitudes the dynamic peaking is the most appropriate processing to improve the sharpness.
However, for large amplitudes even small over-and/ or undershoots of the peaking are too annoying. The luma transient
improvement enhances the slope of picture detail without these effects by a non-linear processing. The contour
correction signal calculated in this block, is limited to the adjacent extreme values to prevent over- and undershoots.
The LTI features an adjustable gain control and an adjustable coring threshold to prevent the enhancement of small
noise amplitudes.
5.3.2.8 Mixing of Dynamic Peaking and LTI
The contour correction signals of the dynamic peaking and the LTI block are combined by the mixer. Controlled by the
amplitude of a picture edge, this circuitry fades between these two signals. Thus, small and medium picture detail is
enhanced by contour emphasis (peaking) and large picture detail is enhanced by step-improvement (LTI).
5.3.2.9 Chroma Transient Improvement
The intention of this block is to enhance the chroma resolution. A correction signal is calculated by differentiation of the
colour difference signals. The differentiation can be selected according to the signal bandwidth, e.g. for
PAL/NTSC/SECAM or digital component signals, respectively. The amplitude of the correction signal is adjustable.
Small noise amplitudes in the correction signal are suppressed by an adjustable coring circuit. To eliminate
wrong
colours
, which are caused by over and undershoots at the chroma transition, the sharpened chroma signals are limited
to a proper value automatically.
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a) Cr Cb input of CTI
b) Cr Cb input + correction signal
c) sharpened and limited Cr Cb
5.3.2.10 Analog Back End
The digital RGB signals are converted to analogue RGB by three 10-bit digital to analogue converters (DAC). Each
RGB signal has two additional DACs with 9-bit resolution to adjust analogue brightness (40% of the full RGB range)
and cutoff / black level (60% of the full RGB range). An additional fixed current is applied for the blanking level.
The back-end supports the insertion of two external analogue component signals, only one is used for OSD/Text from
the microcontroller. These signals are clamped, processed in an analogue matrix (RGB2), converted by a
voltage/current converter (VCC), and inserted into the main RGB by the fast blank switch. The analogue RGB outputs
are current outputs with current- sink characteristics.
5.3.2.11 Analog RGB Insertion
Each component signal is clamped, converted to RGB if required, and inserted into the main RGB by the fast blank
switch. The external component signals are adjustable independently as regards DC level (brightness) and magnitude
(contrast). Fast Blank selection logic Over-/underlay of the external component signal and the main RGB signal
depends on the fast blank input signal.
5.3.2.12 CRT Measurement and Control
In order to define accurate colour on different CRT displays, the cut-off and white drive settings are adjusted in factory
depending on the characteristic of CRT phosphor.To guarantee correct colours during the lifetime of the display, a build
in automatic tube control loop measures and adjusts the black level on every field and white point every third field. The
display processor is equipped with an 9/12-bit PDM-ADC for all picture tube measuring purposes. This MADC is
connected to the SENSE input pin, the input range is 0 to 2.6 V. Cutoff and white drive current measurement are carried
out with 8-bit resolution during the vertical blanking interval. The current range for cutoff measurement is set by
connecting the sense resistor RC591 to the SENSE input. Due to the fact of a 1:10 relation between cutoff and white
drive current the range select 2 output (RSW2) becomes active for the white drive measurement and connects R533 in
parallel to RC591, thus determining the correct current range. During the active picture, the MADC is used for the
average beam current limiter with a 12-bit resolution. Again a different measurement range is selected with active range
select 1&2 outputs (RSW1&RSW2) connecting R534 in parallel to R533 and RC591. These measurements are typically
done at the summation point of the picture tube cathode currents.
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The picture tube measurement returns results on
every field for:
- cutoff R
- cutoff G
- cutoff B
- white drive R or G or B (sequentially)
The average beam current limiter (BCL) works on both the digital YC r C b input from VSP and the inserted analog
RGB signals (OSD and Teletext) by using the sense input for the beam current measurement. The BCL uses a different
filter to average the beam current during the active picture resulting in a 12-bit resolution. The filter bandwidth is
approximately 4 kHz. The beam current limiter allows the setting of a threshold current, a gain and an additional time
constant. To accommodate several CRT
s, beam current threshold and gain can be modified by microcontroller
option2. If the beam current is above the threshold, the excess current is low-pass filtered with the according gain and
time constant. The result is used to attenuate the RGB outputs by adjusting the white drive multipliers for the internal
(digital) RGB signals, and the analog contrast multipliers for the analog RGB inputs, respectively. The lower limit of the
attenuator is programmable, thus a minimum contrast can always be set. If the minimum contrast is reached, the
brightness will be decreased to a programmable minimum as well.
5.3.2.13 Synchronization and Deflection
The deflection processing generates the signals for the horizontal and vertical drive. This block contains two numeric
phase-locked loops and a security unit:
- PLL2 generates the horizontal and vertical timing, e.g. blanking, clamping and sync signals.
Phase and frequency are synchronised by the incoming sync signals.
- PLL3 adjusts the phase of the horizontal drive pulse and compensates for the delay of the horizontal output stage.
- The security unit observes the H-Drive output signal.
With an external 5 MHz reference clock this unit controls the H-drive
off time and period. In case of an incorrect H-
drive signal the security unit generates a free running h-drive signal divided down from beam current
5.3.2.14 EHT Compensation
The vertical deflection waveform is scaled according the average beam current. This is used to compensate the effects
of electric high tension changes due to beam current variations. EHT compensation for East/West deflection is done
with an offset corresponding to the average beam current.
5.4 MICRONTROLLER
5.4.1 MICROCONTROLLER FEATURES
8-bit 8051 instruction set compatible CPU
33.33-MHz internal clock (max.)
0.360 s (min.) instruction cycle
Two 16-bit timers : schedule software tasks , and user clock
Watchdog timer
Capture compare timer for infrared remote control decoding
Pulse width modulation unit (2 channels 14 bit, 6 channels 8 bit) : used to control AGC Take Over Point .
ADC (4 channels, 8 bit) : AFT, AGC, Local keys, OCP.
UART
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5.4.2 ACQUISITION FEATURES
Multistandard Digital Data Slicer
Parallel Multi-norm Slicing (TTX, VPS, WSS)
Four Different Framing Codes Available
Data Caption only Limited by available Memory
Programmable VBI-buffer
Full Channel Data Slicing Supported
Fully Digital Signal Processing
Noise Measurement and Controlled Noise Compensation
Attenuation Measurement and Compensation
Group Delay Measurement and Compensation
Exact Decoding of Echo Disturbed Signals
5.4.3 PORTS
One 8-bit I/O-port with open drain output and optional I 2 C Bus emulation support (Port 0)
Two 8-bit multifunction I/O-ports (Port 1, Port 3)
One 4-bit port working as digital or analogue inputs for the ADC (Port 2)
One 2-bit I/O-port with secondary functions (P4.2, 4.3, 4.7)
5.4.4
-CONTROLLER I/O PIN CONFIGURATION AND FUNCTION TABLE
PIN NAME
CONFIGURATION
DESCRIPTION
STAND BY TV ON
3 S/SW2 Open Drain Open Drain
4 S/SW2 Open Drain Open Drain
5 S/SW1 Open Drain Open Drain
6 S/SW1 Open Drain Open Drain
8 RESET out Low Open Drain Reset video IC s
15 AFT High impedance High impedance AFT input? ADC input
16 AGC in High impedance High impedance AGC input ? ADC input
17 KEY High impedance High impedance Keyboard input ? ADC input
18 OCP High impedance High impedance Over Current Protection ? Switch
21 Mod SW High impedance Push Pull High = Negative modulation, Low =
Positive modulation (L/L ).
22 SECAM L High impedance Push Pull Low = L, High =L
23 IR High impedance High impedance Infrared Interrupt input
24 SOUND INTInput input Sound interrupt input-edge triggered
48 AGC out -- PWM out Control tuner AGC (TOP)
51 LED Push Pull Push Pull Low : LED Red
High : LED Green
52 Power Push Pull - Low Push Pull - High SMPS operation mode (Burst/ ON)
4 3 Source
L L Tuner
L H AV2-16/9
H L AV2-4/3
H H AV2-4/3
6 5 Source
L L Tuner
L H AV1-16/9
H L AV1-4/3
H H AV1-4/3
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5.4.5 TUNING
The AFC information is supplied by the demodulator IC, and becomes available on SDA55xx pin 15 for controlling
software. The controlling software uses this information for tuner frequency tracking ( automatic following ). The AFC
windows is typically between 50 KHz and 100 KHz. The minimum frequency step of the tuner is 50 Khz. This AFC
function is disabled when a program is tuned using the direct frequency entry or after fine tuning adjustment. Therefore
it is recommended to tune channel with the TV search function ( manual or ATSS ) or using the direct channel entry to
enable the Automatic Frequency Control.
5.4.6 AUTOMATIC PICTURE FORMAT SWITCHING When AUTO mode is selected by the user, the television will
automatically select the picture format for the user. If the user does not want to accept this selected format, he can
always override the setting by use of the ZOOM control on the remote control.
The received information used for automatic picture format control (only while AUTO is selected)
is supplied from two sources;
y WSS data (Wide Screen Signalling Information : see the WSS European Telecommunication Standard ETS 300
294).
The voltage level from SCART 1 or SCART 2, pin 8 (slow switching)
5.4.6.1 WSS Data
This digital signal is a received at the beginning of line 23 in each frame. It is not a teletext signal, but the controller
uses the same decoder resources to receive and decode the digital signal.
This is bi-phase encoded using a clock frequency of 5 MHz. In total, 14 data bits are available, in 4 groups.
Group 1 : Aspect Ratio (b0, b1, b2, b3)
Group 2 : Enhanced Services (b4, b5, b6, b7)
Group 3 : Subtitles (b8, b9, b10)
Group 4 : Reserved (b11, b12, b13)
The signal contains bits in Data Group 1 which define an Aspect Ratio label, and in Data Group 3
(b10) which defines if subtitles are available in the video. The other data groups have no
application in this TV for picture format selection.
The TV decoder recognises 5 bits of data (where b3 is an odd parity bit for Data Group 1).
Position
Aspect WSS Bits Format Name
Ratio label 0 1 2 3 10 Tube 16:9 Tube 4:3
N/A FORMAT_4_3 0 0 0 1 0 4:3 FULL SCREEN
CENTRE FORMAT_14_9 1 0 0 0 0 ZOOM 14:9 FULL SCREEN
TOP FORMAT_14_9 0 1 0 0 0 DEFAULT DEFAULT
CENTRE FORMAT_16_9 1 1 0 1 0 ZOOM 16:9 FULL SCREEN
TOP FORMAT_16_9 0 0 1 0 0 FULL SCREEN FULL SCREEN
CENTRE FORMAT_16_9_PLUS 1 0 1 1 0 ZOOM 16:9 FULL SCREEN
CENTRE FORMAT_14_9_FULL 0 1 1 1 0 FULL SCREEN 14:9
N/A FORMAT_16_9_ANAM 1 1 1 0 0 FULL SCREEN 16:9
N/A SUBTITLE_OUT_IMAGE X X X X 1 FULL SCREEN FULL SCREEN
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There are the following output possibilities;
4:3
14:9
16:9
ZOOM 14:9
ZOOM 16:9
FULL SCREEN (for either 4:3 or 16:9 tubes)
DEFAULT refers to a signal for which there is no implementation, so is treated as if there is no signal data available.
5.4.6.2 SCART Pin 8 Data (Slow Switching)
When there is a signal from SCART 1 pin 8 or SCART 2 pin 8 (named the Slow Switching SSW signal) the TV will enter
AV mode, unless the user forces another source (which is possible even though slow switching is present).
Position Aspect Ratio
Switching Format Name
Voltage Level Tube 16:9 Tube 4:3
CENTRE 4:3 HIGH 4:3 FULL SCREEN
CENTRE 16:9 MEDIUM FULL SCREEN 16:9
The SCART 1 signal SSW1 has priority over SSW2.
5.4.6.3 Picture Format Description
From the information collected from the above sources is the input, from which the TV must decide which format to
select. The WSS data always has priority over Slow Switching.
If no valid data is received from either source, then a default value must be assumed (this is controlled also by the user
by the use of
ZOOM AUTO in the FEATURES menu).
5.4.6.3.1 16:9 CRT
Formats available with 16:9 cathode ray tube;
4:3 (AUTO selectable)
14:9 (AUTO selectable)
ZOOM 14:9 (AUTO selectable)
ZOOM 16:9 (AUTO selectable)
FULL SCREEN (AUTO selectable)
PANORAMA (only available/selectable by the user)
FAVOURITE (only available/selectable by the user)
The table below gives a summary of the FORMAT modes available with a 16:9 CRT, and their given properties.
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Format Name
Zoom factor-16:9 CRT
Vertical Horizontal
Description Application
4:3 100% 75% Picture is centred with right hand side Standard 4/3 picture.
of the display. with 576 active lines
14:9 114% 87% Picture is centred with black bars at 14:9 picture-letter box
the left and right hand side of the display. format with 504 active lines
ZOOM 14:9 114% 100% Picture is displayed filling the full width of 14:9 picture ? letter box
the screen by incorporating a small format with 504 active lines
horizontal geometrical error (typically 8%
linear)
ZOOM 16:9 133% 100% Picture is displayed filling the full screen 16:9 picture-letter box
(width and height) format with 430 active lines
FULL SCREEN 100% 100% Picture is displayed filling the full screen Standard 16/9 picture with
(width and height) 576 active lines
PANORAMA 100% 100% Picture is displayed filling the full screen Used to fit a picture with 4:3
(not AUTO) (width and height) by incorporating a format on a 16:9 screen by
non-linear horizontal geometrical error stretching the picture
geometry at the borders
FAVOURITE 100% to 75% to Customised picture size User-definable format.
(not AUTO) 133% 100%
5.4.6.3.2 4:3 CRT
Formats available with 16:9 cathode ray tube;
14:9 (AUTO selectable)
16:9 (AUTO selectable)
FULL SCREEN (AUTO selectable)
WATERGLASS (only available/selectable by the user)
FAVOURITE (only available/selectable by the user)
The table below gives a summary of the FORMAT modes available with a 4:3 CRT, and their
given properties.
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Format Name
Zoom factor-4:3 CRT
Description Application
Vertical Horizontal
14:9 87% 100% Picture is centred with 14:9 picture-letter
black bars at the top and box format with 576
bottom of the display, active lines
realised by compressing
the vertical size
16:9 75% 100% Picture is centred with 16:9 pictur-letter
black bars at the top and box format with 576
bottom of the display, active lines
realised by compressing
the vertical size
FULL SCREEN 100% 100% Picture is displayed filling Standard 4:3 picture
the full screen (width and with 576 active lines
height)
WATERGLASS 100% 100% Picture is displayed filling Used to fit a picture
(not AUTO) the full screen (width and with 16:9 format on a
height) by incorporating a 4:3 screen by
non-linear horizontal compressing the
geometrical error picture geometry at
the borders
FAVOURITE 100% to 75% to Customised picture size User-definable format.
(not AUTO) 133% 100%
5.4.7 EXTERNAL SOURCE CONTROL LOGIC
The following schematic, illustrates the logic of control for the two SCART connectors.
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The terms used in the schematic are described below;
1. AUTO represents a situation where the television has self-selected its picture source. This could be when the
SCART SLOW SWITCHING pin has gone to a high state, and the AV 1 input is selected without the intervention of
the user.
2. FORCED represents the change of source which has been commanded by the user (using the EXTERNAL button).
The user always has priority, and can override the AUTO change of source by the television.
3. AV KEY represents the EXTERNAL button of the remote control, or on the television.
4. S/SW 1, or S/SW 2 represent the SLOW SWITCHING inputs of the first SCART (AV 1) or second SCART (AV 2),
these each being pin number 8.
5. F/SW 1 represents the FAST SWITCHING input of the first SCART (AV 1), on pin number 16.
The second SCART, AV 2, input does not possess a FAST SWITCHING input.
The HIGH state of a slow switching input represents the request from the external source to be selected by the
television. Whether this is accepted or not depends on the position in the logic diagram. The general rule is that the
user always has priority, so the use of the AV KEY will always result in a defined logic path being followed.
Under certain circumstances, defined in the diagram, the change of state of a slow switching input will result in the
automatic change of source by the television. This change, such as the change from RF broadcast to the AV 1 input,
can always be overridden by the user after the event.
Each line on the diagram, with its associated text, represents the exact conditions under which the change of state will
occur. Sometimes this will be accompanied by another action which will be automatically performed by the television,
being to either ENABLE or DISABLE F/SW 1.
5.4.8 OVER CURRENT PROTECTION
In case of overload, the SMPS secondary voltages will drop. The voltage on pin 18 of microcontroller drops below a
reference voltage (x.xxV). The controlling software which continuously monitors this voltage will switch the set to stand
by mode. To power on the set again the user must switch it off using the main power switch. Appropriate hysteresis
guaranty a reliable operation.
5.5 TELETEXT DISPLAY
National character option bits C12, C13, C14 are transmitted in the page header of a given teletext page. The national
option bits are intended to change (or exchange) 13 characters within the G0 character set, according to the needs of
each national language.
These codes represent, for a given broadcaster, the intended language that the teletext page should be displayed in. As
there are only 3 bits, there are only 8 codes available to cover all the possible language combinations. This means that
for a received code there are several possibilities meanings, according to the local code of practice.
This is not as bad as it first seems, as we use the user-selected OSD language to identify the intention of the
broadcaster. For example, a user wishing to see Russian teletext should select
Russian OSD language, otherwise he would not have correct teletext display on the TV.
The table below allows the reader to understand the relationship between selected OSD language (which is under user
control), the teletext language display (selected by national option bits in transmission page header) and the Packet 26
language selection (selected within packet 26 of the transmission page).
An example: For Greek teletext display, (if national option code 1 1 1 is received from the broadcaster), the user should
select the Greek OSD language. Even if English, French, German, Italian, Spanish, Dutch, Danish, Finnish, Norwegian
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or Swedish OSD languages are selected, the teletext will be correctly displayed.
However, if Polish, Hungarian, Czech, Slovakian, Rumanian or Russian OSD are selected, the consequence will be
incorrect teletext display for the national option characters. Romanian national font options will be selected.
OSD Language C12 C13 C14
PRIMARY
Secondary Language X26 Language
LANGUAGE
English, French, 0 0 0 English English West Euro
German, Italian, 0 0 1 German German West Euro
Spanish, Dutch, 0 1 0 Scandinavian Scandinavian West Euro
Danish, Finnish, 0 1 1 Italian Italian West Euro
Norwegian, 1 0 0 French French West Euro
Swedish, Greek 1 0 1 Spanish Spanish West Euro
1 1 0 Turkish Turkish West Euro
1 1 1 Greek English Greek
Polish, 0 0 0 Polish Polish East Euro
Hungarian, 0 0 1 German German West Euro
Czech, 0 1 0 Hungarian Hungarian East Euro
Slovakian, 0 1 1 Italian Italian West Euro
Rumanian 1 0 0 French French West Euro
1 0 1 Serbian Serbian East Euro
1 1 0 Czech Czech East Euro
1 1 1 Rumanian Rumanian East Euro
Bulgarian, 0 0 0 English Russian Cyrillic
0 0 1 German German West Euro
0 1 0 Estonian Estonian East Euro
0 1 1 Lettish Lettish East Euro
1 0 0 Russian English Cyrillic
1 0 1 Ukrainian English Cyrillic
1 1 0 Czech Czech East Euro
1 1 1 Rumanian Rumanian Cyrillic
5.6 SOUND PROCESSING
5.6.1 ANALOGUE SOUND IF - INPUT SECTION
The input pins ANA_IN1+ and ANA_IN- offer the possibility to connect sound IF sources to the MSP 341xG. The
analogue-to-digital conversion of the preselected sound IF signal is done by an A/D converter, whose output is used to
control an analogue automatic gain circuit (AGC), providing an optimal level for a wide range of input levels.
5.6.2 QUADRATURE MIXERS
The digital input coming from the integrated A/D converter may contain audio information at a frequency range of
theoretically 0 to 9 MHz corresponding to the selected standards. By means of two programmable quadrature mixers,
two different audio sources ; for example, NICAM and FM-mono, may be shifted into baseband position.
5.6.3 PHASE AND AM DISCRIMINATION
The filtered sound IF signals are demodulated by means of the phase and amplitude discriminator block. On the output,
the phase and amplitude is available for further processing.
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AM signals are derived from the amplitude information, whereas the phase information serves for FM and NICAM
demodulation.
5.6.4 NICAM DECODER
In case of NICAM - mode, the phase samples are decoded according the DQPSK - coding scheme. The output of this
block contains the original NICAM bitstream.
5.6.5 DSP SECTION
All audio baseband functions are performed by digital signal processing (DSP). The DSP section controls the source
and output selection, and the signals processing.
5.6.6 SOUND MODE SWITCHING
In case of NICAM transmission, the controlling software read the bit error rate and the operation mode from the NICAM
Decoder. When the set is in
Auto detection mode ( default mode after ATSS ) the MSP firmware set automatically the
sound mode ( NICAM mono, NICAM Dual 1 or NICAM Dual 2 ) depending on the transmitted mode.
In case of 2 Carrier FM transmission, the MSP firmware read the transmission mode and the signal quality level from
the Stereo Detection Register. When the set is in
Auto detection mode the firmware set automatically the sound
mode ( mono, Stereo, Dual 1, Dual 2 ) depending on the transmitted mode.
In
Auto detection mode the firmware evaluate the signal quality and automatically switch to the analogy sound carrier
1, if the transmission quality is too poor. To avoid unwanted automatic switching the threshold levels mono to stereo and
stereo to mono is different.When the sound mode change, the MSP firmware informs the microcontroller by rising pin 4.
This generates an interrupt to the controller, which then read MSP registers via I2C bus to know the new sound status,
and update OSD when needed.In
forced mono mode ( locker icon ), the controlling software configure the
MSP341xG to demodulate only the analogue (FM or AM) sound carrier 1, no matter the signal quality. The sound mode
forced or Autodetect is stored for each programme.
5.7 SOUND AMPLIFICATION
The TDA8944J (TDA8946J) is a stereo BTL audio amplifier capable of delivering 2 x 7 W (2 x 15 W) output power to an
8
load at THD = 10%, using a 12 V power supply and an external heatsink. The voltage gain is fixed at 32dB.
With the three-level MODE input the device can be switched from
standby to mute and to operating mode.
The TDA 8944J outputs are protected by an internal thermal shutdown protection mechanism and short-circuit
protection.
5.7.1 POWER AMPLIFIER
The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output stage, capable of delivering a peak
output current of 1.5 A.
The BTL principle offers the following advantages :
- Lower peak value of the supply current.
- The ripple frequency on the supply voltage is twice the signal frequency.
- No DC-blocking capacitor
- Good low frequency performance
5.7.2 MODE SELECTION
The TDA894xJ has several functional modes, which can be selected by applying the proper DC
voltage to pin MODE.
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Mute : In this mode the amplifier is DC biased but not operational (no audio output). This allows the input coupling
capacitors to be charged to avoid pop-noise. The devices is in mute mode when 2.5 V < VMODE < (Vcc-1.5 V).
Operating : In this mode the amplifier is operating normally. The operating mode is activated at VMODE < 0.5 V.
5.8 VERTICAL DEFLECTION
The vertical driver circuit is a bridge configuration. The deflection coil is connected between the output amplifiers, which
are driven in phase opposition. The differential input circuit is voltage driven. The input circuit is especially intended for
direct connection to driver circuits which deliver symmetrical current signals, but is also suitable for asymmetrical
currents. The output current of these devices is converted to voltages at the input pins via resistors R350 and R351.
The differential input voltage is compared with the output current through the deflection coils measured as voltage
across R302, which provides internal feedback information. The voltage across R302 is proportional to the output
current.
5.8.1 FLYBACK VOLTAGE
The flyback voltage is determined by an additional supply voltage Vflb. The principle of operation with two supply
voltages (class G) makes it possible to fix the supply voltage Vp optimum for the scan voltage and the second supply
voltage Vflb optimum for the flyback voltage. Using this method, very high efficiency is achieved. The supply voltage
Vflb is almost totally available as flyback voltage across the coil, this being possible due to the absence of a coupling
capacitor.
5.8.2 PROTECTION
The output circuit has protection circuits for :
- Too high die temperature
- overvoltage of output stage A
5.8.3 GUARD CIRCUIT
The guard signal is not used by the video IC to blank the screen in case of fault condition.
5.8.4 DAMPING RESISTOR
For HF loop stability a damping resistor (R331) is connected across the deflection coil.
5.8.5 EAST-WEST AMPLIFIER (TDA8358J ONLY)
The East-West amplifier is current driven. It can only sink currents of the diode modulator circuit.
A feedback resistor R397 is connected between the input and output of this inverting amplifier in order to convert the
East-West correction input into an output voltage.
5.9 POWER SUPPLY (STR F6654)
5.9.1 STR-F6654 GENERAL DESCRIPTION
The STR-F6654 is an hybrid IC with a build-in MOSFET and control IC, designed for flyback converter type switch
mode power supply applications.
5.9.2 POWER SUPPLY PRIMARY PART OPERATIONS
An oscillator generates pulses signals which turn on and off a MOSFET transistor.
CP830F Service Manual
-62-
5.9.2.1 Start -up Circuit: VIN
The start-up circuit is used to start and stop the operation of the control IC, by detecting a voltage appearing at VIN pin
(pin 4).
When the power switch is pushed on, VIN increases slowly. During this time, C806 is charged through R802.
As soon as VIN reaches 16V, the STR-F6654 control circuit starts operating. Then, VIN is obtained by smoothing the
winding voltage which appears between pin6 and pin7 of the SMPS transformer.
As this winding voltage does not increase to the set voltage immediately after the control circuit starts operating, VIN
starts dropping. However, as this winding voltage reaches the set value before VIN voltage drops to the shutdown
voltage (at 11V), the control circuit continues operating (see below VIN voltage at start-up). R805 resistor prevents that
VIN pin voltage varies according to the secondary side output current.
VIN must be set higher than the shutdown voltage (VIN (off) = 11Vmax) and lower than the O.V.P.
(overvoltage protection) operating voltage
(VOVP = 20.5Vmin)
CP830F Service Manual
-63-
5.9.2.2 STR-F6654 Oscillating Operation
CP830F Service Manual
-64-
When the MOSFET is ON, the STR-F6654 internal capacitor C1 is charged at the constant voltage 6.5V. At the same
time, the voltage at pin 1 (OCP / FB) increases with the same waveform as the MOSFET drain current.
When the pin 1 voltage reaches the threshold voltage VTH1 = 0.73V, the STR-F6654 internal comparator 1 starts
operating. The STR-F6654 internal oscillator is inverted and the MOSFET turns OFF.
hen the MOSFET turns OFF, charging of STR-F6654 internal capacitor C1 is released and C1 starts discharging by
the STR-F6654 internal resistance R1. So, C1 voltage starts falling in accordance with the gradient regulated by the
constant discharging time of C1 and R1. So, this means that the fixed time determined by C1 and R1 is the OFF-time
of the MOSFET.
When C1 voltage falls to around 3.7V, the STR-F6654 internal oscillator is reversed again and the MOSFET turns
ON. C1 is quickly charged to around 6.5V
The MOSFET continues to oscillate by repeating the above procedure.
5.9.2.3 STR-F6654 Protection Circuits
overcurrent protection function (OCP)
Overcurrent protection is performed pulse by pulse detecting at STR-F6654 pin 1 (OCP) the peak of the MOSFET drain
current in every pulse.
latch circuit
This circuit sustains an output low from the STR-F6654 internal oscillator and stops operation of the power supply when
overvoltage protection (OVP) and thermal shutdown (TSD) circuit are under operation
CP830F Service Manual
-65-
thermal shutdown circuit (TSD)
This circuit triggers the latch circuit when the frame temperature of STR-F6654 IC exceeds 140
C
overvoltage protection circuit (OVP)
This circuit triggers the latch circuit when the Vin voltage exceeds 22V (typ.)
5.10 TV START-UP, TV NORMAL RUN AND STAND BY MODE OPERATIONS
5.10.1 TV START-UP OPERATIONS
5.10.1.1 Schematic Diagram For Start-Up Operations
I827
I701 MICOM
S/B 3.3V
S/B 2.5V
S/B 5V
42 9 49 11
I826
5.10.1.2 TV Start-Up And Microcontroller Initialisation
- When SW801 power switch is pushed, main AC voltage is applied to T801 transformer (after rectification by
D801...D804 diodes). Then, T801 SMPS transformer starts operating and supplies DC voltage to I823(5V regulator),
to I826(3.3V regulator) and to I827(2.5V regulator).
- These regulators provide 3.3V/2.5V DC voltage to I701 microcontroller power supply pins (pins 42/9, pins 11/44) and
to the reset pulse circuit which provides reset pulse to I701 microcontroller reset pin (pin 8).
- Then, the microcontroller starts its initialisation. Its power pin (pin 52) is set to high which allows delivery of power
supply voltages (123V, 8V, 5V...). At this step, all IC’s start working but no picture appears on screen: I701 IC doesn’t
provide horizontal drive voltage.
CP830F Service Manual
-66-
- Then, the microcontroller consults I702 EEPROM via I2C bus to know the last TV set mode (normal run mode or
stand-by mode ) before switching off.
- If the TV set was on normal run mode before switching off, the microcontroller delivers horizontal drive voltage at pin
23 on the I502 and picture appears on screen.
- If the TV set was on stand-by mode before switching off, the microcontroller switches TV set to stand-by mode,
decreasing power pin voltage (pin 1 – I701). This matter will be explained on paragraph 5.10.2.2.
CP830F Service Manual
-67-
5.10.2 TV NORMAL RUN AND STAND-BY MODE OPERATIONS
Depending on remote control commands, I701 microcontroller part pin 52 (power) is set to:
- high for normal run mode
- low for stand-by mode
5.10.2.1 TV On Normal Run Mode
5-10-2-1-1 I701 microcontroller part pin 52 (power) effect
I701 microcontroller part pin 52 (power) is connected to the following circuit:
CP830F Service Manual
-68-
On normal run mode, I701 microcontroller pin 52 (power) is set to high
So, I810 controlled rectifier is not conducting
- Q809 is conducting. So, Q808 is not conducting and Q807 is conducting
- So, Q807 collector is connected to the ground and I810 controlled rectifier gate pin is set to low (no conducting)
So, current from 10V DC voltage (from T801 SMPS transformer pin 13) does not flow through Q811 and Q810
transistors but flows through I806 IC error amplifier
- Q809 is conducting. So, Q810 is not conducting and no current flows from Q810 collector to the ground
Therefore, the power circuit diagram is the following one:
5-10-2-1-2 power supply circuit diagram during TV set normal run
I827 I826
2.5V
15V
10V
14V 4.6V
130V
130V
1.8V
3.3V
D870
C871
I824
I621
1
CP830F Service Manual
-69-
5-10-2-1-3 power supply functioning during TV set normal run mode
- I801 transmits controlled pulses to T801 which generates DC voltages after rectifications by secondary part diodes
and electro capacitors (by example by D820 and C813 on 130V supply voltage line).
- 8V, 5V, 3.3V, 1.8V supply voltage lines have stabilized voltages obtained by I822, I820, I824, I821 voltage regulators.
- 5V, 3.3V, 1.8V stand-by supply voltage lines have stabilized voltages obtained by I823, I826, I827 voltage regulators.
- On 130V supply voltage line, R823 resistor has been chosen to reach exact DC voltage required on this line.
- 130V supply voltage line includes an IC error amplifier (I806) which corrects unexpected DC voltage variations on
this line.
5-10-2-1-4 power supply IC delivery during TV set normal run
power supply line
IC power supply
Remarks
delivery
130V FBT FBT supplies 35V to I301 vertical IC
FBT supplies 11V to I301 vertical IC
FBT supplies 33V to the tuner
FBT supplies 180V to I901 video amplifier pin 6
14.5V I602 sound amplifier pins 3-16
14V T401 H- drive
8V I601 Sound Demod pins 38-395V I101 IF IC pin 23
I502 IC pin 47
I601 Sound Demod pins 7-18-57
I702 EEPROM pin 8
Tuner
3.3V I501 and I502 Main IC pins
S/B 5V I703 IR receiver pin 1
S/B 3.3V I701 pins and I502 pins
CP830F Service Manual
-70-
I826
2.5 3.3
R817
2.5V
I701
MICOM
2.5V
3.3V
52
23
12
3
4
11
17
5.10.2.2 TV Set On Stand-By Mode
5-10-2-2-1 TV set circuit diagram on stand-by mode
CP830F Service Manual
-71-
5-10-2-2-2 TV set stand-by mode operations
∑ On stand-by mode, I701 microcontroller pin 52 (power) is set to low.
So, Q809 collector is set to high.
Then, I810 controlled rectifier gate pin is set to high and I810 is conducting.
So, current flows from pin 16 SMPS transformer to the ground via I804 optocoupler and Q810 and Q811 transistors
(which are conducting).
In these conditions, I801 delivers pulses on light mode and T801 produces voltages with reduced power.
As I810 is conducting, current flows also from pin 16 SMPS transformer to I823 (5V regulator) for I701 com, IR
receiver and front mask buttons supply voltage (then, remote control or front mask buttons can be activated to leave
stand-by mode).
CP830F Service Manual
-72
LOC PART CODE PART NAME DESCRIPTION REMARK LOC PART CODE PART NAME DESCRIPTION REMARK
ZZ100
PTACPWH29U7FLS
ACCESSORY AS DTH-29U7FLF-S
12000 48B4846G2201 TRANSMITTER REMOCON R-46G22 (AAA)
13000 4850Q00910 BATTERY AAA R03/NN SUPERGARD
14000 4858213801 BAG INSTRUCTION L. D. P. E. T0. 05X250X40
ZZ120
PTBCSHH29U7S
COVER BACK AS DTH-29U7FLF-S
M211 4852163301 COVER BACK 29U7 HIPS GY
M211D 4857817610 CLOTH BLACK “300 MM 20”” “
M541 4855415800 S/PLATE 150ART P/E FILM (C/TV)
M542 485580002207 LABEL SERIAL ART 90
ZZ130
PTCACAH29U7FFLS
CABINET AS DTH-29U7FLF-S
M211A 7172401612 SCREW TAPPING TT2 TRS 4X16 MFZN BK
M211B 7178301212 SCREW TAPPITE TT2 WAS 3X12 MFZN BK
M211C 4856013600 SCREW SPKR FIX SWRM+SECC
M352 4853535600 HOLDER CORD NYROLN 66
M481 4854864501 BUTTON POWER 29U7 (SILVER)
M481A 4856716000 SPRING 14Q1/M3 SWPA PIE0.5
M491 4851950201 BUTTON CTRL AS 29U7 4955401+5549601
M491A 7178301011 SCREW TAPPING TT2 WAS 3X10 MFZN
M561 48556174SD01 MARK BRAND “DAEWOO 28”” BLACK “
M681 4856812001 TIE CABLE NYLON66 DA100
M682 4856816300 CLAMP WIRE NYLON 6 (V0)
P405 4850704N07 CONNECTOR SE100J+172792+USW=500
PWC1 4859903511 CORD POWER CW4232 H03VVH2-F=2250
SP01A 7172401212 SCREW TAPPING TT2 TRS 4X12 MFZN
SP02A 7172401212 SCREW TAPPING TT2 TRS 4X12 MFZN
V901 4859640560 “CRT (PHILIPS 29””) “ A68ERF012X044
V901A 4856215402 WASHER RUBBER 20’’
V901B 4856015820 SCREW CRT FIX SWRM+SK5 L=35
ZZ131 58G0000149 COIL DEGAUSSING DC-29SF
ZZ132 48519A4210 CRT GROUND NET 2901H-1015-2P
ZZ200 PTFMSJH29U7S MASK FRONT AS DTH-29U7FLF-S
M201 4852083901 MASK FRONT 29U7 (SILVER)
ZZ201 PTSPPWD830 SPEAKER AS DTG-28A7FZF
51000 4858311110 SPEAKER 12W 8 OHM SP-58126F
51100 4850704S30 CONN AS YH025-04+35098+ULW=700
52000 4858311110 SPEAKER 12W 8 OHM SP-58126F
ZZ206
PTFPMSH28W8FP
PCB FILTER MANUAL AS DTH-28W8FZP
CF802 CL1UC3474M C LINE ACROSS 0.47MF 1J(UCVSNDF/SV
LF200 5PS2901N2- FILTER PFC CHOKE B82991-S2901-N2
PF01A 4859238620 CONN WAFER YPW500-02
PF02A 4859238620 CONN WAFER YPW500-02
PF02B 4850702N08 CONN AS YPH500-02+YLT500+USW=300
PF802 4859242220 CONN WAFER YFW800-02
RF801 DPC7R0M290 POSISTOR 96709 (BC)
ZZ200
PTFPJBH28W8FP
PCB FILTER EYE LET A DTH-28W8FZP
A001 4859811824 PCB FILTER CP-810100X50(246X246/1X8)
E804 4856310300 EYE LET BSR T0.2 (R1.6)
E805 4856310300 EYE LET BSR T0.2 (R1.6)
E806 4856310300 EYE LET BSR T0.2 (R1.6)
E807 4856310300 EYE LET BSR T0.2 (R1.6)
E808 4856310300 EYE LET BSR T0.2 (R1.6)
E809 4856310300 EYE LET BSR T0.2 (R1.6)
E810 4856310300 EYE LET BSR T0.2 (R1.6)
E811 4856310300 EYE LET BSR T0.2 (R1.6)
E812 4856310300 EYE LET BSR T0.2 (R1.6)
E813 4856310300 EYE LET BSR T0.2 (R1.6)
E814 4856310300 EYE LET BSR T0.2 (R1.6)
ZZ290
PTMPMSH29U7FFL
PCB MAIN MANUAL AS DTH-29U7FLF-S
10 2193100801 SOLDER BAR SN:PB=63:37 3PI(NO FLUX)
40 2291050314 FLUX SOLVENT IM-1000
20 2193011101 SOLDER WIRE RS 60-1.2 1.6A
30 2291050617P FLUX SOLDER CF-329D
60 2291051001 FLUX KILLER KFT-7
C106 CEXF1H221V C ELECTRO 50V RSS 220MF (10X16) TP
C118 CMXL1J474J C MYLAR 63V 0.47MF MKT
C404 CMYH3C113J C MYLAR 1.6KV 0.011MF J
C405 CMYE2J183J C MYLAR 630V PU 0.018MF J
C408 CMYE2G334J C MYLAR 400V 0.33MF J
C415 CEXF2E100V C ELECTRO 250V RSS 10MF (10X20) TP
C416 CCYR3D471K C CERA HIKR 2KV 470PF K 125C
C417 CMYE2G103J C MYLAR 400V PU 0.01MF J
C418 CEYD1H689W C ELECTRO 50V RHD 6.8MF (16X35.5)
C604 CEXF1E102V C ELECTRO 25V RSS 1000MF (13X20) TP
C805 CEYN2G181P C ELECTRO 400V LHS 180MF (25X35)
C811 CCYR3D221K C CERA 2KV R 220PF K 125C
C812 CH1BFE472M C CERA AC AC400V 4700PF M U/C/V
C813 CEXF2E101V C ELECTRO 250V RSS 100MF 18X35.5
C814 CEYF2E470V C ELECTRO 250V RSS 47MF (16X25
C820 CCYR3A471K C CERA 1KV 470PF K 125C
C823 CEXF1E102V C ELECTRO 25V RSS 1000MF (13X20) TP
C832 CEXF1E102V C ELECTRO 25V RSS 1000MF (13X20) TP
C840 CEXF1C332V C ELECTRO 16V RSS 3300MF
C841 CEXF1C222V C ELECTRO 16V RSS 2200MF(13X25)TP
C845 CEXF1E102V C ELECTRO 25V RSS 1000MF (13X20) TP
C861 CEXF1E102C C ELECTRO 25V RUS 1000MF 13X20 TP
C866 CCYR3A471K C CERA 1KV 470PF K 125C
C871 CEXF1E102V C ELECTRO 25V RSS 1000MF (13X20) TP
D404 DFMP3FU—- DIODE FMP3FU
D404A 4857027611 HEAT SINK AL EX BK
D404B 7174300811 SCREW TAPPTITE TT2 RND 3X8 MFZN
D820 DBYW76—— DIODE BYW76
D860 DBYW76—— DIODE BYW76
F801 5FSCB4022R FUSE CERA SEMKO F4AH 4A 250V MF51
I101 1TDA4470M- IC IF TDA4470-M
I301 1TDA8358J- IC VERTICAL TDA8358J
I301A 4857028227 HEAT SINK AL EX ANODIZING
I301B 7174301011 SCREW TAPPTITE TT2 RND 3X10 MFZN
I601 1MSP3411V3 IC SOUND MSP3411G-PP-B8-V3
I602 1TDA8946J- IC AUDIO TDA8946J
I602A 4857028215 HEAT SINK AL EX NO ANODOZING
I602B 7174301011 SCREW TAPPTITE TT2 RND 3X10 MFZN
I701 1SDA555XFL IC MICOM OTP SDA555XFL
I702 1AT24C16PC IC MEMORY AT24C16-10PC
I703 1TS0P1238W IC PREAMP TSOP1238WI1
I801 1STRF6654- IC SMPS STR-F6654
I801A 4857027920 HEAT SINK AL EX NO ANODIZING
I801B 7174300811 SCREW TAPPTITE TT2 RND 3X8 MFZN
I804 1KP1010C— IC PHOTO COUPLER KP-1010C
I806 1DP130—— IC ERROR AMP DP130
I810 TX0202DA— THYRISTOR X0202DA
I820 1L7805CV— IC REGULATOR L7805CV
I821 1LD1117V33 IC REGULATOR LD1117AV33 3.3V TO-220
I822 1L7808CV— IC REGULATOR L7808CV
I823 1LD1117V50 IC REGULATOR LD1117AV50 5.0V TO-220
I824 1LD1117V18 IC REGULATOR LD1117AV18 1.8V TO-220
I826 1LD1117V33 IC REGULATOR LD1117AV33 3.3V TO-220
I827 1LD1117V25 IC REGULATOR LD1117AV25 2.5V TO-220
JP01 4859102130 JACK EARPHONE YSC-1537
JPA1 4859200401 SOCKET RGB SR-21A1 (ANGLE TYPE)
JPA2 4859200401 SOCKET RGB SR-21A1 (ANGLE TYPE)
JPA3 4859108450 JACK PIN BOARD YSC03P-4120-14A
JPA4 4859106740 SVHS JACK PH-SJ-9505A
L150 58E0000041 COIL AFT TRF-A005
L380 58C0000120 COIL CHOKE CH-100Q
L381 58C0000120 COIL CHOKE CH-100Q
L401 58H0000054 COIL H-LINEARITY TRL-040F
L403 58C0000118 COIL CHOKE CH-191A
LF801 5PLF24A1— FILTER LINE LF-24A1
M351 4858900002 HOLDER LED AS LH-3P
M791 4857913304 RUBBER CUSHION FR RUBBER SPONGE
P401 4850705S04 CONN AS YH025-05+YST025+ULW=400
P402 4859242420 CONN WAFER YFW800-04
P501 4850708N15 CONNECTOR YH025-08+YBNH250+USW=600
P601 4859231720 CONN WAFER YW025-04
P801 4859287320 CONN WAFER MKS2822 (LOMAX NEW TYPE)
PF01 4859238620 CONN WAFER YPW500-02
6.2 DTH-29U7FLF-S
CP830F Service Manual
-73
LOC PART CODE PART NAME DESCRIPTION REMARK LOC PART CODE PART NAME DESCRIPTION REMARK
PF01B 4850702N08 CONN AS YPH500-02+YLT500+USW=300
PF02 4859238620 CONN WAFER YPW500-02
Q401 TST2310DH1 TR ST2310DHI
Q401A 4857027930 HEAT SINK AL EX BK (ANODIZING)
Q401B 7174300811 SCREW TAPPTITE TT2 RND 3X8 MFZN
R331 RS01Y201J- R M-OXIDE FILM 1W 200 OHM J
R388 RW02Y508FS R WIRE WOUND 2W 0.5 OHM F SMALL
R399 RS02Y829JS R M-OXIDE FILM 2W 8.2 OHM J SMALL
R401 RS02Y820JS R M-OXIDE FILM 2W 82 OHM J SMALL
R415 RS02Y561JS R M-OXIDE FILM 2W 560 OHM J SMALL
R444 RS02Y330JS R M-OXIDE FILM 2W 33 OHM J SMALL
R802 RS02Y753JS R M-OXIDE FILM 2W 75K OHM J SMALL
R804 RF01Y158K- R FUSIBLE 1W 0.15 OHM K
R819 RX10B339JN R CEMENT 10W 3.3 OHM J BENCH 4P
R850 RS02Y129JS R M-OXIDE FILM 2W 1.2 OHM J SMALL
R854 RS02Y569JS R M-OXIDE FILM 2W 5.6 OHM J SMALL
SF1 5PK3953M— FILTER SAW K3953M
SF2 5PK9650M— FILTER SAW K9650M
SW801 5S40101143 SW PUSH PS3-22SP (P.C.B)
T401 50D25A2—- TRANS DRIVE TD-25A2
T402 50H0000260 FBT 1362.5039
T801 50M4936B4- TRANS SMPS 2094.0074B
U100 4859724930 TUNER VARACTOR UV1316/AI-4
X501 5XE20R250E CRYSTAL QUARTZ HC-49/U 20.2500MHZ 30PPM
X601 5XE18R432E CRYSTAL QUARTZ HC-49/U 18.43200MHZ 30PPM
X701 5XE6R0000C CRYSTAL QUARTZ HC-49/U 6.0000 MHZ 20PPM
Z153 5PYXT5R5MB FILTER CERA XT5.5MB
ZZ200 PTMPJBH29U7FFL PCB MAIN EYE LET AS DTH-29U7FLF-S
E003 4856310600 EYE LET BSR 2.3(R2.3)
E004 4856310600 EYE LET BSR 2.3(R2.3)
E10 4856310600 EYE LET BSR 2.3(R2.3)
E11 4856310600 EYE LET BSR 2.3(R2.3)
E12 4856310600 EYE LET BSR 2.3(R2.3)
E13 4856310600 EYE LET BSR 2.3(R2.3)
E14 4856310600 EYE LET BSR 2.3(R2.3)
E15 4856310600 EYE LET BSR 2.3(R2.3)
E16 4856310600 EYE LET BSR 2.3(R2.3)
E17 4856310600 EYE LET BSR 2.3(R2.3)
E18 4856310600 EYE LET BSR 2.3(R2.3)
E19 4856310600 EYE LET BSR 2.3(R2.3)
E20 4856310600 EYE LET BSR 2.3(R2.3)
E21 4856310600 EYE LET BSR 2.3(R2.3)
E22 4856310600 EYE LET BSR 2.3(R2.3)
E23 4856310600 EYE LET BSR 2.3(R2.3)
E24 4856310600 EYE LET BSR 2.3(R2.3)
E25 4856310600 EYE LET BSR 2.3(R2.3)
E26 4856310300 EYE LET BSR T0.2 (R1.6)
E27 4856310300 EYE LET BSR T0.2 (R1.6)
E28 4856310300 EYE LET BSR T0.2 (R1.6)
E29 4856310300 EYE LET BSR T0.2 (R1.6)
E30 4856310300 EYE LET BSR T0.2 (R1.6)
E31 4856310300 EYE LET BSR T0.2 (R1.6)
E32 4856310300 EYE LET BSR T0.2 (R1.6)
E33 4856310300 EYE LET BSR T0.2 (R1.6)
E34 4856310300 EYE LET BSR T0.2 (R1.6)
E35 4856310300 EYE LET BSR T0.2 (R1.6)
E36 4856310300 EYE LET BSR T0.2 (R1.6)
E37 4856310300 EYE LET BSR T0.2 (R1.6)
E38 4856310300 EYE LET BSR T0.2 (R1.6)
E39 4856310300 EYE LET BSR T0.2 (R1.6)
E40 4856310300 EYE LET BSR T0.2 (R1.6)
E41 4856310300 EYE LET BSR T0.2 (R1.6)
E42 4856310300 EYE LET BSR T0.2 (R1.6)
E43 4856310300 EYE LET BSR T0.2 (R1.6)
E44 4856310300 EYE LET BSR T0.2 (R1.6)
E45 4856310300 EYE LET BSR T0.2 (R1.6)
E46 4856310300 EYE LET BSR T0.2 (R1.6)
E47 4856310300 EYE LET BSR T0.2 (R1.6)
E48 4856310300 EYE LET BSR T0.2 (R1.6)
E49 4856310300 EYE LET BSR T0.2 (R1.6)
E50 4856310300 EYE LET BSR T0.2 (R1.6)
E51 4856310300 EYE LET BSR T0.2 (R1.6)
E52 4856310600 EYE LET BSR 2.3(R2.3)
E53 4856310600 EYE LET BSR 2.3(R2.3)
E54 4856310300 EYE LET BSR T0.2 (R1.6)
E55 4856310300 EYE LET BSR T0.2 (R1.6)
E56 4856310300 EYE LET BSR T0.2 (R1.6)
E57 4856310300 EYE LET BSR T0.2 (R1.6)
E58 4856310300 EYE LET BSR T0.2 (R1.6)
ZZ200 PTMPJ2H29U7FFL PCB CHIP MOUNT B AS DTH-29U7FLF-S
CC01 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC02 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC03 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC04 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC05 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC06 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC07 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC08 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC10 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC101 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC103 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC110 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC111 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC112 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC115 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC117 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC119 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC120 HCQK150JCA C CHIP CERA 50V CH 15PF J 2012
CC127 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC129 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC13 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC136 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC14 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC15 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC158 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC16 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC160 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC166 HCQK470JCA C CHIP CERA 50V CH 47PF J 2012
CC17 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC177 HCQK470JCA C CHIP CERA 50V CH 47PF J 2012
CC18 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC19 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC20 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC21 HCBK471KCA C CHIP CERA 50V X7R 470PF K 2012
CC30 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC31 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC32 HCBK222KCA C CHIP CERA 50V X7R 2200PF K 2012
CC501 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC502 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC503 HCFK334ZCA C CHIP CERA 50V Y5V 0.33MF Z 2012
CC504 HCQK150JCA C CHIP CERA 50V CH 15PF J 2012
CC505 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC506 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC507 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC508 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC509 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC511 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC512 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC513 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC514 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC515 HCQK470JCA C CHIP CERA 50V CH 47PF J 2012
CC516 HCQK470JCA C CHIP CERA 50V CH 47PF J 2012
CC517 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC518 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC521 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC522 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CP830F Service Manual
-74-
LOC PART CODE PART NAME DESCRIPTION REMARK LOC PART CODE PART NAME DESCRIPTION REMARK
CC523 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC524 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC526 HCQK220JCA C CHIP CERA 50V CH 22PF J 2012
CC527 HCQK220JCA C CHIP CERA 50V CH 22PF J 2012
CC528 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC549 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC550 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC551 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC552 HCQK270JCA C CHIP CERA 50V CH 27PF J 2012
CC553 HCQK270JCA C CHIP CERA 50V CH 27PF J 2012
CC556 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC560 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC561 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC567 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC568 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC569 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC570 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC601 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC602 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC617 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC620 HCQK309CCA C CHIP CERA 50V CH 3PF C 2012
CC621 HCQK309CCA C CHIP CERA 50V CH 3PF C 2012
CC622 HCQK680JCA C CHIP CERA 50V CH 68PF J 2012
CC629 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC631 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC635 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC665 HCBK222KCA C CHIP CERA 50V X7R 2200PF K 2012
CC667 HCBK222KCA C CHIP CERA 50V X7R 2200PF K 2012
CC680 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC701 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC709 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC711 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC712 HCQK151JCA C CHIP CERA 50V CH 150PF J 2012
CC713 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC715 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC716 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC720 HCFK103ZCA C CHIP CERA 50V Y5V 0.01MF Z 2012
CC726 HCQK330JCA C CHIP CERA 50V CH 33PF J 2012
CC727 HCQK330JCA C CHIP CERA 50V CH 33PF J 2012
CC730 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
CC737 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC742 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC744 HCBK102KCA C CHIP CERA 50V X7R 1000PF K 2012
CC777 HCBK104KCA C CHIP CERA 50V X7R 0.1MF K 2012
I501 1VSP9402AQ IC CHIP VIDEO VSP9402
I502 1DDP3315CQ IC CHIP DDP3315CQ
RC102 HRFT561JCA R CHIP 1/10 560 OHM J 2012
RC106 HRFT101JCA R CHIP 1/10 100 OHM J 2012
RC107 HRFT101JCA R CHIP 1/10 100 OHM J 2012
RC109 HRFT104JCA R CHIP 1/10 100K OHM J 2012
RC112 HRFT223JCA R CHIP 1/10 22K OHM J 2012
RC114 HRFT472JCA R CHIP 1/10 4.7K OHM J 2012
RC116 HRFT243JCA R CHIP 1/10 24K OHM J 2012
RC117 HRFT243JCA R CHIP 1/10 24K OHM J 2012
RC118 HRFT151JCA R CHIP 1/10 150 OHM J 2012
RC119 HRFT272JCA R CHIP 1/10 2.7K OHM J 2012
RC153 HRFT470JCA R CHIP 1/10 47 OHM J 2012
RC159 HRFT682JCA R CHIP 1/10 6.8K OHM J 2012
RC160 HRFT472JCA R CHIP 1/10 4.7K OHM J 2012
RC161 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC169 HRFT222JCA R CHIP 1/10 2.2K OHM J 2012
RC177 HRFT562JCA R CHIP 1/10 5.6K OHM J 2012
RC179 HRFT222JCA R CHIP 1/10 2.2K OHM J 2012
RC501 HRFT101JCA R CHIP 1/10 100 OHM J 2012
RC506 HRFT750JCA R CHIP 1/10 75 OHM J 2012
RC513 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC516 HRFT471JCA R CHIP 1/10 470 OHM J 2012
RC527 HRFT333JCA R CHIP 1/10 33K OHM J 2012
RC530 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC532 HRFT223JCA R CHIP 1/10 22K OHM J 2012
RC550 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC551 HRFT471JCA R CHIP 1/10 470 OHM J 2012
RC560 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC568 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC569 HRFT151JCA R CHIP 1/10 150 OHM J 2012
RC580 HRFT821JCA R CHIP 1/10 820 OHM J 2012
RC581 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC582 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC583 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC584 HRFT821JCA R CHIP 1/10 820 OHM J 2012
RC585 HRFT911JCA R CHIP 1/10 910 OHM J 2012
RC586 HRFT911JCA R CHIP 1/10 910 OHM J 2012
RC587 HRFT821JCA R CHIP 1/10 820 OHM J 2012
RC591 HRFT393JCA R CHIP 1/10 39K OHM J 2012
RC595 HRFT271JCA R CHIP 1/10 270 OHM J 2012
RC598 HRFT271JCA R CHIP 1/10 270 OHM J 2012
RC602 HRFT104JCA R CHIP 1/10 100K OHM J 2012
RC661 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC662 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC712 HRFT101JCA R CHIP 1/10 100 OHM J 2012
RC713 HRFT391JCA R CHIP 1/10 390 OHM J 2012
RC715 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC718 HRFT223JCA R CHIP 1/10 22K OHM J 2012
RC720 HRFT101JCA R CHIP 1/10 100 OHM J 2012
RC721 HRFT151JCA R CHIP 1/10 150 OHM J 2012
RC722 HRFT241JCA R CHIP 1/10 240 OHM J 2012
RC723 HRFT391JCA R CHIP 1/10 390 OHM J 2012
RC724 HRFT102JCA R CHIP 1/10 1K OHM J 2012
RC725 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC729 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC730 HRFT223JCA R CHIP 1/10 22K OHM J 2012
RC731 HRFT223JCA R CHIP 1/10 22K OHM J 2012
RC732 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC733 HRFT473JCA R CHIP 1/10 47K OHM J 2012
RC734 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC735 HRFT223JCA R CHIP 1/10 22K OHM J 2012
RC736 HRFT103JCA R CHIP 1/10 10K OHM J 2012
RC737 HRFT682JCA R CHIP 1/10 6.8K OHM J 2012
RC738 HRFT000-CA R CHIP 1/10 0 OHM 2012
RC739 HRFT000-CA R CHIP 1/10 0 OHM 2012
RC740 HRFT000-CA R CHIP 1/10 0 OHM 2012
RC741 HRFT682JCA R CHIP 1/10 6.8K OHM J 2012
RC742 HRFT682JCA R CHIP 1/10 6.8K OHM J 2012
RC743 HRFT682JCA R CHIP 1/10 6.8K OHM J 2012
RC750 HRFT183JCA R CHIP 1/10 18K OHM J 2012
RC770 HRFT332JCA R CHIP 1/10 3.3K OHM J 2012
RC790 HRFT512JCA R CHIP 1/10 5.1K OHM J 2012
RC799 HRFT472JCA R CHIP 1/10 4.7K OHM J 2012
RCA77 HRFT750JCA R CHIP 1/10 75 OHM J 2012
ZZ200 PTMPJRH29U7FFL PCB MAIN RADIAL AS DTH-29U7FLF-S
C102 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C117 CEXF1H229V C ELECTRO 50V RSS 2.2MF (5X11) TP
C121 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C150 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C152 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C153 CEXF1H229V C ELECTRO 50V RSS 2.2MF (5X11) TP
C157 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C164 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C188 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C301 CMXM2A224J C MYLAR 100V 0.22MF J BULK
C305 CEXF1E221V C ELECTRO 25V RSS 220MF (8X11.5) TP
C313 CMXM2A104J C MYLAR 100V 0.1MF J TP
C315 CEXF1H101V C ELECTRO 50V RSS 100MF (8*11.5) TP
C320 CBXF1H104Z C CERA SEMI 50V F 0.1MF Z (TAPPING)
C350 CCXF1H223Z C CERA 50V F 0.022MF Z (TAPPING)
C351 CCXF1H223Z C CERA 50V F 0.022MF Z (TAPPING)
CP830F Service Manual
-75-
LOC PART CODE PART NAME DESCRIPTION REMARK LOC PART CODE PART NAME DESCRIPTION REMARK
C370 CCXF1H473Z C CERA 50V F 0.047MF Z (TAPPING)
C401 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C411 CEXF2C339V C ELECTRO 160V RSS 3.3MF (8X16) TP
C424 CMXM2A333J C MYLAR 100V 0.033MF J TP
C425 CCXB1H472K C CERA 50V B 4700PF K (TAPPING)
C500 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C501 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C502 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C503 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C504 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C505 CEXF1H100V C ELECTRO 50V RSS 10MF (5X11) TP
C524 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C530 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C550 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C551 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C560 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C561 CEXF1H339V C ELECTRO 50V RSS 3.3MF (5X11) TP
C568 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C590 CEXF1H109V C ELECTRO 50V RSS 1MF (5X11) TP
C602 CEXF1E221V C ELECTRO 25V RSS 220MF (8X11.5) TP
C605 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C608 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C610 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C611 CEXF1H339V C ELECTRO 50V RSS 3.3MF (5X11) TP
C612 CEXF1H109V C ELECTRO 50V RSS 1MF (5X11) TP
C613 CEXF1H109V C ELECTRO 50V RSS 1MF (5X11) TP
C614 CEXF1H109V C ELECTRO 50V RSS 1MF (5X11) TP
C615 CEXF1H109V C ELECTRO 50V RSS 1MF (5X11) TP
C616 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C623 CEXF1H109V C ELECTRO 50V RSS 1MF (5X11) TP
C624 CEXF1H109V C ELECTRO 50V RSS 1MF (5X11) TP
C625 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C626 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C630 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C634 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C636 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C641 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C642 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C660 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C661 CMXM2A224J C MYLAR 100V 0.22MF J BULK
C662 CMXM2A224J C MYLAR 100V 0.22MF J BULK
C666 CBXF1H104Z C CERA SEMI 50V F 0.1MF Z (TAPPING)
C668 CMXM2A224J C MYLAR 100V 0.22MF J BULK
C669 CMXM2A224J C MYLAR 100V 0.22MF J BULK
C690 CEXF1H479V C ELECTRO 50V RSS 4.7MF (5*11) TP
C691 CEXF1H479V C ELECTRO 50V RSS 4.7MF (5*11) TP
C709 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C711 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C713 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C730 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C733 CEXF1H229V C ELECTRO 50V RSS 2.2MF (5X11) TP
C737 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C742 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C744 CEXF1E100V C ELECTRO 25V RSS 10MF TP
C770 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C803 CCXF3A472Z C CERA 1KV F 4700PF Z (T)
C804 CCXF3A472Z C CERA 1KV F 4700PF Z (T)
C806 CEXF1H330V C ELECTRO 50V RSS 33MF (6.3X11) TP
C807 CCXF1H473Z C CERA 50V F 0.047MF Z (TAPPING)
C808 CEXF1H479V C ELECTRO 50V RSS 4.7MF (5*11) TP
C809 CCXB1H102K C CERA 50V B 1000PF K (TAPPING)
C821 CCXB1H102K C CERA 50V B 1000PF K (TAPPING)
C824 CCXB3A471K C CERA 1KV B 470PF K (T)
C831 CCXB3A471K C CERA 1KV B 470PF K (T)
C835 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C844 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C846 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C850 CCXB1H821K C CERA 50V B 820PF K (TAPPING)
C863 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C870 CCXB3A471K C CERA 1KV B 470PF K (T)
C876 CEXF1E470V C ELECTRO 25V RSS 47MF (5X11) TP
C880 CEXF1E101V C ELECTRO 25V RSS 100MF (6.3X11) TP
C888 CEXF1H229V C ELECTRO 50V RSS 2.2MF (5X11) TP
F801A 4857415001 CLIP FUSE PFC5000-0702
F801B 4857415001 CLIP FUSE PFC5000-0702
L101 5CPX479K— COIL PEAKING 4.7UH K RADIAL
L501 5CPX479K— COIL PEAKING 4.7UH K RADIAL
L502 5CPX479K— COIL PEAKING 4.7UH K RADIAL
L802 58CX430599 COIL CHOKE AZ-9004Y 940K TP
Q103 T2SC5343Y- TR 2SC5343Y
Q104 T2SC5343Y- TR 2SC5343Y
Q110 T2SC5343Y- TR 2SC5343Y
Q150 T2SC5343Y- TR 2SC5343Y
Q151 T2SC5343Y- TR 2SC5343Y
Q333 T2SC5343Y- TR 2SC5343Y
Q334 T2SC5343Y- TR 2SC5343Y
Q402 T2SD1207T- TR 2SD1207-T (TAPPING)
Q501 T2SA1980Y- TR 2SA1980Y
Q502 T2SC5343Y- TR 2SC5343Y
Q542 T2SA1980Y- TR 2SA1980Y
Q543 T2SA1980Y- TR 2SA1980Y
Q544 T2SA1980Y- TR 2SA1980Y
Q550 T2SC5343Y- TR 2SC5343Y
Q601 T2SA1980Y- TR 2SA1980Y
Q701 T2SC5343Y- TR 2SC5343Y
Q702 T2SA1980Y- TR 2SA1980Y
Q720 TH2N7000— TR H2N7000
Q721 TH2N7000— TR H2N7000
Q730 T2SC5343Y- TR 2SC5343Y
Q731 T2SC5343Y- TR 2SC5343Y
Q733 T2SC5343Y- TR 2SC5343Y
Q734 T2SC5343Y- TR 2SC5343Y
Q807 T2SC5343Y- TR 2SC5343Y
Q808 T2SC5343Y- TR 2SC5343Y
Q809 T2SC5343Y- TR 2SC5343Y
Q810 T2SC5343Y- TR 2SC5343Y
Q811 T2SC5343Y- TR 2SC5343Y
R402 RN02B750JS R METAL FILM 2W 75 OHM J SMALL
R410 RN02B473JS R METAL FILM 2W 47K OHM J SMALL
SW700 5S50101090 SW TACT SKHV17910A
SW701 5S50101090 SW TACT SKHV17910A
SW702 5S50101090 SW TACT SKHV17910A
SW703 5S50101090 SW TACT SKHV17910A
SW704 5S50101090 SW TACT SKHV17910A
X502 5XEX5R000E CRYSTAL QUARTZ HC-49/U 5.00MHZ 30PPM
Z603 5PXF1B471M FILTER EMI CFI 06 B 1H 470PF
Z604 5PXF1B471M FILTER EMI CFI 06 B 1H 470PF
ZA20 5PXF1B471M FILTER EMI CFI 06 B 1H 470PF
ZA21 5PXF1B471M FILTER EMI CFI 06 B 1H 470PF
ZZ200 PTMPJAH29U7FFL PCB MAIN AXIAL AS DTH-29U7FLF-S
10 2TM10006LB TAPE MASKING 3M #232-MAP-C 6.2X2000M
20 2TM14006LB TAPE MASKING 3M #232 6.0X2000M
A001 4859809493 PCB MAIN CP-830F (DTH) 330X246
C101 CCZB1H101K C CERA 50V B 100PF K (AXIAL)
C161 CCZB1H220K C CERA 50V B 22PF K (AXIAL)
C508 CCZB1H473K C CERA 50V B 0.047MF K (AXIAL)
C509 CCZB1H473K C CERA 50V B 0.047MF K (AXIAL)
C510 CCZB1H473K C CERA 50V B 0.047MF K (AXIAL)
C515 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C516 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C517 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C518 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C519 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C532 CCZB1H103K C CERA 50V B 0.01MF K (AXIAL)
C534 CCZB1H103K C CERA 50V B 0.01MF K (AXIAL)
C536 CCZB1H102K C CERA 50V B 1000PF K (AXIAL)
CP830F Service Manual
-76-
LOC PART CODE PART NAME DESCRIPTION REMARK LOC PART CODE PART NAME DESCRIPTION REMARK
C537 CCZB1H103K C CERA 50V B 0.01MF K (AXIAL)
C538 CCZB1H103K C CERA 50V B 0.01MF K (AXIAL)
C540 CCZB1H333K C CERA 50V B 0.033MF K (AXIAL)
C553 CCZB1H103K C CERA 50V B 0.01MF K (AXIAL)
C557 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C558 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C578 CCZB1H561K C CERA 50V B 560PF K (AXIAL)
C579 CCZB1H561K C CERA 50V B 560PF K (AXIAL)
C589 CCZB1H561K C CERA 50V B 560PF K (AXIAL)
C650 CZSL1H680J C CERA 50V SL 68PF J (AXIAL)
C712 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
C830 CBZF1H104Z C CERA SEMI 50V F 0.1MF Z (AXIAL)
CA20 CCZB1H222K C CERA 50V B 2200PF K (AXIAL)
D100 DTZX33B—- DIODE ZENER TZX33B (TAPPING)
D101 DBAT85—— DIODE BAT85 (TAPPING)
D103 DBA282—— DIODE BA282
D313 DRGP15J—- DIODE RGP15J
D360 DTZX22C—- DIODE ZENER TZX22C (TAPPING)
D361 DTZX33B—- DIODE ZENER TZX33B (TAPPING)
D362 DTZX33B—- DIODE ZENER TZX33B (TAPPING)
D367 DTZX33B—- DIODE ZENER TZX33B (TAPPING)
D405 D1N4937G— DIODE 1N4937G
D406 DRGP15J—- DIODE RGP15J
D407 DRGP15J—- DIODE RGP15J
D408 D1N4937G— DIODE 1N4937G
D410 D1N4937G— DIODE 1N4937G
D414 D1N4004S— DIODE 1N4004S
D415 D1N4937G— DIODE 1N4937G
D530 D1N4148—- DIODE 1N4148 (TAPPING)
D531 D1N4148—- DIODE 1N4148 (TAPPING)
D535 D1N4148—- DIODE 1N4148 (TAPPING)
D540 D1N4148—- DIODE 1N4148 (TAPPING)
D541 D1N4148—- DIODE 1N4148 (TAPPING)
D550 D1N4148—- DIODE 1N4148 (TAPPING)
D551 D1N4148—- DIODE 1N4148 (TAPPING)
D602 D1N4148—- DIODE 1N4148 (TAPPING)
D720 DTZX2V7A— DIODE ZENER TZX2V7A (TAPPING)
D730 DTZX7V5C— DIODE ZENER TZX7V5C (TAPPING)
D733 DTZX7V5C— DIODE ZENER TZX7V5C (TAPPING)
D777 DTZX5V6B— DIODE ZENER TZX5V6B (TAPPING)
D801 DLT2A05G— DIODE LT2A05G
D802 DLT2A05G— DIODE LT2A05G
D803 DLT2A05G— DIODE LT2A05G
D804 DLT2A05G— DIODE LT2A05G
D805 DRGP15J—- DIODE RGP15J
D806 DRGP15J—- DIODE RGP15J
D808 DRGP15J—- DIODE RGP15J
D809 DRGP15J—- DIODE RGP15J
D811 DTZX6V2—- DIODE ZENER TZX6V2B (TAPPING)
D821 DRGP15J—- DIODE RGP15J
D824 D1N4148—- DIODE 1N4148 (TAPPING)
D825 D1N4148—- DIODE 1N4148 (TAPPING)
D830 DRGP15J—- DIODE RGP15J
D831 DRGP15J—- DIODE RGP15J
D840 D1N4004S— DIODE 1N4004S
D841 D1N4004S— DIODE 1N4004S
D870 DRGP15J—- DIODE RGP15J
DA11 DTZX5V6B— DIODE ZENER TZX5V6B (TAPPING)
DA16 DTZX5V6B— DIODE ZENER TZX5V6B (TAPPING)
DA17 DTZX5V6B— DIODE ZENER TZX5V6B (TAPPING)
DA20 DTZX5V6B— DIODE ZENER TZX5V6B (TAPPING)
DA27 DTZX5V6B— DIODE ZENER TZX5V6B (TAPPING)
J047 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J112 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J125 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J128 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J130 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J135 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J136 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J142 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J143 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J145 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J154 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J156 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J159 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J201 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J220 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J232 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J234 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J235 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J236 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J240 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J243 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J267 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J276 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J278 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J287 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J288 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J289 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J290 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J291 RD-4Z100J- R CARBON FILM 1/4 10 OHM J
J300 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J301 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J305 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J306 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J307 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J308 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J309 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J310 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J311 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J312 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J313 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J315 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J317 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J320 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J321 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J322 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J324 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J325 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J327 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J328 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J329 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J330 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J331 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J332 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J333 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J334 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J335 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J336 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J339 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J340 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J341 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J342 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J344 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J345 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J347 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J348 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J350 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J351 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J353 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J354 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J355 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J356 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J357 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J358 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J359 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
CP830F Service Manual
-77-
LOC PART CODE PART NAME DESCRIPTION REMARK LOC PART CODE PART NAME DESCRIPTION REMARK
J362 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J363 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J365 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J366 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J367 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J368 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J369 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J371 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J373 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J374 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J375 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J377 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J378 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J379 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J380 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J381 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J382 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J383 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J385 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J387 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J388 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J389 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J390 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J391 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J392 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J394 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J396 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J397 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J398 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J399 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J400 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J401 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J403 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J404 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J405 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J406 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J407 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J408 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J409 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J410 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J411 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J413 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J414 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J416 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J417 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J418 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J419 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J420 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J423 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J426 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J427 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J429 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J430 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J431 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J432 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J433 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J434 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J435 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J440 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J450 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J453 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J460 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J483 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J488 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
J889 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
L105 5CPZ479K02 COIL PEAKING 4.7UH 3.5MM K (LAL02TB)
L153 5CPZ120K02 COIL PEAKING 12UH 3.5MM K (LAL02TB)
L402 5MC0000100 COIL BEAD MD-5 (HC-3550)
L506 5CPZ479K04 COIL PEAKING 4.7UH 10.5MM K (LAL04TB)
L507 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L524 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L551 5CPZ479K04 COIL PEAKING 4.7UH 10.5MM K (LAL04TB)
L568 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L601 5CPZ479K02 COIL PEAKING 4.7UH 3.5MM K (LAL02TB)
L602 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L603 5CPZ479K02 COIL PEAKING 4.7UH 3.5MM K (LAL02TB)
L605 5CPZ479K02 COIL PEAKING 4.7UH 3.5MM K (LAL02TB)
L650 5MC0000100 COIL BEAD MD-5 (HC-3550)
L709 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L711 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L713 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L730 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L737 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L742 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L744 5CPZ100K02 COIL PEAKING 10UH 3.5MM K (LAL02TB)
L801 5MC0000100 COIL BEAD MD-5 (HC-3550)
LA01 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
LA02 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
LA03 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
LA04 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
LA06 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
LA07 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
LA08 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
LA09 5CPZ100K04 COIL PEAKING 10UH 10.5MM K (LAL04TB)
R103 RD-AZ123J- R CARBON FILM 1/6 12K OHM J
R110 RN-4Z1502F R METAL FILM 1/4 15K OHM F
R111 RD-AZ133J- R CARBON FILM 1/6 13K OHM J
R150 RD-AZ561J- R CARBON FILM 1/6 560 OHM J
R151 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R152 RD-AZ271J- R CARBON FILM 1/6 270 OHM J
R154 RD-AZ470J- R CARBON FILM 1/6 47 OHM J
R155 RD-AZ751J- R CARBON FILM 1/6 750 OHM J
R162 RD-AZ153J- R CARBON FILM 1/6 15K OHM J
R163 RD-AZ752J- R CARBON FILM 1/6 7.5K OHM J
R164 RD-AZ752J- R CARBON FILM 1/6 7.5K OHM J
R190 RD-AZ221J- R CARBON FILM 1/6 220 OHM J
R191 RD-AZ331J- R CARBON FILM 1/6 330 OHM J
R301 RD-4Z472J- R CARBON FILM 1/4 4.7K OHM J
R310 RD-AZ432J- R CARBON FILM 1/6 4.3K OHM J
R311 RD-AZ432J- R CARBON FILM 1/6 4.3K OHM J
R333 RD-AZ222J- R CARBON FILM 1/6 2.2K OHM J
R334 RD-AZ222J- R CARBON FILM 1/6 2.2K OHM J
R345 RD-4Z473J- R CARBON FILM 1/4 47K OHM J
R350 RD-AZ222J- R CARBON FILM 1/6 2.2K OHM J
R351 RD-AZ222J- R CARBON FILM 1/6 2.2K OHM J
R370 RD-4Z159J- R CARBON FILM 1/4 1.5 OHM J
R394 RD-AZ272J- R CARBON FILM 1/6 2.7K OHM J
R395 RD-4Z564J- R CARBON FILM 1/4 560K OHM J
R396 RD-AZ272J- R CARBON FILM 1/6 2.7K OHM J
R397 RD-AZ823J- R CARBON FILM 1/6 82K OHM J
R407 85801065GY WIRE COPPER AWG22 1/0.65 TIN COATING
R414 RD-AZ681J- R CARBON FILM 1/6 680 OHM J
R416 RD-4Z471J- R CARBON FILM 1/4 470 OHM J
R420 RD-AZ471J- R CARBON FILM 1/6 470 OHM J
R424 RD-4Z472J- R CARBON FILM 1/4 4.7K OHM J
R430 RD-4Z152J- R CARBON FILM 1/4 1.5K OHM J
R501 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R502 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R504 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R507 RD-AZ562J- R CARBON FILM 1/6 5.6K OHM J
R509 RD-AZ472J- R CARBON FILM 1/6 4.7K OHM J
R510 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R511 RD-AZ330J- R CARBON FILM 1/6 33 OHM J
R512 RD-AZ330J- R CARBON FILM 1/6 33 OHM J
R513 RD-AZ330J- R CARBON FILM 1/6 33 OHM J
R514 RD-AZ151J- R CARBON FILM 1/6 150 OHM J
CP830F Service Manual
-78-
R515 RD-AZ223J- R CARBON FILM 1/6 22K OHM J
R518 RD-AZ750J- R CARBON FILM 1/6 75 OHM J
R519 RD-AZ750J- R CARBON FILM 1/6 75 OHM J
R520 RD-AZ750J- R CARBON FILM 1/6 75 OHM J
R524 RD-AZ391J- R CARBON FILM 1/6 390 OHM J
R525 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R533 RD-AZ392J- R CARBON FILM 1/6 3.9K OHM J
R534 RD-AZ391J- R CARBON FILM 1/6 390 OHM J
R535 RD-AZ122J- R CARBON FILM 1/6 1.2K OHM J
R537 RD-AZ301J- R CARBON FILM 1/6 300 OHM J
R538 RD-AZ301J- R CARBON FILM 1/6 300 OHM J
R540 RD-AZ472J- R CARBON FILM 1/6 4.7K OHM J
R545 RD-AZ750J- R CARBON FILM 1/6 75 OHM J
R551 RD-AZ471J- R CARBON FILM 1/6 470 OHM J
R563 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R564 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R566 RD-AZ220J- R CARBON FILM 1/6 22 OHM J
R570 RD-AZ271J- R CARBON FILM 1/6 270 OHM J
R576 RD-AZ151J- R CARBON FILM 1/6 150 OHM J
R577 RD-AZ151J- R CARBON FILM 1/6 150 OHM J
R578 RD-AZ330J- R CARBON FILM 1/6 33 OHM J
R579 RD-AZ330J- R CARBON FILM 1/6 33 OHM J
R580 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R588 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R589 RD-AZ330J- R CARBON FILM 1/6 33 OHM J
R590 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R593 RD-AZ203J- R CARBON FILM 1/6 20K OHM J
R594 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R595 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R599 RD-AZ151J- R CARBON FILM 1/6 150 OHM J
R605 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R606 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R608 RD-2Z151J- R CARBON FILM 1/2 150 OHM J
R609 RD-2Z151J- R CARBON FILM 1/2 150 OHM J
R614 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R615 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R620 RD-AZ242J- R CARBON FILM 1/6 2.4K OHM J
R621 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R622 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R641 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R642 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R646 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R647 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R649 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R650 RD-AZ682J- R CARBON FILM 1/6 6.8K OHM J
R651 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R652 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R660 RD-AZ682J- R CARBON FILM 1/6 6.8K OHM J
R666 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R680 RD-AZ473J- R CARBON FILM 1/6 47K OHM J
R700 RD-2Z332J- R CARBON FILM 1/2 3.3K OHM J
R701 RD-AZ472J- R CARBON FILM 1/6 4.7K OHM J
R702 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R703 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R704 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R708 RD-AZ472J- R CARBON FILM 1/6 4.7K OHM J
R709 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R710 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R716 RD-AZ113J- R CARBON FILM 1/6 11K OHM J
R718 RN-AZ3902F R METAL FILM 1/6 39K OHM F
R720 RD-AZ681J- R CARBON FILM 1/6 680 OHM J
R733 RD-AZ223J- R CARBON FILM 1/6 22K OHM J
R741 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R748 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R750 RD-AZ472J- R CARBON FILM 1/6 4.7K OHM J
R781 RD-AZ332J- R CARBON FILM 1/6 3.3K OHM J
R786 RD-AZ103J- R CARBON FILM 1/6 10K OHM J
R787 RD-AZ103J- R CARBON FILM 1/6 10K OHM J
R788 RD-AZ103J- R CARBON FILM 1/6 10K OHM J
R789 RD-AZ103J- R CARBON FILM 1/6 10K OHM J
R790 RD-AZ103J- R CARBON FILM 1/6 10K OHM J
R791 RD-AZ103J- R CARBON FILM 1/6 10K OHM J
R805 RD-2Z100J- R CARBON FILM 1/2 10 OHM J
R806 RD-2Z472J- R CARBON FILM 1/2 4.7K OHM J
R807 RD-2Z272J- R CARBON FILM 1/2 2.7K OHM J
R808 RD-2Z821J- R CARBON FILM 1/2 820 OHM J
R810 RD-4Z102J- R CARBON FILM 1/4 1K OHM J
R811 RC-2Z565KP R CARBON COMP 1/2 5.6M OHM K
R817 RD-AZ473J- R CARBON FILM 1/6 47K OHM J
R820 RD-AZ102J- R CARBON FILM 1/6 1K OHM J
R821 RD-4Z102J- R CARBON FILM 1/4 1K OHM J
R823 RD-4Z102J- R CARBON FILM 1/4 1K OHM J
R829 RD-AZ103J- R CARBON FILM 1/6 10K OHM J
R830 RD-AZ332J- R CARBON FILM 1/6 3.3K OHM J
R841 RD-2Z470J- R CARBON FILM 1/2 47 OHM J
R855 RD-4Z225J- R CARBON FILM 1/4 2.2M OHM J
R870 RD-AZ222J- R CARBON FILM 1/6 2.2K OHM J
RA01 RD-AZ220J- R CARBON FILM 1/6 22 OHM J
RA15 RD-AZ680J- R CARBON FILM 1/6 68 OHM J
RA16 RD-AZ750J- R CARBON FILM 1/6 75 OHM J
RA32 RD-AZ680J- R CARBON FILM 1/6 68 OHM J
RA35 RD-AZ750J- R CARBON FILM 1/6 75 OHM J
RA77 RD-AZ680J- R CARBON FILM 1/6 68 OHM J
RA88 RD-AZ750J- R CARBON FILM 1/6 75 OHM J
ZZ400 PTCPMSH29U7FFL PCB CRT MANUAL AS DTH-29U7FLF-S
C900 CCXB3D102K C CERA 2KV B 1000 PF K (TAPPING)
C910 CEXF2E479V C ELECTRO 250V RSS 4.7MF (10X16)TP
C997 CEXF2E100V C ELECTRO 250V RSS 10MF (10X20) TP
G900 4SG0DY0001 SPARK GAP SSG-102-A1(1.0KV) BULK
I901 1TDA6108JF IC VIDEO TDA6108JF
I901A 4857025401 HEAT SINK A1050P-H24 T2
I901B 7174301011 SCREW TAPPTITE TT2 RND 3X10 MFZN
P401A 4859231820 CONN WAFER YW025-05
P501A 4859235120 CONN WAFER YW025-08
P903 4859238620 CONN WAFER YPW500-02
R906 RF01Y629JA R FUSIBLE 1W 6.2 OHM J A CURVE
SCT1 4859303530 SOCKET CRT PCS629-03C
ZZ200 PTCPJRH28W8FP PCB CRT RADIAL AS DTH-28W8FZP
C902 CMXL2E104K C MYLAR 250V 0.1MF K MEU TP
C921 CMXM2A102J C MYLAR 100V 1000PF J TP
C922 CMXM2A102J C MYLAR 100V 1000PF J TP
C923 CMXM2A102J C MYLAR 100V 1000PF J TP
Q921 TBF423—— TR BF423 TO-92
Q922 TBF423—— TR BF423 TO-92
Q923 TBF423—— TR BF423 TO-92
ZZ200 PTCPJAH28W8FP PCB CRT AXIAL AS DTH-28W8FZP
A001 4859829013 PCB CRT CP-830 (DTG-28)
D911 D1N4004S— DIODE 1N4004S
D912 D1N4004S— DIODE 1N4004S
D913 D1N4004S— DIODE 1N4004S
D921 D1N4004S— DIODE 1N4004S
D922 D1N4004S— DIODE 1N4004S
D923 D1N4004S— DIODE 1N4004S
D997 DLT2A05G— DIODE LT2A05G
R901 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R902 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R903 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R911 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R912 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R913 RD-AZ101J- R CARBON FILM 1/6 100 OHM J
R921 RC-2Z102K- R CARBON COMP 1/2 1K OHM K
R922 RC-2Z102K- R CARBON COMP 1/2 1K OHM K
R923 RC-2Z102K- R CARBON COMP 1/2 1K OHM K
R931 RD-AZ333J- R CARBON FILM 1/6 33K OHM J
R932 RD-AZ333J- R CARBON FILM 1/6 33K OHM J
R933 RD-AZ333J- R CARBON FILM 1/6 33K OHM J
LOC PART CODE PART NAME DESCRIPTION REMARK
LOC PART CODE PART NAME DESCRIPTION REMARK
CP830F Service Manual
-79-
R996 RD-2Z105J- R CARBON FILM 1/2 1M OHM J
R997 RD-2Z102J- R CARBON FILM 1/2 1K OHM J
ZZ140 PTPKCPH29U7FLS PACKING AS DTH-29U7FLF-S
M681 2TP06575CL TAPE OPP T0.065XW75X500M CLEAR
M801 GPBBW6U7022 BOX DTF-29U7
M811 4858101500UP PAD UP 29U7
M811A 4858101500DN PAD DOWN 29U7
M822 4858215601 “POLY BAG 25””-28”” “ PE FOAM T0.5X1600X1270
LOC PART CODE PART NAME DESCRIPTION REMARK
80
CP830F Service Manual
7. EXPLODED VIEW
7.1 DTH-29U7
81
9. SCHEMATIC DIAGRAM
CP830F Service Manual
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