DADD DDU7C-400, DDU7C-300MC3, DDU7C-300M, DDU7C-300B3, DDU7C-300A3 Datasheet

DDU7C

10-TAP, TTL-INTERFACED

data



3

FIXED DELAY LINE
(SERIES DDU7C)

delay
devices, inc.

FEATURES PACKAGES

IN

T10
N/C

GND

1

T2

2

T4

3

T6

4

T8

5
6
7
8

• Ten equally spaced outputs

• Fits standard 16-pin DIP socket

• Low profile

• Auto-insertable

• Input & outputs fully CMOS interfaced & buffered

• 10 T2L fan-out capability

DDU7C-xx DIP
DDU7C-xxA3 Gull-Wing
DDU7C-xxB3 J-Lead
DDU7F-xxMC3 Military SMD

FUNCTIONAL DESCRIPTION

The DDU7C-series device is a 10-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by an
amount determined by the device dash number. The nominal tap-to-tap
delay increment is given by 1/10 of the dash number. For dash numbers
less than 50, the total delay of the line is measured from T1 to T10, with the
nominal value given by 9 times the increment. The inherent delay from IN to T1 is nominally 8.0ns. For
dash numbers greater than or equal to 50, the total delay of the line is measured from IN to T10, with the
nominal value given by the dash number.

VDD

16

T1

15

T3

14

T5

13

T7

12

T9

11

N/C

10

N/C

9

N/C

T2
T4
T6
T8

GND

IN

1
2
3
4
5
6
7

14
13
12
11
10

VDD
T1
T3
T5
T7
T9

9

T10

8

Military DIP

DDU7C-xxM

PIN DESCRIPTIONS

IN Signal Input
T1-T10 Tap Outputs
VDD +5 Volts
GND Ground

SERIES SPECIFICATIONS

• Minimum input pulse width: 20% of total delay

• Output rise time: 8ns typical

• Supply voltage: 5VDC ± 5%

• Supply current: I
I

• Operating temperature: 0° to 70° C

• Temp. coefficient of total delay: 300 PPM/°C

10% 10% 10% 10%

3.5ns 10% 10% 10% 10%

VCC GNDIN T1 T2 T3 T4 T10

Functional diagram for dash numbers < 50

10% 10% 10% 10%

10%

VCC GNDIN T1 T2 T3 T4 T10

Functional diagram for dash numbers >= 50

= 40µa typical

CCL

= 10ma typical

CCH

T5 T6 T7 T8

10% 10% 10% 10%

T5 T6 T7 T8

10%

T9

10%

T9

DASH NUMBER SPEC.’S

Part

Number

DDU7C-25
DDU7C-100
DDU7C-150
DDU7C-200
DDU7C-250
DDU7C-300
DDU7C-400
DDU7C-500

* Total delay is referenced to first tap
Input to first tap = 8.0ns ±± 2ns

NOTE: Any dash number between 25 and

500 not shown is also available.

Total

Delay (ns)

22.5 ± 2.0 * 2.5 ± 1.0
100 ± 5.0 10.0 ± 2.0
150 ± 7.5 15.0 ± 2.0

200 ± 10.0 20.0 ± 2.0
250 ± 12.5 25.0 ± 2.0
300 ± 15.0 30.0 ± 3.0
400 ± 20.0 40.0 ± 4.0
500 ± 25.0 50.0 ± 5.0

Delay Per

Tap (ns)

1997 Data Delay Devices

Doc #97019 DATA DELAY DEVICES, INC. 1

1/30/97 3 Mt. Prospect Ave. Clifton, NJ 07013

DDU7C

APPLICATION NOTES

HIGH FREQUENCY RESPONSE

The DDU7C tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data

DEVICE SPECIFICATIONS

TABLE 1: ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL MIN MAX UNITS NOTES

DC Supply Voltage V
Input Pin Voltage V
Storage Temperature T
Lead Temperature T

CC

IN
STRG
LEAD

Delay Devices if your application requires device
testing at a specific input condition.

POWER SUPPLY BYPASSING

The DDU7C relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VDD to GND,
located as close as possible to the VDD pin, is
recommended. A wide VDD trace and a clean
ground plane should be used.

-0.3 7.0 V

-0.3 VDD+0.3 V

-55 150 C
300 C 10 sec

TABLE 2: DC ELECTRICAL CHARACTERISTICS

PARAMETER SYMBOL MIN TYP MAX UNITS NOTES

High Level Output Voltage V
Low Level Output Voltage V
High Level Output Current I

Low Level Output Current I
High Level Input Voltage V
Low Level Input Voltage V
Input Current I

(0C to 70C, 4.75V to 5.25V)

OH

OL

OH
OL

IH
IL

IH

3.98 4.4 V VDD = 5.0, IOH = MAX

0.15 0.26 V VDD = 5.0, IOL = MAX

3.15 V

-4.0 mA

4.0 mA

1.35 V

0.10

µA

VIH = MIN, VIL = MAX
VIH = MIN, VIL = MAX

VDD = 5.0

Doc #97019 DATA DELAY DEVICES, INC. 2

1/30/97 Tel: [phone] Fax: [phone] http://www.datadelay.com