TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE, INCLUDING,
BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. No computing device can be absolutely secure. Therefore, despite security measures implemented in Cypress hardware or software products, Cypress does not assume any liability arising out of any security breach, such as unauthorized
access to or use of a Cypress product. In addition, the products described in these materials may contain design defects or
errors known as errata which may cause the product to deviate from published specifications. To the extent permitted by
applicable law, Cypress reserves the right to make changes to this document without further notice.
Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document.
Any information provided in this document, including any sample design information or programming code, is provided only
for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed,
intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation
equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of
the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is
any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device
or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release
Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. You
shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims
for personal injury or death, arising from or related to any Un
Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, FRAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more
complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.
PSoC Designer, PSoC Creator, SmartSense, and CapSense Express are trademarks of Cypress Semiconductor Corporation.
The CY8CKIT-042 contains electrostatic discharge (ESD) sensitive
devices. Electrostatic charges readily accumulate on the human body
and any equipment, and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges.
Proper ESD precautions are recommended to avoid performance
degradation or loss of functionality. Store unused CY8CKIT-042
boards in the protective shipping package.
End-of-Life/Product Recycling
This kit has an end-of-life cycle five years from the date of
manufacturing mentioned on the back of the box. Contact your nearest
recycler for discarding the kit.
Regulatory Compliance
The CY8CKIT-042 PSoC® 4 Pioneer Kit is intended for use as a development platform for hardware
or software in a laboratory environment. The board is an open system design, which does not
include a shielded enclosure. Due to this reason, the board may cause interference to other
electrical or electronic devices in close proximity. In a domestic environment, this product may cause
radio interference. In such cases, the user may be required to take adequate preventive measures.
Also, this board should not be used near any medical equipment or RF devices.
Attaching additional wiring to this product or modifying the product operation from the factory default
may affect its performance and cause interference with other apparatus in the immediate vicinity. If
such interference is detected, suitable mitigating measures should be taken.
The CY8CKIT-042 as shipped from the factory has been verified to meet with requirements of CE as
a Class A product.
ESD can damage boards and associated components. Cypress recommends that the user perform
procedures only at an ESD workstation. If an ESD workstation is not available, use appropriate ESD
protection by wearing an antistatic wrist strap attached to the chassis ground (any unpainted metal
surface) on the board when handling parts.
Handling Boards
CY8CKIT-042 boards are sensitive to ESD. Hold the board only by its edges. After removing the
board from its box, place it on a grounded, static free surface. Use a conductive foam pad if
available. Do not slide board over any surface.
Thank you for your interest in the PSoC® 4 Pioneer Kit. The kit is designed as an easy-to-use and
inexpensive development kit, showcasing the unique flexibility of the PSoC 4 architecture. Designed
for flexibility, this kit offers footprint-compatibility with several third-party Arduino™ shields. This kit
has a provision to populate an extra header to support Digilent
addition, the board features a CapSense
USB programmer, a program and debug header, and USB-UART/I2C bridges. This kit supports
either 5 V or 3.3 V as power supply voltages.
The PSoC 4 Pioneer Kit is based on the PSoC 4200 device family, delivering a programmable
platform for a wide range of embedded applications. The PSoC 4 is a scalable and reconfigurable
platform architecture for a family of mixed-signal programmable embedded system controllers with
an Arm
with flexible automatic routing.
1.1Kit Contents
®
Cortex™-M0 CPU. It combines programmable and reconfigurable analog and digital blocks
®
®
slider, an RGB LED, a push button switch, an integrated
PSoC Creator is a state-of-the-art, easy-to-use integrated design environment (IDE). It introduces
revolutionary hardware and software co-design, powered by a library of pre-verified and precharacterized PSoC Components™.
With PSoC Creator, you can:
■ Drag and drop PSoC components to build a schematic of your custom design
■ Automatically place and route components and configure GPIOs
■ Develop and debug firmware using the included component APIs
PSoC Creator also enables you to tap into an entire tools ecosystem with integrated compiler chains
and production programmers for PSoC devices.
For more information, visit www.cypress.com/creator.
1.3Getting Started
This guide helps you to get acquainted with the PSoC 4 Pioneer Kit.
■ The Software Installation chapter on page 14 describes the installation of the kit software.
■ The Kit Operation chapter on page 17 explains how to program the PSoC 4 with a programmer
and debugger – either the onboard PSoC 5LP or the external MiniProg3 (CY8CKIT-002).
■ The Hardware chapter on page 27 details the hardware operation.
■ The Code Examples chapter on page 43 describes the code examples.
■ The Advanced Topics chapter on page 65 deals with topics such as building projects for
PSoC 5LP, USB-UART functionality, and USB-I2C functionality of PSoC 5LP.
■ The Appendix on page 116 provides the schematics, pin assignment, use of zero-ohm resistors,
Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device
for your design, and to help you to quickly and effectively integrate the device into your design. For a
comprehensive list of resources, see KBA86521, How to Design with PSoC 3, PSoC 4, and
PSoC 5LP. The following is an abbreviated list for PSoC 4:
■ Overview: PSoC Portfolio, PSoC Roadmap
■ Product Selectors: PSoC 1, PSoC 3, PSoC 4, or PSoC 5LP. In addition, PSoC Creator includes
a device selection tool.
■ Datasheets: Describe and provide electrical specifications for the PSoC 4000, PSoC 4100, and
PSoC 4200 device families.
■ CapSense Design Guide: Learn how to design capacitive touch-sensing applications with the
PSoC 4 family of devices.
■ Application Notes and Code Examples: Cover a broad range of topics, from basic to advanced
level. Many of the application notes include code examples. Visit the PSoC 3/4/5 Code Examples
webpage for a list of all available PSoC Creator code examples. For accessing code examples
from within PSoC Creator – see PSoC Creator Code Examples on page 12.
■ Technical Reference Manuals (TRM): Provide detailed descriptions of the architecture and
registers in each PSoC 4 device family.
■ Development Kits:
❐ CY8CKIT-042 and CY8CKIT-040, PSoC 4 Pioneer Kits, are easy-to-use and inexpensive
development platforms. These kits include connectors for Arduino compatible shields and
Digilent Pmod daughter cards.
❐ CY8CKIT-049 is a very low-cost prototyping platform for sampling PSoC 4 devices.
❐ CY8CKIT-001 is a common development platform for all PSoC family devices.
■ The MiniProg3 device provides an interface for flash programming and debug.
■ Knowledge Base Articles (KBA): Provide design and application tips from experts on the
devices/kits. For instance, KBA93541, explains how to use CY8CKIT-049 to program another
PSoC 4.
■ For a list of trainings on PSoC Creator, visit www.cypress.com/training.
PSoC Creator includes a large number of code examples. These examples are accessible from the
PSoC Creator Start Page, as Figure 1-3 shows.
Code examples can speed up your design process by starting you off with a complete design,
instead of a blank page. They also show how PSoC Creator Components can be used for various
applications.
In the Find Code Example dialog, you have several options:
■ Filter for examples based on device family or keyword.
■ Select from the list of examples offered based on the Filter Options.
■ View the project documentation for the selection (on the Documentation tab).
■ View the code for the selection on the Sample Code tab. You can copy the code from this win-
dow and paste to your project, which can help speed up code development.
■ Create a new workspace for the code example or add to your existing workspace. This can
speed up your design process by starting you off with a complete, basic design. You can then
adapt that design to your application.
Figure 1-3. Code Examples in PSoC Creator
Introduction
1.4.3PSoC Creator Help
Visit the PSoC Creator home page to download the latest version of PSoC Creator. Then, launch
PSoC Creator and navigate to the following items:
■ Quick Start Guide: Choose Help > Documentation > Quick Start Guide. This guide gives you
demonstrate how to configure and use PSoC Creator Components. To access code examples
related to a specific Component, place the Component on the TopDesign schematic and rightclick on the Component. Select the Find Code Example option in the context menu that
appears.
■ System Reference Guide: Choose Help > System ReferenceGuide. This guide lists and
describes the system functions provided by PSoC Creator.
■ Component Datasheets: Right-click a Component and select Open Datasheet. Visit the
PSoC 4 Component Datasheets page for a list of all PSoC 4 Component datasheets.
If you have any questions, our technical support team is happy to assist you. You can create a support request on the Cypress Technical Support page.
If you are in the United States, you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 3 at the prompt.
You can also use the following support resources if you need quick assistance.
■ Self-help.
■ Local Sales Office Locations.
1.5Documentation Conventions
Table 1-1. Document Conventions for Guides
ConventionUsage
Courier New
Italics
[Bracketed, Bold]
File > Open
Bold
Times New Roman
Text in gray boxesDescribes cautions or unique functionality of the product.
Displays file locations, user entered text, and source code:
C:\ ...cd\icc\
Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Creator User Guide.
Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
Represents menu paths:
File > Open > New Project
Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Follow these steps to install the CY8CKIT-042 PSoC 4 Pioneer Kit software:
1. Download the kit software from www.cypress.com/CY8CKIT-042. The kit software is available for
download in three formats.
a. CY8CKIT-042 Kit Complete Setup: This installation package contains the files related to the
kit including PSoC Creator and PSoC Programmer. However, it does not include the Windows
Installer or Microsoft .NET framework packages. If these packages are not on your computer,
the installer directs you to download and install them from the Internet.
b. CY8CKIT-042 Kit Only: This executable file installs only the kit contents, which include kit
code examples, hardware files, and user documents. This package can be used if all the
software prerequisites (listed in step 5) are installed on your computer.
c. CY8CKIT-042 DVD ISO: This file is a complete package, stored in a DVD-ROM image format,
which you can use to create a DVD or extract using an ISO extraction program such as
WinZip
drive programs such as Virtual CloneDrive and MagicISO. This file includes all the required
software, utilities, drivers, hardware files, and user documents.
2. If you have downloaded the ISO file, mount it in a virtual drive. Extract the ISO contents if you do
not have a virtual drive to mount. Double-click cyautorun.exe in the root directory of the extracted
content or mounted ISO if "Autorun from CD/DVD" is not enabled on the computer. The
installation window will appear automatically.
Note: If you are using the "Kit Complete Setup" or "Kit Only" file, then go to step 4 for
installation.
®
or WinRAR. The file can also be mounted similar to a virtual CD/DVD using virtual
3. Click Install CY8CKIT-042 PSoC 4 Pioneer Kit to start the kit installation, as shown in
Figure 2-1.
Figure 2-1. Kit Installer Screen
4. Select the directory in which you want to install the files related to the CY8CKIT-042 PSoC 4
Pioneer Kit. Choose the directory and click Next.
5. The CY8CKIT-042 PSoC 4 Pioneer Kit installer automatically installs the required software, if it is
not present on your computer. Following are the required software:
a. PSoC Creator 4.2 or later: This software is also available at www.cypress.com/psoccreator.
b. PSoC Programmer 3.27.1 or later: This is installed as part of PSoC Creator installation
(www.cypress.com/programmer).
6. Choose the Typical, Custom, or Complete installation type (select Ty pica l if you do not know
which one to select) in the Product Installation Overview window, as shown in Figure 2-2. Click
Next after you select the installation type.
7. Read the License agreement and select I accept the terms in the license agreement to
continue with the installation. Click Next.
8. When the installation begins, a list of packages appears on the installation page. A green check
mark appears next to each package after successful installation.
9. Enter your contact information or select the Continue Without Contact Information check box.
Click Finish to complete the kit installation.
10.After the installation is complete, the kit contents are available at the following location:
Note: For Windows 7/8/8.1/10 users, the installed files and the folder are read-only. To use the
installed code examples, follow the steps outlined in the Code Examples chapter on page 43. These
steps will create an editable copy of the example in a path that you choose, so the original installed
example is not modified.
2.2Uninstall Software
The software can be uninstalled using one of the following methods:
1. Go to Start > All Programs > Cypress > Cypress Update Manager and select the Uninstall
button next to the product that needs to be uninstalled.
2. Go to Start > Control Panel > Programs and Features for Windows 7 or Add/Remove Programs for Windows XP and select the Uninstall button.
The PSoC 4 Pioneer Kit can be used to develop applications using the PSoC 4 family of devices and
the Arduino shields and Digilent Pmod daughter cards. Figure 3-1 is an image of the PSoC 4
Pioneer board with a markup of the onboard components.
The PSoC 4 Pioneer Kit connects to the PC over a USB interface. The kit enumerates as a
composite device and three separate devices appear under the Device Manager window in the
Windows operating system.
Table 3-1. PSoC 4 Pioneer Kit in Device Manager After Enumeration
PortDescription
USB Composite DeviceComposite device
Kit Operation
USB Input Device
KitProgProgrammer and debugger
KitProg USB-UARTUSB-UART bridge, which appears as the COM# port
The kit allows programming and debugging of the PSoC 4 device in two modes:
■ Using the onboard PSoC 5LP programmer and debugger
■ Using a CY8CKIT-002 MiniProg3 programmer and debugger
3.2.1Using the Onboard PSoC 5LP Programmer and Debugger
The default programming interface for the kit is a USB-based, onboard programming interface.
Before trying to program the device, PSoC Creator and PSoC Programmer must be installed. See
Install Kit Software on page 14 for information on installing the kit software.
1. To program the device, plug the USB cable into the programming USB connector J10, as shown
in Figure 3-3. The kit will enumerate as a composite device. See Pioneer Kit USB Connection on
page 18 for details.
Figure 3-3. Connect USB Cable to J10
Kit Operation
2. The onboard PSoC 5LP uses serial wire debug (SWD) to program the PSoC 4 device. See
3. The Pioneer Kit’s onboard programmer will enumerate on the PC and in the software tools as
KitProg. Load a code example in PSoC Creator (such as the examples described in the Code
Examples chapter on page 43) and initiate the build by clicking Build > Build Project or
[Shift]+[F6].
Figure 3-5. Build Project in PSoC Creator
4. After the project is built without errors and warnings, select Debug > Program or [Ctrl]+[F5] to
program the device.
Figure 3-6. Program Device from PSoC Creator
The onboard programmer supports only the RESET programming mode. When using the onboard
programmer, the board can either be powered by the USB (VBUS) or by an external source such as
an Arduino shield. If the board is already powered from another source, plugging in the USB
programmer does not damage the board.
3.2.2Using CY8CKIT-002 MiniProg3 Programmer and Debugger
The PSoC 4 on the Pioneer Kit can also be programmed using a MiniProg3 (CY8CKIT-002). To use
MiniProg3 for programming, use the J6 connector on the board, as shown in Figure 3-7.
The board can also be powered from the MiniProg3. To do this, select Tool > Options. In the
Options window, expand ProgramandDebug > Port Configuration; click MiniProg3 and select
the settings shown in Figure 3-8. Click Debug > Program to program and power the board.
Note: The CY8CKIT-002 MiniProg3 is not part of the PSoC 4 Pioneer Kit contents. It can be
purchased from the Cypress Online Store.
Figure 3-7. PSoC 4 Programming/Debugging Using MiniProg3
Note: See the Programmer User Guide for more information on programming using a MiniProg3.
3.3USB-UART Bridge
The onboard PSoC 5LP can also act as a USB-UART bridge to transfer and receive data from the
PSoC 4 device to the PC via the COM terminal software. When the USB mini-B cable is connected
to J10 of the PSoC 4 Pioneer Kit, a device named KitProg USB-UART is available under Ports
(COM & LPT) in the device manager. For more details about the USB-UART functionality, see Using
PSoC 5LP as a USB-UART Bridge on page 65.
To use the USB-UART functionality in the COM terminal software, select the corresponding COM
port as the communication port for transferring data to and from the COM terminal software.
The UART lines from PSoC 5LP are brought to the P12[6] (J8.9) and P12[7] (J8.10) pins of header
J8. This interface can be used to send or receive data from any PSoC 4 design that has a UART by
connecting the pins on header J8 to the RX and TX pins assigned in PSoC 4. The UART can be
used as an additional interface to debug designs. This bridge can also be used to interface with
other external UART-based devices. Figure 3-9 shows the connection between the RX and TX lines
of the PSoC 5LP and PSoC 4. In this example, the PSoC 4 UART has been routed to the J4 header;
the user must connect the wires between the PSoC 5LP RX and TX lines available on header J8.
The PSoC 5LP also functions as a USB-I2C bridge. The PSoC 4 communicates with the PSoC 5LP
using an I2C interface and the PSoC 5LP transfers the data over the USB to the USB-I2C software
utility on the PC, called the Bridge Control Panel (BCP).
The BCP is available as part of the PSoC Programmer installation. This software can be used to
send and receive USB-I2C data from the PSoC 5LP. When the USB mini-B cable is connected to
header J10 on the Pioneer Kit, the KitProg/<serial_number> is available under Connected I2C/SPI/RX8 Ports in the BCP.
Figure 3-10. Bridge Control Panel
Kit Operation
To use the USB_I2C functionality, select the KitProg/<serial_number> in the BCP. On successful
connection, the Connected and Powered tabs turn green.
Figure 3-11. KitProg USB-I2C Connected in Bridge Control Panel
Kit Operation
USB-I2C is implemented using the USB and I2C components of PSoC 5LP. The SCL (P12_0) and
SDA (P12_1) lines from the PSoC 5LP are connected to SCL (P3_0) and SDA (P3_1) lines of the
PSoC 4 I2C. The USB-I2C bridge currently supports I2C speed of 50 kHz, 100 kHz, 400 kHz, and
1MHz.
Refer to Using PSoC 5LP as USB-I2C Bridge on page 79 for building a project, which uses USB-I2C
Bridge functionality.
3.5Updating the Onboard Programmer Firmware
The firmware of the onboard programmer and debugger, PSoC 5LP, can be updated from PSoC
Programmer. When a new firmware is available or when the KitProg firmware is corrupt (see Error in
Firmware/Status Indication in Status LED on page 124), PSoC Programmer displays a warning
indicating that new firmware is available.
Open PSoC Programmer from Start > All Programs > Cypress > PSoC Programmer<version>.
When PSoC Programmer opens, a WARNING! window pops up saying that the programmer is
currently out of date.
Click OK to close the window. On closing the warning window, the Action and Results window
displays “Please navigate to the Utilities tab and click the Upgrade Firmware button”.
Figure 3-13. Upgrade Firmware Message in PSoC Programmer
Click the Utilities tab and click the UpgradeFirmware button. On successful upgrade, the Actionand Results window displays the firmware update message with the KitProg version.
This section provides the block-level description of the PSoC 4 Pioneer Kit.
Figure 4-3. Block Diagram
Hardware
The PSoC 4 is a new generation of programmable system-on-chip devices from Cypress for
embedded applications. It combines programmable analog, programmable digital logic,
programmable I/O, and a high-performance Arm Cortex-M0 subsystem. With the PSoC 4, you can
create the combination of peripherals required to meet the application specifications.
The PSoC 4 Pioneer Kit features an onboard PSoC 5LP, which communicates through the USB to
program and debug the PSoC 4 using serial wire debug (SWD). The PSoC 5LP also functions as a
USB-I2C bridge and USB-UART bridge.
The Pioneer Kit has an RGB LED, a status LED, and a power LED. The RGB LED is connected to
the PSoC 4 and the status LED is connected to the PSoC 5LP. For more information on the status
LED, see section A.5 Error in Firmware/Status Indication in Status LED on page 124. This kit also
includes a reset button that connects to the PSoC 4 XRES, a user button, and a five-segment
CapSense slider, which can be used to develop touch-based applications. The PSoC 4 pins are
brought out onto headers J1 to J4 on the kit to support Arduino shields. The PSoC 5LP pins are
brought out onto header J8 to enable using the onboard PSoC 5LP to develop custom applications.
The PSoC 4 Pioneer Kit can be powered from the USB Mini B, the Arduino compatible header, or an
external power supply. The input voltage is regulated by a low drop-out (LDO) regulator to 3.3 V. You
can select between VBUS (5 V) and 3.3 V by suitably plugging the jumper onto the voltage selection
header VDD.
This kit uses the PSoC 4200 family device. PSoC 4200 devices are a combination of a
microcontroller with programmable logic, high-performance analog-to-digital conversion, two
opamps with comparator mode, and commonly used fixed-function peripherals. For more
information, refer to the PSoC 4 webpage and the PSoC 4200 family datasheet.
Features
■ 32-bit MCU subsystem
❐ 48 MHz Arm Cortex-M0 CPU with single cycle multiply
❐ Up to 32 KB of flash with read accelerator
❐ Up to 4 KB of SRAM
■ Programmable analog
❐ Two opamps with reconfigurable high-drive external and high-bandwidth internal drive, com-
parator modes, and ADC input buffering capability
❐ 12-bit 1-Msps SAR ADC with differential and single-ended modes; channel sequencer with
signal averaging
❐ Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
❐ Two low-power comparators that operate in deep sleep
■ Programmable digital
❐ Four programmable logic blocks called universal digital blocks (UDBs), each with eight Macro-
cells and data path
❐ Cypress-provided peripheral component library, user-defined state machines, and Verilog
input
■ Low power 1.71 to 5.5 V operation
❐ 20-nA Stop mode with GPIO pin wakeup
❐ Hibernate and Deep-Sleep modes allow wakeup-time versus power trade-offs
■ Capacitive sensing
❐ Cypress Capacitive Sigma-Delta (CSD) provides best-in-class SNR (greater than 5:1) and
■ Segment LCD drive
❐ LCD drive supported on all pins (common or segment)
❐ Operates in Deep-Sleep mode with 4 bits per pin memory
■ Serial communication
❐ Two independent run-time reconfigurable serial communication blocks (SCBs) with re-config-
urable I2C, SPI, or UART functionality
■ Timing and pulse-width modulation
❐ Four 16-bit Timer/Counter Pulse-Width Modulator (TCPWM) blocks
❐ Center-aligned, Edge, and Pseudo-random modes
❐ Comparator-based triggering of Kill signals for motor drive and other high-reliability digital
logic applications
■ Up to 36 programmable GPIOs
❐ 44-pin TQFP, 40-pin QFN, and 28-pin SSOP packages
❐ Any GPIO pin can be CapSense, LCD, analog, or digital
❐ Drive modes, strengths, and slew rates are programmable
■ PSoC Creator design environment
❐ Integrated development environment (IDE) provides schematic design entry and build (with
❐ Applications Programming Interface (API) component for all fixed-function and programmable
peripherals
■ Industry-standard tool compatibility
❐ After schematic entry, development can be done with Arm-based industry-standard develop-
ment tools
For more information see the CY8C42 family datasheet.
4.3.2PSoC 5LP
An onboard PSoC 5LP is used to program and debug PSoC 4. The PSoC 5LP connects to the USB
port of the PC through a USB Mini B connector and to the SWD interface of the PSoC 4 device.
PSoC 5LP is a true system-level solution providing MCU, memory, analog, and digital peripheral
functions in a single chip. The CY8C58LPxx family offers a modern method of signal acquisition,
signal processing, and control with high accuracy, high bandwidth, and high flexibility. Analog
capability spans the range from thermocouples (near DC voltages) to ultrasonic signals. For more
information, refer to the PSoC 5LP webpage.
Features
■ 32-bit Arm Cortex-M3 CPU core
❐ DC to 67-MHz operation
❐ Flash program memory, up to 256 KB, 100,000 write cycles, 20-year retention, and multiple
security features
❐ Up to 32-KB flash error correcting code (ECC) or configuration storage
❐ Up to 64 KB SRAM
❐ 2-KB electrically erasable programmable read-only memory (EEPROM) memory, 1 M cycles,
and 20 years retention
❐ 24-channel direct memory access (DMA) with multilayer AHB bus access
a.Programmable chained descriptors and priorities
b.High bandwidth 32-bit transfer support
■ Low voltage, ultra low power
❐ Wide operating voltage range: 0.5 V to 5.5 V
❐ High-efficiency boost regulator from 0.5 V input to 1.8 V to 5.0 V output
❐ 3.1 mA at 6 MHz
❐ Low power modes including:
a.2-µA sleep mode with real time clock (RTC) and low-voltage detect (LVD) interrupt
b.300-nA hibernate mode with RAM retention
■ Versatile I/O system
❐ 28 to 72 I/Os (62 GPIOs, 8 SIOs, 2 USBIOs)
❐ Any GPIO to any digital or analog peripheral routability
❐ LCD direct drive from any GPIO, up to 46×16 segments
❐ CapSense support from any GPIO[3]
❐ 1.2 V to 5.5 V I/O interface voltages, up to 4 domains
❐ Maskable, independent IRQ on any pin or port
❐ Schmitt-trigger transistor-transistor logic (TTL) inputs
❐ All GPIOs configurable as open drain high/low, pull-up/pull-down, High-Z, or strong output
❐ Configurable GPIO pin state at power-on reset (POR)
❐ 25 mA sink on SIO
■ Digital peripherals
❐ 20 to 24 programmable logic device (PLD) based universal digital blocks (UDBs)
❐ Full CAN 2.0b 16 RX, 8 TX buffers
❐ Full-Speed (FS) USB 2.0 12 Mbps using internal oscillator
❐ Four 16-bit configurable timers, counters, and PWM blocks
❐ 67-MHz, 24-bit fixed point digital filter block (DFB) to implement finite impulse response (FIR)
and infinite impulse response (IIR) filters
❐ Library of standard peripherals
a.8-, 16-, 24-, and 32-bit timers, counters, and PWMs
b.Serial peripheral interface (SPI), universal asynchronous transmitter receiver (UART), and
I2C
c.Many others available in catalog
❐ Library of advanced peripherals
a.Cyclic redundancy check (CRC)
b.Pseudo random sequence (PRS) generator
c.Local interconnect network (LIN) bus 2.0
d.Quadrature decoder
❐ Analog peripherals (1.71 V VDDA 5.5 V)
❐ 1.024 V ±0.1% internal voltage reference across –40 °C to +85 °C
❐ Configurable delta-sigma ADC with 8- to 20-bit resolution
❐ Sample rates up to 192 ksps
❐ Programmable gain stage: ×0.25 to ×16
❐ 12-bit mode, 192 ksps, 66-dB signal to noise and distortion ratio (SINAD), ±1-bit INL/DNL
❐ 16-bit mode, 48 ksps, 84-dB SINAD, ±2-bit INL, ±1-bit DNL
❐ Up to two SAR ADCs, each 12-bit at 1 Msps
❐ Four 8-bit 8 Msps current IDACs or 1-Msps voltage VDACs
❐ Four comparators with 95-ns response time
❐ Four uncommitted opamps with 25-mA drive capability
❐ Four configurable multifunction analog blocks. Example configurations are programmable
gain amplifier (PGA), transimpedance amplifier (TIA), mixer, and sample and hold
❐ CapSense support
■ Programming, debug, and trace
❐ JTAG (4 wire), SWD (2 wire), single wire viewer (SWV), and TRACEPORT interfaces
❐ Cortex-M3 flash patch and breakpoint (FPB) block
❐ Cortex-M3 Embedded Trace Macrocell™ (ETM™) generates an instruction trace stream
❐ Cortex-M3 data watchpoint and trace (DWT) generates data trace information
❐ Cortex-M3 Instrumentation Trace Macrocell (ITM) can be used for printf-style debugging
❐ DWT, ETM, and ITM blocks communicate with off-chip debug and trace systems via the SWV
or TRACEPORT
❐ Bootloader programming supportable through I2C, SPI, UART, USB, and other interfaces
■ Precision, programmable clocking
❐ 3- to 62-MHz internal oscillator over full temperature and voltage range
❐ 4- to 25-MHz crystal oscillator for crystal PPM accuracy
❐ Internal PLL clock generation up to 67 MHz
❐ 32.768-kHz watch crystal oscillator
❐ Low-power internal oscillator at 1, 33, and 100 kHz
The power supply system on this board is versatile, allowing the input supply to come from the
following sources:
■ 5-V power from onboard USB programming header J10
■ 5-V to 12-V power from Arduino shield using J1.1 header
■ VTARG - power from the onboard SWD programming using J6 or J7
■ VIN - J11
The PSoC 4 and PSoC 5LP are powered with either a 3.3 V or 5 V source. The selection between
3.3 V and 5 V is made through the J9 jumper. The board can supply 3.3 V and 5 V to the I/O headers
and receive 3.3 V from the I/O headers. The board can also be powered with an external power
supply through the VIN (J11) header; the allowed voltage range for the VIN is 5 V to 12 V. The LDO
regulator regulates the VIN down to 3.3 V. Figure 4-4 shows the power supply block diagram and
protection circuitry.
Note: The 5-V domain is directly powered by the USB (VBUS). For this reason, this domain is
unregulated.
Figure 4-4. Power Supply Block Diagram with Protection Circuits
The power supply rail has reverse-voltage, over-voltage, short circuits, and excess current protection
features, as seen in Figure 4-4.
■ The Schottky diode (D4) ensures power cannot be supplied to the 5-V domain of the board from
the I/O header.
■ The series protection diode (D2) ensures VIN (power supply from the I/O header) does not back
power the USB.
■ The Schottky diode (D11) ensures 3.3 V from I/O header does not back power the LDO.
■ The series protection diode (D13) ensures that the reverse-voltage cannot be supplied from the
VIN to the regulator input.
■ A PTC resettable fuse is connected to protect the computer's USB ports from shorts and over-
current.
■ The MOSFET-based protection circuit provides over-voltage and reverse-voltage protection to
the 3.3-V rail. The PMOS Q1 protects the board components from a reverse-voltage condition.
The PMOS Q2 protects the PSoC from an over-voltage condition. The PMOS Q2 will turn off
when a voltage greater than 4.2 V is applied, protecting the PSoC 4.
■ The output voltage of the LDO is adjusted such that it takes into account the voltage drop across
the Schottky diode and provides 3.3 V.
Hardware
4.3.3.2Procedure to Measure PSoC 4 Current Consumption
The following three methods are supported for measuring current consumption of the PSoC 4
device.
■ When the board is powered through the USB port (J10), remove jumper J13 and connect an
ammeter, as shown in Figure 4-5.
Figure 4-5. PSoC 4 Current Measurement when Powered from USB Port
■ When using a separate power supply for the PSoC 4 with USB powering (regulator output on the
USB supply must be within 0.5 V of the separate power supply).
❐ Remove jumper J13. Connect the positive terminal of voltage supply to the positive terminal of
the ammeter and the negative terminal of the ammeter to the lower pin of J13. Figure 4-6
shows the required connections.
This kit has five Arduino compatible headers; J1, J2, J3, J4 and J12. You can develop applications
based on the Arduino shield’s hardware.
Figure 4-8. Arduino Header
Hardware
The J1 header contains I/O pins for reset, internal reference voltage (IOREF), and power supply line.
The J2 header is an analog port. It contains I/O pins for SAR ADC, comparator, and opamp. The J3
header is primarily a digital port. It contains I/O pins for PWM, I2C, SPI, and analog reference. The
J4 header is also a digital port. It contains I/O pins for UART and PWM. The J12 header is an
Arduino ICSP compatible header for the SPI interface. This header is not populated. Refer to the “No
Load Components” section of A.6 Bill of Materials (BOM) on page 125 for the header part number.
Note: The PSoC 4 pin P0[0] is connected to both pin 13 of the J2 header and pin 5 of the J4 header.
Similarly, the PSoC 4 pin P1[0] is connected to both pin 17 of the J2 header and pin 7 of the J4
header. Therefore, when using P0[0] or P1[0] from either the J2 or J4 header, there should not be
any external signal connected to the other header.
The J2 header is a 9×2 header that supports Arduino shields. The port 0, port 1, and port 2 pins of
PSoC 4 are brought to this header. The port 1 pins additionally connect to the onboard CapSense
slider through 560- resistors. When the CapSense feature is not used, remove these resistors to
ensure a better performance with these pins.
4.3.5.2Functionality of Unpopulated Header J12
The J12 header is a 2×3 header that supports Arduino shields. This header is used on a small
subset of shields and is unpopulated on the PSoC 4 Pioneer Kit. Note that the J12 header only
functions in 5.0 V mode. To ensure proper shield functionality, ensure the power jumper is connected
in 5.0 V mode.
This port supports Digilent Pmod peripheral modules. Pmods are small I/O interfaces, which connect
with the embedded control boards through either 6- or 12-pin connectors. The PSoC Pioneer Kit
supports the 6-pin Pmod type 2 (SPI) interface. For Digilent Pmod cards, go to www.digilentinc.com.
This header is not populated on the PSoC 4 Pioneer Kit. You must populate this header before
connecting the Pmod daughter cards. Refer to the “No Load Components” section of A.6 Bill of
Materials (BOM) on page 125 for the header part number.
The kit has a five-segment linear capacitive touch slider on the board, which is connected to pins
P1[1] to P1[5] of the PSoC 4 device.
The modulation capacitor (Cmod) is connected to pin P4[2] and an optional bleeder resistor (R1) can
be connected across the Cmod. This board supports CapSense designs that enable waterproofing.
The waterproofing design uses a concept called shield, which is a conductor placed around the
sensors. This shield must be connected to a designated shield pin on the device to function. The
shield must be connected to the ground when not used. On the PSoC 4 Pioneer Kit, the connection
of the shield to the pin or to the ground is made by resistors R44 and R45, respectively. By default,
R45 is mounted on the board, which connects the shield to the ground. Populate R44 when
evaluating waterproofing designs, which will connect the shield to the designated pin, P0[1]. This
shield is different from the Arduino shields, which are boards that connect over the Arduino header.
Refer to the CapSense Design Guide for further details related to CapSense.
The PSoC 4 Pioneer board has three LEDs. A green LED (D10) indicates the status of the
programmer. See A.5 Error in Firmware/Status Indication in Status LED for a detailed list of LED
indications. An amber LED (D3) indicates status of power supplied to the board. The kit also has a
general-purpose tricolor LED (D9) for user applications that connect to specific PSoC 4 pins.
Figure 4-15 shows the indication of all these LEDs on the board. Figure 4-16 and Figure 4-17 detail
The kit contains a Reset push button and a User push button, as shown in Figure 4-18.
The Reset button is connected to the XRES pin of PSoC 4 and is used to reset the onboard PSoC 4
device. The User button is connected to P0[7] of PSoC 4 device. Both the push buttons connect to
ground on activation (active low).
Figure 4-18. Push Buttons
Hardware
Note: The PSoC 4 Reset pin (XRES) has an internal pull-up resistor. However, an external pull-up
resistor R10 is connected to the PSoC 4 Reset pin on the kit, which is optional and required only in a
noisy system.
The code examples described in this chapter introduce the functionality of the PSoC 4 device and
the onboard components. To access the examples, download the CD ISO image or setup files from
the kit webpage. After installation, the code examples will be available from Start > Kits on the
PSoC Creator Start Page. For a list of all code examples available with PSoC Creator visit PSoC 3/
PSoC 4/PSoC 5LP Code Examples webpage.
5.1Using the Kit Code Examples
Follow these steps to open and program code examples:
1. Launch PSoC Creator from Start > All Programs > Cypress > PSoC Creator<version> >
PSoC Creator <version>.
2. On the Start page, click CY8CKIT-042 under Start > Kits. A list of code examples appears, as
shown in Figure 5-1.
Figure 5-1. Open Code Example from PSoC Creator
3. Build the code example by choosing Build > Build<Project name>. After the build process is
4. To program, connect the PSoC 4 Pioneer Kit to the computer using the USB cable connected to
port J10, as described in section 3.2 Programming and Debugging PSoC 4 on page 19. The
board is detected as KitProg.
5. Choose Debug > Program in PSoC Creator.
Figure 5-3. Program Device from PSoC Creator
6. If the device is yet to be acquired, the Select Debug Target window will appear. Select KitProg/<serial_number> and click Port Acquire, as shown in Figure 5-4.
The Micrium µC/Probe is a revolutionary software development tool that incorporates Micrium's proprietary Graphical Live Watch to graphically visualize the internals of any embedded system. With
the µC/Probe, you can test your embedded design effortlessly, with a few mouse clicks. Cypress
provides pre-designed µC/Probe project (workspace) files for CapSense and PWM code examples
associated with the CY8CKIT-042 kit. These projects can be found in the kit installation directory in
the following folder:
Refer to section 6.5 Using µC/Probe Tool on page 107 for more details on how to use the Micrium
µC/Probe. To learn more about the µC/Probe, visit: micrium.com/tools/ucprobe/overview.
Note: To use the µC/Probe with PSoC Creator 4.2, the '-gdwarf-3' command line parameter should
be added in the code example under Build Settings, as shown in Figure 5-7.
Figure 5-7. Project Settings – Compiler Command Line Parameter
This code example uses a pulse-width modulator (PWM) to illuminate the RGB LED. The PWM output is connected to pin P0_3 (blue) of the RGB LED. The frequency of blinking is set to 1 Hz with a
duty cycle of 50 percent. The blinking frequency and duty cycle can be varied by varying the period
and compare value respectively.
Note: The PSoC 4 Pioneer Kit is factory-programmed with this example.
Figure 5-8. PSoC Creator Schematic Design of Blinking LED Project
Code Examples
5.3.2Hardware Connections
No specific hardware connections are required for this example because all connections are hard-
wired on the board. Open Blinking LED.cydwr in the Workspace Explorer and select the suitable pin.
Table 5-1. Pin Connection
Pin NamePort Name
Pin_BlueLEDP0_3 (Blue)
Figure 5-9. Pin Selection for Blinking LED Project
Figure 5-10 shows the flow chart of code implemented in main.c.
Figure 5-10. Blinking LED Code Example Flow Chart
5.3.4Verify Output
Code Examples
Build and program the code example onto the device. Observe the frequency and duty cycle of the
blinking LED. Change the period and compare value in the PWM component, as shown in
Figure 5-11. Rebuild and reprogram the device to vary the frequency and duty cycle.
This code example demonstrates the use of the PWM component. The project uses three PWM outputs to set the color of RGB LED on the Pioneer Kit. The LED cycles through seven colors – violet >
indigo > blue > green > yellow > orange > red (VIBGYOR). Each color is maintained for a duration of
one second. The different colors are achieved by changing the pulse width of the PWMs.
Figure 5-12. PSoC Creator Schematic Design of PWM Code Example
Code Examples
5.4.2Hardware Connections
No specific hardware connections are required for this code example because all connections are
hard-wired on the board. Open PWM.cydwr in the Workspace Explorer and select the suitable pins.
This code example demonstrates the low-power functionality of the PSoC 4. The LED is turned on
for one second to indicate Active mode; then, the device enters Deep-Sleep mode. When switch
SW2 is pressed, the device wakes up and the LED is turned on for one second and then goes back
into Deep-Sleep mode.
Figure 5-15. PSoC Creator Schematic Design of Deep-Sleep Project
Code Examples
5.5.2Hardware Connections
No extra connections are required for the code example functionality because the connections are
hard-wired onto the board. To make low-power measurements using this project, refer to the use
case detailed in section 4.3.3.2 Procedure to Measure PSoC 4 Current Consumption on page 34.
Open Deep Sleep.cydwr in the Workspace Explorer and select the suitable pin.
Table 5-3. Pin Connection
Pin NamePort Name
Pin_RedLEDP1_6 (Red)
Pin_WakeUpSwitchP0_7
Figure 5-16. Pin Selection for Deep-Sleep Project
Note that the Debug (SWD) port is disabled in the example to reduce power consumption during
Deep-Sleep power mode. The Debug port can be enabled by setting the Debug Select option to
SWD in the System tab of the .cydwr file, as shown in Figure 5-17. Disabling the debug port dis-
ables the ability to debug the code example through SWD.
Build and program the code example, and reset the device. LED is on for one second and turns off,
which indicates that the device has entered Deep-Sleep mode. Press SW2 switch to wake up the
device from Deep-Sleep mode and enter Active mode. The device goes back to Deep-Sleep mode
after one second.
Note: When the device is in Deep-Sleep mode, the programmer must reacquire the device before
programming can start.
5.6CapSense
This code example can be executed in two ways – with and without CapSense tuning. The same
project can be used to demonstrate the CapSense functionality as well as CapSense tuning using
the Tuner Helper GUI in PSoC Creator. This is done by commenting and uncommenting the line
#define ENABLE_TUNER in the main.c file of the code example. PSoC Creator does not compile
the code under the #ifdef (if defined) statement when the #define statement is commented (/
*…… */ or //). Similarly, when the #define statement is uncommented, the code required for work-
ing with Tuner GUI is compiled. By default, the project is set to work without CapSense tuning by
commenting the #define.
5.6.1CapSense (Without Tuning)
5.6.1.1Project Description
This code example demonstrates CapSense on PSoC 4. The example uses the five-segment
CapSense slider on the board. Each capacitive sensor on the slider is scanned using Cypress’s
CapSense Sigma Delta (CSD) algorithm implemented in the CapSense component. This project is
pre-tuned to take care of the board parasitics. For more information on the CapSense component
and CapSense tuning, see the CapSense component datasheet in PSoC Creator.
In this code example, the brightness of the green and red LEDs are varied, based on the position of
the user’s finger on the CapSense slider.
Code Examples
Figure 5-19. PSoC Creator Schematic Design of CapSense Code Example
Note: The EzI2C component is not used when tuning is disabled.
Figure 5-21 shows the flow chart of code implemented in main.c.
Figure 5-21. CapSense Project Flow Chart
Code Examples
5.6.1.4Verify Output
The brightness of the green and red LEDs are varied based on the position of the user’s finger on
the CapSense slider. When the finger is on segment 5 (P1[5]) of the slider, the green LED is brighter
than the red LED; when the finger is on segment 1 (P1[1]) of the slider, the red LED is brighter than
the green LED.
This code example demonstrates CapSense tuning on PSoC 4 using the "Tuner" to monitor
CapSense outputs. The CapSense outputs such as rawcounts, baseline, and signal (difference
count) can be monitored on the Tuner GUI. The project uses the auto-tuning feature, which sets all
CapSense parameters to the optimum values automatically. The parameter settings can be monitored in the GUI but cannot be altered. In the manual tuning method, parameter settings can be
changed in the GUI and the resulting output can be seen.
The code example uses the five-segment CapSense slider on the board. Each capacitive sensor on
the slider is scanned using Cypress's CapSense Sigma Delta (CSD) algorithm implemented in the
CapSense component. The code uses tuner APIs. The tuner API CapSense_TunerComm() is used
in the main loop to scan sensors, which also sends the CapSense variables RawCounts, Baseline,
and Difference Counts (Signal) to the PC GUI through I2C communication.
In this example, the brightness of the green and red LEDs are varied, based on the position of the
user's finger on the CapSense slider.
See Figure 5-19 for the project schematic.
5.6.2.2Hardware Connections
Code Examples
No specific hardware connections are required for this code example because all connections are
hard-wired on the board. Open CapSense.cydwr in the Workspace Explorer and select the suitable
pins.
See Ta bl e 5 -4 and Figure 5-20 for the CapSense project pin connections.
2. Select a sensor in the Tuning tab. A red outline is seen on the selected sensor. Different
CapSense parameters are shown in Sensor Properties tab on the bottom-right. You cannot edit
the settings because auto-tuning is used in this project; auto-tuning automatically sets all the
parameters. Touch the selected sensor and observe the response in the tuner window.
Note: The board is designed according to layout guidelines for CapSense (best practices) for
1.5-mm overlay. Therefore, it is recommended that an overlay (not shipped with the kit) be used
while using the CapSense code example with tuning.
Figure 5-28. Sensor Tuning
3. In the Graphing tab, the CapSense results: Raw counts, Baseline, Signal (difference count) and
On/Off status for each sensor are represented as a graph. Click the Graphing Properties tab on
the bottom-right to select the slider element for which the CapSense results are to be shown in
the Graphing tab.
The PSoC 5LP serves as a USB-UART bridge, which can communicate with the COM terminal
software. This section explains how to create a PSoC 4 code example to communicate with the
COM terminal software. This project is available with other code examples for the PSoC 4 Pioneer
Kit at the element14 webpage, 100 Projects in 100 days.
Users who have a Windows operating system that does not have HyperTerminal can use an
alternate terminal software such as PuTTY.
1. Create a new CY8CKIT-042 (PSoC 4200) Kit project in PSoC Creator, as shown in the following
figures. Select a specific location for your project and name the project as desired. You must
select the appropriate target hardware (kit) for this project. Ensure that the Select project tem-plate option is set to ‘Empty schematic’. This example uses PSoC 4200 as the target device and
CY8CKIT-042 as the target board.
9. Build the project by clicking Build > Build {Project Name} or [Shift] + [F6]. After the project is
built without errors and warnings, program (by clicking Debug > Program) the project to PSoC 4
through the PSoC 5LP USB programmer or MiniProg3.
Connect the RX line of the PSoC 4 to J8.10 and TX line of the PSoC 4 to J8.9, as shown in the
following figures.
Figure 6-10. UART Connection Between PSoC 4 and PSoC 5LP
Figure 6-11. Block Diagram of UART Connection Between PSoC 4 and PSoC 5LP
Note: UART RX and UART TX can be routed to any digital pin on PSoC 4 based on the configuration of the UART component. An SCB implementation of UART will route the RX and TX pins to
either one of the following subsets: (P0[4], P0[5]) or (P3[0],P3[1]) or (P4[0],P4[1]).
To communicate with the PSoC 4 from the terminal software, follow this procedure:
1. Connect USB Mini B to J10. The kit enumerates as a KitProg USB-UART and is available under
the Device Manager, Ports (COM & LPT). A communication port is assigned to the
KitProg USB-UART.
5. Enable Echo typed characters locally under File > Properties > Settings > ASCII Setup, to
display the typed characters on HyperTerminal. In PuTTY, enable the Force on under Terminal > Line discipline options to display the typed characters on the PuTTY.
Figure 6-17. Enabling Echo of Typed Characters in HyperTerminal
The PSoC 5LP serves as a USB-I2C bridge, which can be used to communicate with the USB-I2C
software running on the PC. This project is available with other code examples for the PSoC 4 Pioneer Kit at the element14 webpage, 100 Projects in 100 days.
The following steps describe how to use the USB-I2C bridge, which can communicate between the
BCP and the PSoC 4.
1. Create a new CY8CKIT-042 (PSoC 4200) Kit project in PSoC Creator, as shown in the following
figures. Select a specific location for your project and name the project as desired. You must
select the appropriate target hardware (kit) for this project. Ensure that the Select project tem-plate option is set to ‘Empty schematic’. This example uses PSoC 4200 as the target device and
CY8CKIT-042 as the target board.
6. Build the project by clicking Build > Build Project or [Shift]+[F6]. After the project is built without
errors and warnings, program ([Ctrl]+[F5]) this code onto the PSoC 4 through the PSoC 5LP programmer or MiniProg3.
7. Open the BCP from Start > All Programs > Cypress > Bridge Control Panel <version num-ber>.
8. Connect to KitProg/<serial_number> under Connected I2C/SPI/RX8 Ports.
Figure 6-30. Connecting to KitProg/<serial_number> in BCP
9. Open Protocol Configuration from the Too ls menu and select the appropriate I2C Speed.
Make sure the I2C speed is the same as the one configured in the I2C component. Click OK to
close the window.
Figure 6-31. Opening Protocol Configuration Window in BCP
10.From the BCP, transfer five bytes of data to the I2C device with slave address 0x08. The log
shows whether the transaction was successful. A '+' indication after each byte indicates that the
transaction was successful and a '–' indicates that the transaction was a failure.
The PSoC 4 Pioneer Kit has an onboard PSoC 5LP whose primary function is that of a programmer
and a bridge. You can build either a normal project or a bootloadable project using the PSoC 5LP.
The PSoC 5LP connections in the Pioneer board are summarized in Figure 6-35. J8 is the I/O connector (see section 4.3.7 PSoC 5LP GPIO Header (J8)). The USB (J10) is connected and used as
the PC interface. But you can still use this USB connection to create customized USB designs.
The programming header (J7) is meant for standalone programming. This header needs to be
populated. See the 'No Load Components' section in A.6 Bill of Materials (BOM) on page 125.
Figure 6-35. PSoC 5LP Block Diagram
Advanced Topics
6.3.1Building a Bootloadable Project for PSoC 5LP
All bootloadable applications developed for the PSoC 5LP should be based on the bootloader hex
file, which is programmed onto the kit. The bootloader hex file is available in the kit files or can be
downloaded from the kit webpage.
The hex files are included in the following kit installer directory:
To build a bootloadable application for the PSoC 5LP, follow this procedure:
1. In PSoC Creator, choose File > New > Project and select Target Device; select <Launch Device Selector...> from the drop-down list, as shown in Figure 6-37.
Figure 6-37. Opening New Project in PSoC Creator
2. Select CY8C5868LTI-LP039, as shown in Figure 6-38. Click OK; then, click Next.
Note: In PSoC Creator 3.1 or earlier, you must either set the Application Type as Bootloadable
in the New Project window under the Advanced section, or you can change it after project
creation by selecting Project > Build Settings and clicking <Project Name> > Application Type > Bootloadable. Beginning with PSoC Creator 3.2, the Application Type option is
removed from the New Project window and the Build Settings menu. PSoC Creator 3.2 and later
versions automatically recognize the application type from the TopDesign schematic.
6. Build the project in PSoC Creator by selecting Build > Build Project or [Shift]+[F6].
7. To download the project on to the PSoC 5LP device, open the Bootloader Host Tool, which is
available from PSoC Creator. Select Tools > Bootloader Host.
Advanced Topics
Figure 6-47. Opening Bootloader Host Tool from PSoC Creator
8. Keep the reset switch (SW1) pressed and plug in the USB Mini-B connector. If the switch is
pressed for more than 100 ms, the PSoC 5LP enters into bootloader. The PSoC 5LP also enters
into bootloader when the power supply jumper for the PSoC 4 (J13) is removed and
subsequently the USB Mini-B connector is plugged into header J10.
11. Press the Program button in the Bootloader Host tool to program the device.
Figure 6-50. Selecting Bootloadable.cyacd File from Bootloader Host
Advanced Topics
12.If bootload is successful, the log of the tool displays "Successful"; otherwise, it displays "Failed"
and a statement for the failure.
Notes:
1. The PSoC 5LP pins are brought to the PSoC 5LP GPIO header (J8). These pins are selected to
support high-performance analog and digital projects. See A.2 Pin Assignment Table on
page 120 for pin information.
2. Take care when allocating the PSoC 5LP pins for custom applications. For example, P2[0]–P2[4]
are dedicated for programming the PSoC 4. Refer to A.1 CY8CKIT-042 Schematics on page 116
before allocating the pins.
3. When a normal project is programmed onto the PSoC 5LP, the initial capability of the PSoC 5LP
to act as a programmer, USB-UART bridge, or USB-I2C bridge in not available.
4. The status LED does not function unless used by the custom project.
For additional information on bootloaders, refer to Cypress application note, AN73503 - PSoC
A normal project is a completely new project created for the PSoC 5LP device on the CY8CKIT-042.
Here the entire flash of the PSoC 5LP is programmed, overwriting all bootloader and programming
code. To recover the programmer, reprogram the PSoC 5LP device with the factory-set KitProg.hex
file, which is shipped with the kit installer.
The KitProg.hex file is available at the following location:
This advanced functionality requires a MiniProg3 programmer, which is not included with this kit. The
MiniProg3 can be purchased from www.cypress.com/CY8CKIT-002.
To build a normal project for the PSoC 5LP, follow these steps:
1. In PSoC Creator, choose File > New > Project and select Target device; select <Launch Device Selector...> from the drop-down list as shown in Figure 6-51.
Figure 6-51. Opening New Project in PSoC Creator
Advanced Topics
2. Select CY8C5868LTI-LP039, as shown in Figure 6-52. Click OK and click Next.
4. In the Create Project dialog, choose the workspace name, location, and project name
(Figure 6-54). Click Finish.
Figure 6-54. Create Project Dialog
5. Develop your custom project.
6. Build the project in PSoC Creator by selecting Build > Build Project or [Shift]+[F6].
7. Connect the 10-pin connector of MiniProg3 to the onboard 10-pin SWD debug and programming
header J7 (which needs to be populated).
8. To program the PSoC 5LP with PSoC Creator, click Debug > Program or [Ctrl]+[F5]. The Pro-
gramming window shows MiniProg3 and the selected device in the project under it
(CY8C5868LTI-LP039).
9. Click on the device and click Connect to program.
Notes:
1. The 10-pin SWD debug and programming header (J7) is not populated. See the 'No Load Components' section of A.6 Bill of Materials (BOM) for details.
2. The PSoC 5LP pins are brought to the PSoC 5LP GPIO header (J8). These pins are selected to
support high-performance analog and digital projects. See A.2 Pin Assignment Table for pin infor-
mation.
3. Take care when allocating the PSoC 5LP pins for custom applications. For example, P2[0]–P2[4]
are dedicated for programming the PSoC 4. Refer to A.1 CY8CKIT-042 Schematics before allo-
cating the pins.
4. When a normal project is programmed onto the PSoC 5LP, the initial capability of the PSoC 5LP
to act as a programmer, USB-UART bridge, or USB-I2C bridge in not available.
5. The status LED does not function unless used by the custom project.
The CY8CKIT-042 PSoC 4 Pioneer Kit features a PSoC 5LP device that comes factory-programmed
as the onboard programmer and debugger for the PSoC 4 device.
In addition to creating applications for the PSoC 4 device, you can also create custom applications
for the PSoC 5LP device on this kit. For details, see section 6.3 Developing Applications for PSoC
5LP on page 88. Reprogramming or bootloading the PSoC 5LP device with a new flash image will
overwrite the factory program and forfeit the ability to use the PSoC 5LP device as a programmer/
debugger for the PSoC 4 device. Follow the instructions to restore the factory program on the PSoC
5LP and enable the programmer/debugger functionality.
6.4.1PSoC 5LP is Programmed with a Bootloadable Application
If the PSoC 5LP is programmed with a bootloadable application, restore the factory program by
using one of the following two methods.
6.4.1.1Restore PSoC 5LP Factory Program Using PSoC Programmer
1. Launch PSoC Programmer 3.27.1 or later from Start > Cypress > PSoC Programmer.
2. Configure the Pioneer Kit in Service Mode. To do this, while holding down the reset button (SW1
Reset), plug in the PSoC 4 Pioneer Kit to the computer using the included USB cable (USB A to
mini-B). This puts the PSoC 5LP into service mode, which is indicated by the blinking green status LED.