Cypress Semiconductor CY7C185-20VI, CY7C185-20VCT, CY7C185-20VC, CY7C185-20SC, CY7C185-20PC Datasheet
...
8K x 8 Static RAM
f
ax id:
1013
CY7C185
Cypress Semiconductor Corporation
• 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Au
g
ust 12, 1998
Features
• High speed
—15 ns
• Fast t
DOE
• Low active power
—715 mW
• Low standb y p ow er
—220 mW
• CMOS for optimum speed/power
• Easy memory expansion with CE
1
, CE2, and OE f eatures
• TTL-compatibl e inputs and outputs
• Automat ic power-down wh en deselected
Functional Description
The CY7C185 is a high-performance CMOS stati c RAM organized as 8192 words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE
1
), an active HIGH
chip enable (CE
2
), and active LOW output enable (OE) and
three-state driv ers . This de vi ce has an automati c power -down
feature (CE
1
or CE2), reduci ng the po wer consum ption b y 70%
when deselected. The CY7C185 i s in a st andard 3 00-mil -wide
DIP, SOJ, or SOIC package.
An active LOW write enable signal (WE
) controls the writ-
ing/reading operation of the memory. When CE
1
and WE in-
puts are both LOW and CE
2
is HIGH, data on the eight data
input/output pin s (I/O
0
through I/O7) is written into the memory
location addressed by the address present on the address
pins (A
0
through A12). Reading the device is acco mplishe d by
selecting the device and enabling the outputs, CE
1
and OE
active LOW, CE2 active HIG H, wh ile WE rem ains in active or
HIGH. Under the se condit ions , the co ntents of t he locat ion ad dressed by t he information on address pins ar e pr esent on t he
eight data input/output pins.
The input/out put pins rem ain in a high- impedance s tate unless
the chip is selected, outputs are enabled, and write enable
(WE
) is HIGH. A die coat is used to insure alpha immunity.
Logic Block Diagram Pin Configurations
C185–1
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
0
A
10
A
9
A11A
12
I/O
0
C185–2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
CE
2
A
3
A
2
A
1
OE
A
0
CE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
NC
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
I/O
0
I/O
1
I/O
2
GND
256 x 32 x 8
ARRAY
INPUT BUFFER
COLUMN DECODER
ROW DECODER
SENSE AMPS
POWER
DOWN
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
CE
1
CE
2
WE
OE
Top View
DIP/SOJ/SOIC
Selection Guide
[1]
7C185–15 7C185–20 7C185–25 7C185–35
Maximum Access Time (ns) 15 20 25 35
Maximum Operating Current (mA) 130 110 100 100
Maximum Standby Current (mA) 40/15 20/15 20/15 20/15
Note:
1. For military specifications, see the CY7C185A datasheet.
CY7C185
2
Maximum Ratings
(Above whic h the useful lif e ma y be impai red. F or user gui delines, not tested.)
Storage Temperature .............. .......... .........–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potent ial........ .......–0.5V to +7.0V
DC V oltage Applied to Outputs
in High Z State
[2]
............................................ –0.5V to +7.0V
DC Input Voltage
[2]
......................................... –0.5V to +7.0V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage .......... ............ .................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current...................... .......... .......... .......... >200 mA
Operating Range
Range
Ambient
Temperature
V
CC
Commercial 0°C to +70°C 5V ± 10%
Industrial –40°C to +85°C 5V ± 10%
Electrical Characteristics
Over the Operati ng Range
7C185–15 7C185–20
Parameter Description Te st Conditions Min. Max. Min. Max. Unit
V
OH
Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 2.4 V
V
OL
Output LOW Voltage VCC = Min., IOL = 8.0 mA 0.4 0.4 V
V
IH
Input HIGH Voltag e 2.2 VCC +
0.3V
2.2 VCC +
0.3V
V
V
IL
Input LOW Voltage
[2]
–0.5 0.8 –0.5 0.8 V
I
IX
Input Load Current GND ≤ VI ≤ V
CC
–5 +5 –5 +5
µA
I
OZ
Output Leakage
Current
GND ≤ V
I
≤ V
CC
,
Output Disabled
–5 +5 –5 +5
µA
I
OS
Output Short
Circuit Current
[3]
VCC = Max.,
V
OUT
= GND
–300 –300 mA
I
CC
VCC Operating
Supply Current
V
CC
= Max.,
I
OUT
= 0 mA
130 110 mA
I
SB1
Automatic
Power-Down Current
Max. VCC, CE1 ≥ VIH or CE
2 ≤ VIL
Min. Duty Cycle=100%
40 20
mA
I
SB2
Automatic
Power-Down Current
Max. VCC, CE1 ≥ VCC – 0.3V,
or CE
2
≤ 0.3V
V
IN
≥ VCC – 0.3V or VIN ≤ 0.3V
15 15
mA
Notes:
2. Minimum voltage is equal to –3.0V for pulse durations less than 30 ns.
3. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
CY7C185
3
Electrical Characteristics
Over the Operati ng Range (continued)
7C185–25 7C185-35
Parameter Description Test Conditions Min. Max. Min. Max. Unit
V
OH
Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 2.4 V
V
OL
Output LOW Voltage VCC = Min., IOL = 8.0 mA 0.4 0.4 V
V
IH
Input HIGH Voltage 2.2 VCC +
0.3V
2.2 VCC +
0.3V
V
V
IL
Input LOW Voltage
[2]
–0.5 0.8 –0.5 0.8 V
I
IX
Input Load Current GND ≤ VI ≤ V
CC
–5 +5 –5 +5
µA
I
OZ
Output Leakage
Current
GND ≤ V
I
≤ V
CC
,
Output Disabled
–5 +5 –5 +5
µA
I
OS
Output Short
Circuit Current
[3]
VCC = Max.,
V
OUT
= GND
–300 –300 mA
I
CC
VCC Operating
Supply Current
V
CC
= Max.,
I
OUT
= 0 mA
100 100 mA
I
SB1
Automatic
Po wer-Down Current
Max. VCC, CE1 ≥ VIH or CE
2 ≤ VIL
Min. Duty Cycle =100%
20 20 mA
I
SB2
Automatic
Po wer-Down Current
Max. VCC, CE1 ≥ VCC – 0.3V
or CE
2
≤ 0.3V
V
IN
≥ VCC – 0.3V or VIN ≤ 0.3V
15 15 mA
Capacitance
[4]
Parameter Description Test Conditions Max. Unit
C
IN
Input Capacitance TA = 25°C, f = 1 MHz,
V
CC
= 5.0V
7 pF
C
OUT
Output Capacitance 7 pF
Note:
4. Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
R1 481
Ω
3.0V
5V
OUTPUT
R1 481
Ω
R2
255
Ω
30pF
GND
90%
90%
10%
≤
5ns
≤
5
ns
5V
OUTPUT
C185–4
R2
255
Ω
5
pF
C185–5
(a) (b)
OUTPUT 1.73V
INCLUDING
JIG AND
SCOPE
INCLUDING
JIGAND
SCOPE
10%
Equivalent to: THÉVENIN EQUIVALENT
ALL INPUT PULSES
167
Ω
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