
CY7C1009V33
CY7C109V33
128K x 8 Static RAM
Features
• High speed
= 15, 20, 25ns
—t
AA
= 3.3V ± 10%
•V
CC
• Low active power
—432 mW (max.)
—288 mW (L version)
• Low CMOS standby power
— 18 mW (max.)
—7.2 mW (L version)
• 2.0V Data Retention
• Automat ic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion wi th CE
, CE2, and OE options
1
Functional Description
The CY7C109V33/CY7C1009V33 is a high-performance
CMOS static RAM organi zed as 131, 072 word s by 8 bit s. Easy
Logic Block Diagram
INPUT BUFFER
A
0
A
1
A
2
A
3
A
CE
CE
WE
OE
4
A
5
A
6
A
A
1
2
ROW DECODER
7
8
512 x256 x 8
ARRAY
COLUMN
DECODER
11
10
9
A
A
A
SENSE AMPS
POWER
DOWN
14
15
12
16
A
A
A
A13A
Selectio n Guide
Maximum Access Time (ns) 12 15 20 20
Maximum Operating Current (mA) 130 120 110 110
Maximum Operating Current (mA) Low Power Version 90 80 70 70
Maximum CMOS Standby Current (mA) Standard 5555
Maximum CMOS Standby Current (mA) Low Po wer Version 2222
Shaded areas contain preliminary information.
memory expansion is p rovi ded by an activ e LO W Chip Enabl e
(CE
), an active HIGH Chip Enab le (CE2), an activ e LOW Out-
1
put Enable (OE
is accomplished by taking Chip Enable one (CE
Enable (WE
HIGH. Data on the eight I/O pins (I/O
written into the location specified on the address pins (A
), and three-state drivers. Writin g to the device
) and Write
1
) inputs LOW and Chip Enable two (CE2) input
through I/O7) is then
0
through A16).
Reading from the device is accomplished by taking Chip En-
able one (CE
Write Enable (WE
) and Output Enable (OE) LOW whil e forcing
1
) and Chip Enable two (CE2) HIGH. Under
these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
through I/O7) are placed in a
0
high-impedance state when the device is deselected (CE
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a write oper ation ( CE
LOW , CE2 HIGH, and W E LOW) .
1
The CY7C109V33 is available in standard 32-pin,
400-mil-wide SOJ pa c kage . The CY7C1009V3 3 is a v ailab l e in
a 32-pin, 300-mil- wide SOJ pac kage . The CY7C1009V 33 and
CY7C109V33 are functionally equivalent in all other respects.
Configurations
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
I/O
I/O
109V33–1
CE
5
V
6
7
7C109V33-12
7C1009V33-12
A
1
11
2
A
9
3
A
8
4
A
13
5
WE
6
2
7
A
15
8
CC
9
NC
A
10
16
A
11
14
A
12
12
A
13
7
A
14
6
15
A
5
16
A
4
7C109V33-15
7C1009V33-15
Pin
GND
Top View
NC
1
A
16
2
A
3
14
A
4
12
5
A
7
A
6
6
A
5
7
A
8
4
A
9
3
A
10
2
A
1
11
A
12
0
I/O
0
13
I/O
1
14
I/O
2
15
16
Top View
(not to scale)
7C109V33-20
7C1009V33-20
SOJ
TSOP I
V
32
CC
31
A
15
30
CE
2
29
WE
28
A
13
27
A
8
26
A
9
25
A
11
24
OE
23
A
10
22
CE
1
I/O
21
7
I/O
6
20
I/O
5
19
I/O
4
18
I/O
17
3
109V33–2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
7C109V33-25
7C1009V33-25
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
0
A
1
A
2
A
3
109V33–3
0
1
Cypress Semiconductor Corporation
• 3901 North First Street • San Jose • CA 95134 • 408-943-2600
September 3, 1999

Maximum Ratings
(Abov e which the useful life may be impair ed. For user gui delines, not tested.)
Storage Temperature ................. .. .......... ....–65°C to +15 0°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on VCC to Relative GND
DC Voltage Applied to Outputs
in High Z State
[1]
.....................................–0.5V to VCC +0.5V
Electrical Characteristics
[1]
....–0.5V to +7.0V
Over the Operating Range
CY7C1009V33
CY7C109V33
[1]
DC Input Voltage
Curre n t in to Out p ut s (L OW )........ .. .......... .. .......... .. ....... 20 mA
Operating Range
Range
Commercial 0°C to +70°C 3.3V ± 300mV
................................. –0.5V to VCC +0.5V
Ambient
Temperature
[2]
V
CC
Parameter Description
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
Output HIGH Voltage VCC = Min.,
Output LOW Voltage VCC = Min.,
Input HIGH Voltage 2.2 V
Input LOW Voltage
Input Load Current GND < VI < V
Output Leakage
Current
I
CC
I
SB1
VCC Operating
Supply Current
Autom atic CE
Po wer-Down Current
—TTL Inputs
I
SB2
Autom atic CE
Po wer-Down Current
—CMOS Inputs
Shaded areas contain preliminary information.
Notes:
1. V
(min.) = –2.0V for pulse durations of less than 20 ns.
IL
2. T
is the case temperature.
A
Test Conditions
7C109V33-12
7C1009V33-12
Min. Max. Min. Max. Unit
7C1009V33-15
7C109V33–15
2.4 2.4 V
I
= –4.0 mA
OH
0.4 0.4 V
I
= 8.0 mA
OL
CC
+ 0.3
[1]
CC
GND < VI < VCC,
–0.3 0.8 –0.3 0. 8 V
–1 +1 –1+1µA
–5 +5 –5+5µA
2.2 V
CC
+ 0.3
V
Output Disabled
VCC = Max.,
I
= 0 mA,
OUT
f = f
MAX
= 1/t
RC
Max. VCC, CE1 > V
L
IH
130 120 mA
90 80
25 20 mA
or CE2 < VIL,
V
> VIH or
IN
V
< VIL, f = f
IN
Max. VCC,
CE
> VCC – 0.3V,
1
or CE
V
> VCC – 0.3V,
IN
or V
< 0.3V, f=0
IN
< 0.3V,
2
MAX
55mA
L
22
2

CY7C1009V33
CY7C109V33
Electrical Characteristics
Parameter Description Min. Max. Min. Max. Unit
V
V
V
V
I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH
OL
IH
IL
Output HIGH Voltage VCC = Min.,
Output LOW Voltage VCC = Min.,
Input HIGH Voltage 2.2 V
Input LOW Voltage
Input Load Current GND < VI < V
Output Leakage
Current
VCC Operating
Supply Current
Autom atic CE
Po wer-Down Current
—TTL Inputs
Autom atic CE
Po wer-Down Current
—CMOS Inputs
Over the Operating Range (continued)
Test Conditions
I
= –4.0 mA
OH
I
= 8.0 mA
OL
[1]
CC
GND < VI < VCC,
Output Disabled
VCC = Max.,
I
= 0 mA,
OUT
f = f
MAX
Max. V
or CE2 < VIL,
V
> VIH or
IN
V
< VIL, f = f
IN
= 1/t
, CE1 > V
CC
RC
IH
MAX
Max. VCC,
CE
> VCC – 0.3V,
1
or CE
< 0.3V,
2
V
> VCC – 0.3V,
IN
or V
< 0.3V, f=0
IN
7C1009V33-20
7C109V33-20
7C1009V33-25
7C109V33-25
2.4 2.4 V
0.4 0.4 V
CC
+ 0.3
2.2 V
CC
+ 0.3
–0.3 0.8 –0.3 0. 8 V
–1+1–1+1µA
–5+5–5+5µA
110 110 mA
L70 70
20 20 mA
55mA
L2 2
V
Capacitance
[3]
Parameter Description Te st Conditions Max. Unit
C
IN
C
OUT
Note:
3. Tested initially and after any design or process changes that may affect these parameters.
Input Capacitance TA = 25°C, f = 1 MHz,
V
= 3.3V
Output Capacitance 8 pF
CC
6pF
AC Test Loads and Waveforms
R1 480
3V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
Equivalent to: VENIN EQUIVALENT
OUTPUT
(a)
THÉ
Ω
167
OUTPUT
R2
255
Ω
Ω
1.73V
3V
5 pF
INCLUDING
JIG AND
SCOPE
(b)
R1 480
Ω
255
109V33–4
R2
3.0V
GND
Ω
3ns
≤
ALL INPUT PULSES
90%
10%
90%
10%
3
≤
109V33–5
ns
3