• Available in Pb-free and non Pb-free 48-ball VFBGA,
32-pin TSOP II and 400-mil SOJ package
Functional Description
The CY7C1019CV33 is a high-performance CMOS static
RAM organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE
active LOW Output Enable (OE
), and tri-state drivers. This
), an
Logic Block Diagram
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE
) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
through I/O7) is then written into the location
0
through A16).
0
Reading from the device is accomplished by taking Chip
Enable (CE
Enable (WE
) and Output Enable (OE) LOW while forcing Write
) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE
LOW, and WE LOW).
The CY7C1019CV33 is available in Standard 48-ball FBGA,
32-pin TSOP II and 400-mil-wide SOJ packages
Pin
Configuration
SOJ/TSOP II
Top View
CE
WE
OE
A
1
0
A
1
2
A
3
CE
I/O
I/O
V
V
I/O
I/O
WE
A
CC
SS
A
A
A
A
2
4
3
5
6
0
7
1
8
9
10
2
3
11
12
4
13
5
14
6
15
16
7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
INPUTBUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
A
ROW DECODER
7
8
128K x 8
DECODER
9
10
A
A
ARRAY
COLUMN
12
A11A13A
SENSE AMPS
POWER
DOWN
14
15
16
A
A
A
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
A
A
A
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
16
15
14
13
7
6
SS
CC
5
4
12
11
10
9
8
Cypress Semiconductor Corporation•198 Champion Court•San Jose, CA 95134-1709•408-943-2600
Document #: 38-05130 Rev. *F Revised August 3, 2006
[+] Feedback
CY7C1019CV33
Pin Configuration
[1]
48-ball VFBGA
(Top View)
NC
I/O
I/O
V
V
I/O
I/O
NC
SS
CC
1
2
OE
NC
0
NC
1
NC
NC
NC
NC
2
NC
3
A
10
A
A
A
NC
A
A
A
4
A
A
A
A
NC
A
A
A
5
6
A
NC
7
6
CE
NC
NC
NC
I/O
WE
A
I/O
I/O
V
CC
V
I/O
4
A
NC
9
5
4
3
11
12
13
SS
A
B
7
C
6
D
E
F
5
G
8
H
3
2
1
0
14
15
16
Selection Guide
-10-12-15Unit
Maximum Access Time101215ns
Maximum Operating Current807570mA
Maximum Standby Current555mA
Note:
1. NC pins are not connected on the die.
Document #: 38-05130 Rev. *FPage 2 of 10
[+] Feedback
CY7C1019CV33
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on V
DC Voltage Applied to Outputs
in High-Z State
[2]
DC Input Voltage
to Relative GND
CC
....................................–0.5V to VCC + 0.5V
[2]
.................................–0.5V to VCC + 0.5V
[2]
....–0.5V to +4.6V
Electrical Characteristics Over the Operating Range
ParameterDescriptionT e st Con dit ions
V
V
V
V
I
I
I
I
I
OH
OL
IH
IL
IX
OZ
CC
SB1
SB2
Output HIGH Voltage VCC = Min.,
= –4.0 mA
I
OH
Output LOW Voltage VCC = Min.,
I
= 8.0 mA
OL
Input HIGH Volt age2.0V
Input LOW Voltage
Input Leakage Current GND < VI < V
Output Leakage
Current
VCC Operating
Supply Current
Automatic CE
Power-down Current
—TTL Inputs
Automatic CE
Power-down Current
—CMOS Inputs
[2]
GND < VI < VCC,
Output Disabled
VCC = Max.,
I
= 0 mA,
OUT
f = f
MAX
Max. VCC, CE > V
VIN > VIH or
< VIL, f = f
V
IN
Max. V
CC
CE
> VCC – 0.3V,
V
> VCC – 0.3V,
IN
< 0.3V, f = 0
or V
IN
= 1/t
,
CC
RC
IH
MAX
Current into Outputs (LOW).........................................20 mA
Latch-up Current......................................................>200 mA
Operating Range
Range
Commercial0°C to +70°C 3.3V ± 10%
Industrial–40°C to +85°C3.3V ± 10%
–10–12–15
2.42.42.4V
0.40.40.4V
+ 0.32.0V
CC
–0.30.8–0.30.8–0.30.8V
–1+1–1+1–1+1µA
–1+1–1+1–1+1µA
807570mA
151515mA
555mA
Ambient
TemperatureV
+ 0.32.0VCC + 0.3V
CC
CC
UnitMin.Max.Min.Max.Min.Max.
Capacitance
[3]
ParameterDescriptionTest ConditionsMax.Unit
C
IN
C
OUT
Notes:
(min.) = –2.0V for pulse durations of less than 20 ns.
2. V
IL
3. Tested initially and after any design or process ch anges that may affect these parameters.
Input CapacitanceTA = 25°C, f = 1 MHz,
Output Capacitance8pF
Document #: 38-05130 Rev. *FPage 3 of 10
V
= 5.0V
CC
8pF
[+] Feedback
CY7C1019CV33
AC Test Loads and Waveforms
3.3V
OUTPUT
30 pF
R 317Ω
R2
351Ω
(a)
Switching Characteristics
[4]
3.0V
GND
Rise Time: 1 V/ns
90%
10%
Over the Operating Range
ALL INPUT PULSES
(b)
[5]
-10-12
High-Z characteristics:
90%
10%
Fall Time: 1 V/ns
3.3V
R 317Ω
OUTPUT
5 pF
(c)
-15
ParameterDescription
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
[8]
t
PU
[8]
t
PD
Write Cycle
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
LZWE
t
HZWE
Notes:
4. AC characteristics (except High-Z) for all speeds are tested using the Thevenin load shown in Figure (a). High-Z charact eristics are t ested for all spe eds using
the test load shown in Figure (c).
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3. 0V.
6. t
HZOE
7. At any given temperature and voltage condition, t
8. This parameter is guaranteed by design and is not tested.
9. The internal write time of the memory is defined by the overlap of CE
any of these signals can terminate the write. Th e input data set-up and hold timing shou ld be referenced to the leading edge of the signal that terminates the write.
10.The minimum write cycle time for Write Cycle no. 3 (WE
Read Cycle Time101215ns
Address to Data Valid101215ns
Data Hold from Address Change333ns
CE LOW to Data Valid
OE LOW to Data V alid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
[6, 7]
[7]
[6, 7]
CE LOW to Power-Up
CE HIGH to Power-Down
[9, 10]
00
333ns
00
1012
56
0ns
567ns
567ns
0ns
1012
Write Cycle Time101215ns
CE LOW to Write End8910ns
Address Set-Up to Write End8910ns
Address Hold from Write End000ns
Address Set-Up to Write Start000ns
WE Pulse Width
78
10ns
Data Set-Up to Write End568ns
Data Hold from Write End000ns
WE HIGH to Low Z
WE LOW to High Z
, t
, and t
HZCE
HZWE
[7]
[6, 7]
are specified with a load capacitance of 5 pF as in part (d) of AC Test Loa ds. Transition is measure d ±500 mV from steady-state vol tage.
is less than t
HZCE
controlled, OE LOW) is the sum of t
333ns
567ns
, t
LZCE
LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of
is less than t
HZOE
LZOE
HZWE
, and t
and tSD.
HZWE
is less than t
for any given device.
LZWE
15ns
7ns
15ns
R2
351Ω
UnitMin.Max.Min.Max.Min.Max.
Document #: 38-05130 Rev. *FPage 4 of 10
[+] Feedback
Switching Waveforms
Read Cycle No. 1
[11, 12]
ADDRESS
DATA OUT
PREVIOUS DATA VALIDDATA VALID
t
OHA
CY7C1019CV33
t
RC
t
AA
Read Cycle No. 2 (OE Controlled)
ADDRESS
CE
OE
DATA OUT
V
CC
SUPPLY
HIGH IMPEDANCE
t
LZCE
t
PU
CURRENT
Write Cycle No. 1 (CE Controlled)
ADDRESS
[12, 13]
t
ACE
t
LZOE
[14, 15]
t
DOE
50%
t
RC
t
HZOE
t
DATA VALID
HZCE
t
PD
HIGH
IMPEDANCE
ICC
50%
ISB
t
WC
CE
WE
DATA I/O
Notes:
11.Device is continuously selected. OE
is HIGH for read cycle.
12.WE
13.Address valid prior to or coincident with CE
14.Data I/O is high impedance if OE
goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
**10924512/16/01HGKNew Data Sheet
*A11343104/10/02NSLAC Test Loads split based on speed
*B11504708/01/02HGKAdded TSOP II Package and I Temp. Improved I
*C11979610/11/02DFPUpdated standby current from 5 nA to 5 mA
*D12303012/17/02DFPUpdated Truth Table to reflect single Chip Enable option
*E419983See ECNNXRAdded 48-ball VFBGA Package
*F493543See ECNNXRRemoved 8 ns speed bin from Product offering
Issue
Date
Orig. of
ChangeDescription of Change
Added lead-free parts in Ordering Information Table
Replaced Package Name column with Package Diagram in the Ordering
Information Table
Added note #1 on page #2
Changed the description of I
Input Leakage Current in DC Electrical Characteristics table
Removed I
Updated Ordering Information
parameter from DC Electrical Characteristics table
OS
from Input Load Current to
IX
CY7C1019CV33
limits
CC
Document #: 38-05130 Rev. *FPage 10 of 10
[+] Feedback
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.