Cypress Semiconductor CY62148V-70SCT, CY62148V-70SC, CY62148LL-70SCT, CY62148LL-70SC, CY62148L-70SCT Datasheet
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512K x 8 MoBL Static RAM
CY62148V MoBL™
Cypress Semiconductor Corporation
• 3901 North First Street • San Jose • CA 95134 • 408-943-2600
March 23, 2000
MoBL
Features
• Low volt age rang e :
—2.7V–3.6V
• Ultra lo w acti ve pow er
• Low st a ndby powe r
• TTL-compatible inputs and outputs
• Autom atic power-d ow n w hen deselected
• CMOS for optimum spee d/power
Functional Description
The CY62148V is a high-performance CMOS static RAM organized as 524,288 words by 8 bits. This device features advanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Lif e™ (MoBL™) in portable
applications such as cellular telephones. The device also has
an automatic power-down feature that significantly reduces
power consum ption b y 99% when addresses are not toggl ing.
The device can be put into standby mode when deselected
(CE
HIGH).
Writing to the device is accomplished by taking Chip Enable
(CE
) and Write Enable ( WE) inputs LO W . Dat a on the eigh t I/O
pins (I/O
0
through I/O7) is then written into the location speci-
fied on the address pins (A
0
through A18).
Reading from the device is accomplished by taking Chip Enable (CE
) and Output Enable (OE) LOW while forcing Write
Enable (WE
) HIGH. Under these conditions, the contents of
the memory locati on specified by the ad dress pins will appear
on the I/O pins.
The eight input/output pins (I/O
0
through I/O7) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE
LOW and WE LOW).
The CY62148V is avai labl e in a 36-ball FBGA, 32 pi n TSOPII,
and a 32-pin SOIC package.
Logic Block Diagram
17
15
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
ROW DECODER
SENSE AMPS
Data in Drivers
POWER
DOWN
WE
OE
I/O
0
I/O
1
I/O
2
I/O
3
512K x 8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
12
A14A
13
A
A
11
CE
A
A
16
A
10
62148V-1
18
A
A
9
CY62148V MoBL™
2
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ......................... .. .. ....–65°C to +150 °C
Ambient Temperature with
Power Applied............................................... 55°C to +125°C
Supply Voltage to Ground Potential...............–0.5V to +4.6V
DC V oltage Applied to Outputs
in High Z State
[1]
....................................–0.5V to VCC + 0.5V
DC Input Voltage
[1]
................................–0.5V to VCC + 0.5V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage ................. ...................... ... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current............. .. .......... .. .......... .. .......... .. . >200 mA
Notes:
1. V
IL(min.)
= –2.0V for pulse durations less than 20 ns.
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ.)
, TA = 25°C.
Pin
Configurations
WE
1
2
3
4
5
6
7
8
9
10
11
14
31
32
Top View
12
13
16
15
29
30
V
CC
A
3
A
2
A
1
A
17
A
16
OE
A
6
A
14
CE
I/O
2
I/O
0
I/O
1
A
12
A
7
21
22
19
20
I/O
7
27
28
25
26
17
18
23
24
V
SS
A
5
A
4
I/O
6
I/O
5
I/O
4
I/O
3
A
10
A
18
A
11
TSOPII/SOIC
A
0
A
15
V
CC
A
13
A
12
A
5
NC
WE
A
7
I/O
4
I/O
5
A
4
NC
I/O
6
I/O
7
V
SS
A
11
A
10
A
1
V
SS
I/O
0
A
2
A
8
A
6
A
3
A
0
V
CC
I/O
1
I/O
2
I/O
3
A
17
A
18
A
16
CE
OE
A
9
A
14
62148V–2
3265
4
1
D
E
B
A
C
F
G
H
T op View
FBGA
A
9
A
8
A
13
A
15
Operating Range
Range Ambient Tem perature V
CC
Industrial –40°C to +85°C 2.7V to 3.6V
Product Portfolio
Product VCC Range
Speed
Power Dissipation (Industrial)
Operating (ICC) Standby (I
SB2
)
Min. Typ.
[2]
Max. Typ.
[2]
Maximum Ty.p
[2]
Maximum
CY62148V 2.7V 3.0V 3.6V 70 ns 7 15 mA 2 µA 20 µA
CY62148V MoBL™
3
Electrical Characteristics
Over the Operating Range
CY62148V
Parameter Description Test Conditions Min. Typ.
[2]
Max. Unit
V
OH
Outp ut HIGH Voltage IOH = –1.0 mA VCC = 2.7V 2.4 V
V
OL
Output LOW Voltage IOL = 2.1 mA VCC = 2.7V 0.4 V
V
IH
Input HIGH Voltage VCC = 3.6V 2.2 V
CC
+ 0.5V V
V
IL
Input LOW Voltage VCC = 2.7V –0.5 0.8 V
I
IX
Input Load Current GND < VI < V
CC
–1 +1 +1
µA
I
OZ
Output Leakage Current GND < VO < VCC, Output
Disabled
–1 +1 +1
µA
I
CC
VCC Operating Supply
Curr ent
I
OUT
= 0 mA, (f =
f
MAX
= 1/tRC) CMOS
Levels
VCC = 3.6V 7 15 mA
I
OUT
= 0 mA, f = 1 MHz CMOS Le v el s 1 2 mA
I
SB1
Auto matic CE
Power-Down Current—
CMOS Inputs
CE > VCC − 0.3V,
V
IN
> VCC − 0.3V or
V
IN
< 0.3V, f = f
MAX
100
µA
I
SB2
Auto matic CE
Power-Down Current—
CMOS Inputs
CE > V
CC
− 0.3V
V
IN
> V
CC
− 0.3V
or V
IN
< 0.3V, f = 0
L 1 50
µA
VCC =
3.6V
LL 2 20
µA
Capacitance
[3]
Parameter Description Test Conditions Max. Unit
C
IN
Input Capacitance TA = 25°C, f = 1 MHz,
V
CC
= 3.0V
6 pF
C
OUT
Output Capacitance 8 pF
Thermal Resistance
Description T est Condi tions Symbol Others BGA Units
Thermal Resistance
[3]
(Junction to Ambient)
Still Air , soldered on a 4.25 x 1 .125 inch, 4-lay er
printed circuit board
Θ
JA
TBD TBD °C/W
Thermal Resistance
[3]
(Junction to Case)
Θ
JC
TBD TBD °C/W
Note:
3. Tested initially and after any design or process changes that may affect these parameters.
CY62148V MoBL™
4
AC Test Loads and Waveforms
Parameters 3.0V Unit
R1 1105 Ohms
R2 1550 Ohms
R
TH
645 Ohms
V
TH
1.75V Volts
Data Rete n ti o n C h ar acteristics
(Over the Operating Range)
Parameter Description Conditions Min. Typ.
[2]
Max. Unit
V
DR
VCC for Da ta Rete ntion 1.0 3.6 V
I
CCDR
Data Retention Current VCC = 1.0V
CE
> V
CC
− 0.3V ,
V
IN
> VCC − 0.3V or
V
IN
< 0.3V
No input may exceed
V
CC
+0.3V
L/ LL 0.2 5.5
µA
µA
t
CDR
[3]
Chip Deselect to Data
Retention Time
0 ns
t
R
[4]
Operation Recov ery
Time
t
RC
ns
Note:
4. Full Device AC operation requires linear V
CC
ramp from V
DR
to V
CC(min.)
> 10 µs or stable at V
CC(min.)
> 10 µs.
Data Retention Waveform
VCC Typ
V
CC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
OUTPUT V
TH
Equivalent to: THÉ VENIN EQUIVALENT
ALL INPUT PULSES
62148V–3
62148V–4
R
TH
R1
Fall time: 1 V/ns
Rise Time: 1 V/ns
62148V–5
1.0V1.0V
t
CDR
VDR> 1.0 V
DATA RETENTION MODE
t
R
CE
V
CC
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