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■ PSoC Designer and PSoC Programmer Installation CD
■ CY3280-BK1 Universal CapSense Controller Kit CD
■ 1.5 mm and 3 mm Polycarbonate Overlays (with Adhesive for attachment to module board if
wanted)
Installing Software
To use the examples in this quick start:
■ Install PSoC Express Development Software
■ Install PSoC Designer Development Software
■ Review the Additional CY3280-BK1 Universal CapSense Controller CD Content
Install PSoC Express Development Software
1.1 Insert the PSoC Express Installation CD.
1.2 Install PSoC Express 3.
1.3 Install .NET Framework 2.0.
1.4 Install PSoC Programmer.
1.5 Install Express Pack 3 (found on the kit CD in the \Software folder).
Install PSoC Designer Development Software
1.6 Insert the PSoC Designer and PSoC Programmer Installation CD.
1.7 Browse to and launch PD44_B119x86.exe at \PSoC Programmer 2.3_PSoc Designer
4.4\psoc_designer_tm__v__4_4_13\.
1.8 Follow the installation instructions.
1.9 Install Service Pack 1 (found on the kit CD in the \Software folder).
1.10 A C compiler license is required to build PSoC Designer C language projects. Section 2.1 of the
C Language Compiler Users Guide.pdf found in Help Documentation explains how to enter
the license.
Additional CY3280-BK1 Universal CapSense Controller CD Content
■ Example projects for PSoC Express and PSoC Designer
■ Hardware schematics and gerber files
■ CY3240-I2USB software installer and documentation
CapSense Best Practices
The Universal CapSense Controller has been created using the best practices for CapSense lay out.
To enable universality and development of the kit and its projects, certain design elements have
been changed from what is recommended for final products. Below is a list of the design features in
the Universal CapSense Controller and what to change for final products.
Design FeatureReasonImpactRecommended Change
Sensing traces
routed through a
connector to sensors
Sensing traces
routed to other
schematic elements
Sensing traces
located on the top
layer
Several regulators
used, including a
variable regulator
Test point on CMOD Accessibility of charge/dis-
GND spacing is
generalized for
noise immunity and
sensitivity
Connection to shield
electrode is through
a jumper (module J2)
ESD protection circuitry is not included
UM Parameters set
to supplied overlay
thicknesses
Unused pins are not
routed directly to
GND
0-ohm Resistors
populated throughout
Buttons, sliders and LEDs
placed on the module board to
all for greater flexibility with custom modules for development
and subsequent releases.
Universality of the board
enabled by population/depopulation of 0-ohm resistors
Using vias to route traces to bottom of board and back to connector increases parasitic
capacitance.
Demonstration of CapSense at
several voltages.
charge waveforms
Universality of kit required middle-ground on many parameters
Flexibility of module boards for
both CSD and CSA control
boards
Development/evaluation platform without consistent overlay
is inherently vulnerable to ESD
events
Projects optimized for supplied
hardware
Pins brought out to connector
for subsequent modules or custom designs
Universality of the board
enabled by population/depopulation of 0-ohm resistors
Connectors increase the parasitic capacitance of the sensors,
effectively reducing their sensitivity. Connectors also create
another path for noise to enter
the system.
Solder pads of 0-ohm resistors
increase parasitic capacitance.
Possible noise sensitivity to
stimulus on top side of board.
Finger presses on routing of
control board can lead to sensor
activation.
Global and User Module parameters may need to be verified
with changing power supply.
A test point increases noise sensitivity by acting as an antenna.
Design is not optimized for highnoise or very thick overlays
Higher resistance paths can
impair performance of shield
electrode in CSD projects
Direct or air-separated ESD
testing may impair operation or
damage circuitry. +/-2kV limit on
PSoC pins (see datasheet).
Sensitivity may not be high
enough for very thicker overlays
Possible noise pathTie unused sensing traces
Solder pads of 0-ohm resistors
increase parasitic capacitance
Sensors and control circuitry
should be located on the same
printed circuit board. Lower parasitic capacitance by reducing
trace lengths.
Route traces directly to sensing
elements. Use as few 0-ohm
resistors as possible
Route sensing traces on nonuser side of printed circuit
board. Route sensing traces as
far from noise sources as possible.
Supply one regulated voltage to
PSoC.
Solder-pad test points for leads
offer better noise immunity if test
points are required.
Increase spacing for thicker
overlays and better sensitivity.
Decrease spacing for greater
noise immunity
Dedicated trace for shield electrode. Remove jumpers wherever possible
Include an overlay and ESD protection circuitry
Thicker overlays may require
verification of parameters to
ensure proper operation
directly to ground
Route traces directly to sensing
elements. Use as few 0-ohm
resistors as possible
The examples in this Quick Start are for the CY3280-20x34 and CY3280-SLM Linear Slider Module
boards only.
The CY3280-20x34 board is preprogrammed with demonstration firmware. When powered by a
PSoC MiniProg, a CY3240-I2USB Bridge, or an optional external power supply, the LEDs light up
when a finger touches one of the buttons or the slider.
These instructions assume your board has not been reprogrammed from the factory settings. If it
has, and you would like to follow along with this demonstration, follow the instructions in the Resetting the Board to the Original Factory Programming section on page 5, and then start this example
with the Power the Board section below.
Power the Board
2.1 Connect your computer to the CapSense test board ISSP Connector (J3) using the PSoC
MiniProg and a USB cable. If this is your first time using the MiniProg, you will need to install the
driver using these steps before proceeding:
a. When the Found New Hardware Wizard opens, select the Install the software automati-
cally (Recommended) option and click Next.
b. A warning message may tell you the software you are trying to install has not passed Win-
dows Logo testing. Click Continue Anyway each time it appears.
c. When the installation is complete, click Finish.
2.2 Open PSoC Programmer by going to the Windows Start menu and selecting All Programs
Cypress MicroSystems PSoC Programming PSoC Programmer.
2.3 From the Port menu, select MiniProg1/<Identification Code>.
2.4 Click Toggle Device Power . The D1 LED on the CY3280-20x34 board lights
green.
Test the Board
2.5 Touch the slider on the board with your finger. An LED will light up representing where your finger is on the slider. The LED state changes as you move your finger across the slider
2.6 Touch one or more buttons with your finger. The LEDs light up corresponding to the buttons
being pressed.
Resetting the Board to the Original Factory Programming
Follow these steps if you wish to reset the board to the original factory installed programming:
2.7 Place shunts on pins 2 and 3 of J1 and pins 1 and 2 of J4.
2.8 The example projects are available on the CD and from the Cypress web site. On
www.cypress.com, search for CY3280-BK1.
2.9 To reset the board to the factory conditions, connect your computer to the CY328020x34 board ISSP Connector (J3) using the PSoC MiniProg and a USB cable.
2.10 Open PSoC Programmer by going to the Windows Start menu All Programs
Cypress MicroSystems PSoC Programming PSoC Programmer
2.11 Click File Load, navigate to, and open the CY3280_20x34_slm.hex file on the CD at:
2.13 From the Device menu, select CY8C20434-12LFXC.
2.14 Click Program. “Programming Succeeded...” appears in the Actions pane when programming
is complete.
Note: The CY3280_20x34_slm example project is a PSoC Designer project, and will not open with
PSoC Express. PSoC Programmer uses .hex files generated by both applications.