■ Supports two DIMMs or four SO-DIMMs with one additional
output for feedback to an external or chipset PLL
■ Low power consumption for mobile applications
❐ Less than 32 mA at 66.6 MHz with unloaded outputs
■ 1-ns Input-Output delay
■ Buffers all frequencies from DC to 133.33 MHz
■ Output-output skew less than 250 ps
■ Multiple V
ference (EMI) reduction
■ Space-saving 16-pin 150-mil SOIC package
■ 3.3V operation
■ Industrial temperature available
and VSS pins for noise and electromagnetic inter-
DD
The CY2309NZ is a low-cost buffer designed to distribute
high-speed clocks in mobile PC systems and desktop PC
systems with SDRAM support. The part has nine outputs, eight
of which can be used to drive two DIMMs or four SO-DIMMs, and
the remaining can be used for external feedback to a PLL. The
device operates at 3.3V and outputs can run up to 133.33 MHz.
The CY2309NZ is designed for low EMI and power optimization.
It has multiple V
consumes less than 32 mA at 66.6 MHz, making it ideal for the
and VDD pins for noise optimization and
SS
low-power requirements of mobile systems. It is available in an
ultra-compact 150-mil 16-pin SOIC package.
Cypress Semiconductor Corporation•198 Champion Court•San Jose, CA 95134-1709•408-943-2600
Document #: 38-07182 Rev. *E Revised September 23, 2008
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CY2309NZ
Pinouts
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BUF_IN
OUTPUT1
OUTPUT2
V
DD
GND
OUTPUT3
OUTPUT4
V
DD
OUTPUT9
OUTPUT8
OUTPUT7
V
DD
GND
OUTPUT6
OUTPUT5
GND
Notes
1. BUF_IN input has a threshold voltage of V
DD
/2.
2. Parameter is guaranteed by design and characterization. It is not 100% tested i n p r oduction.
Figure 1. CY2309NZ - 16 SOIC-Top View
Table 1. Pin Description for CY2309NZ
PinSignalDescription
4, 8, 13V
DD
3.3V Digital Voltage Supply
5, 9, 12GNDGround
1BUF_INInput Clock
2, 3, 6, 7, 10,
OUTPUT [1:9]Outputs
1 1 , 14, 15, 16
Maximum Ratings
Supply Voltage to Ground Potential................–0.5V to +7.0V
DC Input Voltage (Except REF) ............–0.5V to VDD + 0.5V
DC Input Voltage REF.........................................–0.5V to 7V
Operating Conditions for Commercial and Industrial Temperature Devices
Switching Characteristics for Commercial and Industrial Temperature Devices
Note
3. All parameters specified with loaded outputs.
t
1
t
2
1.4V1.4V1.4V
Figure 2. Duty Cycle Timing
OUTPUT
t
3
3.3V
0V
0.8V
2.0V2.0V
0.8V
t
4
Figure 3. All Outputs Rise/Fall Time
1.4V
1.4V
t
5
OUTPUT
OUTPUT
Figure 4. Output-Output Skew
VDD/2
t
6
INPUT
OUTPUT
V
DD
/2
Figure 5. Input-Output Propagation Delay
[3]
ParameterNameDescriptionMinTyp.MaxUnit
[2]
[2]
[2]
= t2 ÷ t
OUTPUT
[2]
1
[2]
Duty Cycle
t
3
t
4
t
5
t
6
Rise Time
Fall Time
Output to Output Skew
Propagation Delay, BUF_IN
Rising Edge to
Rising Edge
Measured at 1.4V40.050.060.0%
Measured between 0.8V and 2.0V1.50ns
Measured between 0.8V and 2.0V1.50ns
All outputs equally loaded250ps
Measured at VDD/2159.2ns
**111858DSG12/09/01Change from Spec number: 38-0 0709 to 38-07182
*A121834RBI12/14/02Power-up requirements added to Operating Conditions Information
*B130563SDR10/23/03Added industrial operating temperature to operating conditions
*C212991RGL/GGK03/30/04Updated the propagation delay T
*D270149RGL10/04/04Added Lead-free devices
*E2568533AESA09/23/08Updated template. Added Note “Not recommended for new designs.”
Orig. of
Change
Submission
Date
Description of Change
spec to 9.2 ns in the Switching
Characteristics table
Replaced 8.7ns Input/Output Delay to 1ns Input/Output Delayin the features
section
Changed "SDRAM [1:9]" to "OUTPUT [1:9]" in Operating Conditions table.
Removed part number CY2309NZSI–1H and CY2309NZSI–1HT.
6
Document #: 38-07182 Rev. *EPage 5 of 6
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CY2309NZ
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. T o find the office
closest to you, visit us at cypress.com/sales.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby gr ant s to l icense e a pers onal, no n-exclu sive , non-tr ansfer able license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction w ith a Cypress
integrated circuit as specified in the ap plicable agreem ent. Any reprod uction, modificatio n, translation, co mpilation, or repr esentation of this Source Co de except as speci fied above is pro hibited with out
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress doe s not
assume any liability arising out of the applic ation or use o f any pr oduct or circ uit de scribed herein . Cypr ess does n ot author ize its p roducts fo r use as critical compon ents in life-su pport systems whe re
a malfunction or failure may reason ably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document #: 38-07182 Rev. *ERevised September 23, 2008Page 6 of 6
All products and company names mentioned in this document may be the trademarks of their respective holders.
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