Cypress Semiconductor 3034 User Manual

PRELIMINARY

CYBT-413034-02

EZ-BT™ WICED® Module

General Description

The CYBT-413034-02 is a dual-mode Bluetooth BR/EDR and Low Energy (BLE) wireless module solution. The CYBT-413034-02 includes onboard crystal oscillators, passive components, and the Cypress CYW20719 silicon device.

The CYBT-413034-02 supports a number of peripheral functions (ADC, PWM), as well as multiple serial communication protocols (UART, SPI, I royalty-free BLE stack compatible with Bluetooth 5.0 in a small

12.0 × 16.3 × 1.70mm module form-factor. The CYBT-413034-02 includes an integrated chip antenna, is

qulaified by Bluetooth SIG, and includes regulatory certification approval for FCC, ISED, MIC, and CE.

Module Description

n Module size: 12.00 mm × 16.30 mm × 1.70 mm

n Complies with Bluetooth Core Specification version 5.0 and

includes support for BR, EDR 2/3 Mbps, eSCO, BLE, and LE 2 Mbps features.

p QDID: TBD

p Declaration ID: TBD n Certified to FCC, ISED, MIC, and CE standards

n 1024-KB flash memory, 512-KB SRAM memory

n Extended Industrial temperature range: –30 °C to +85 °C

n Integrated ARM Cortex-M4 microprocessor core with

floating point unit (FPU)

RF Characteristics

n Maximum TX output power: +4.0 dbm

n RX Receive Sensitivity: –95.5 dbm

n Received signal strength indicator (RSSI) with 1-dB resolution

Power Consumption

n TX current consumption

p BLE silicon: 5.6 mA (MCU + radio only, 0 dbm) n RX current consumption

p Bluetooth silicon: 5.9 mA (MCU + radio only) n Cypress CYW20719 silicon low power mode support

p PDS: 61 μA with 512 KB SRAM retention

p SDS: 1.6 uA

p HIDOFF (External Interrupt): 400 nA

C, I2S/PCM). The CYBT-413034-02 includes a

Functional Capabilities

n 1x ADC with (10-bit ENoB for DC measurement and 12-bit

ENoB for Audio measurement) with 11 channels.

n 1x HCI UART for programming and HCI

n 1x peripheral UART (PUART)

n 2x SPI (master or slave mode) blocks (SPI, Quad SPI, and MIPI

DBI-C)

n 1x I

C master/slave and 1x I2C master only

n I

S/PCM audio interfaces

n Up to 6 16-bit PWMs

n Watchdog Timer

n Bluetooth Basic Rate (BR) and Enhanced Data Rate (EDR)

Support

n BLE protocol stack supporting generic access profile (GAP)

Central, Peripheral, or Broadcaster roles

n Hardware Security Engine

Benefits

CYBT-413034-02 is fully integrated and certified solution that provides all necessary components required to operate Bluetooth communication standards.

n Proven hardware design ready to use

n Ultra-flexible supermux I/O designs allows maximum flexibility

for GPIO function assignment

n Large non-volatile memory for complex application devel-

opment

n Over-the-air update capable for development or field updates

n Bluetooth SIG qualified with QDID and Declaration ID

n WICED™ Studio provides an easy-to-use integrated design

environment (IDE) to configure, develop, program, and test your Bluetooth application

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Document Number: 002-23992 Rev. ** Revised May 17, 2018

PRELIMINARY

CYBT-413034-02

More Information

Cypress provides a wealth of data at www.cypress.com to help you to select the right module for your design, and to help you to quickly and effectively integrate the module into your design.

References

n Overview: EZ-BLE/EZ-BT Module Portfolio, Module Roadmap

n Development Kits:

p CYBT-413034-EVAL, CYBT-413034-02 Evaluation Board

p CYW920719Q40EVB-01, Evaluation Kit for CYW20719

silicon device

n Test and Debug Tools:

p CYSmart, Bluetooth

p CYSmart Mobile, Bluetooth

LE Test and Debug Tool (Windows)

LE Test and Debug Tool

n Knowledge Base Article

p KBA97095 - EZ-BLE™ Module Placement p KBA213976 - FAQ for BLE and Regulatory Certifications with

EZ-BLE modules

p KBA210802 - Queries on BLE Qualification and Declaration

Processes

p KBA218122 - 3D Model Files for EZ-BLE/EZ-BT Modules

(Android/iOS Mobile App)

Development Environments

Wireless Connectivity for Embedded Devices (WICED) Studio Software Development Kit (SDK)

Cypress' WICED® (Wireless Connectivity for Embedded Devices) is a full-featured platform with proven Software Development Kits (SDKs) and turnkey hardware solutions from partners to readily enable Wi-Fi and Bluetooth® connectivity in system design.

WICED Studio is the only SDK for the Internet of Things (ioT) that combines Wi-Fi and Bluetooth into a single integrated development environment. In addition to providing WICED APIs and an application framework designed to abstract complexity, WICED Studio also leverages many common industry standards.

Technical Support

n Cypress Community: Whether you’re a customer, partner or a developer interested in the latest Cypress innovations, the Cypress

Developer Community offers you a place to learn, share and engage with both Cypress experts and other embedded engineers

around the world.

n Frequently Asked Questions (FAQs): Learn more about our Bluetooth ECO System.

n Visit our support page and create a technical support case or contact a local sales representatives. If you are in the United States,

you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 2 at the prompt.

Document Number: 002-23992 Rev. ** Page 2 of 48

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CYBT-413034-02

Contents

Overview............................................................................ 4

Functional Block Diagram ........................................... 4

Module Description...................................................... 4

Pad Connection Interface ................................................ 6

Recommended Host PCB Layout ................................... 7

Module Connections ........................................................ 9

Connections and Optional External Components ..... 11

Power Connections (VDD) ........................................ 11

External Reset (XRES).............................................. 11

HCI UART Connections ............................................ 12

External Component Recommendation .................... 12

Critical Components List ........................................... 14

Antenna Design......................................................... 14

Bluetooth Baseband Core ............................................. 15

BQB and Regulatory Testing Support....................... 15

Power Management Unit................................................ 16

Integrated Radio Transceiver........................................ 17

Transmitter Path........................................................ 17

Receiver Path............................................................ 17

Local Oscillator.......................................................... 17

Microcontroller Unit ....................................................... 18

External Reset........................................................... 18

Peripheral and Communication Interfaces .................. 19

I2C............................................................................. 19

HCI UART Interface .................................................. 19

Peripheral UART Interface ........................................ 19

Serial Peripheral Interface......................................... 19

32 kHz Crystal Oscillator........................................... 19

ADC Port ................................................................... 21

GPIO Ports................................................................ 21

PWM.......................................................................... 22

PDM Microphone....................................................... 23

I2S Interface.............................................................. 23

PCM Interface ........................................................... 23

Security Engine ......................................................... 24

Power Modes .................................................................. 25

Firmware.......................................................................... 25

Electrical Characteristics............................................... 26

Core Buck Regulator................................................. 27

Digital LDO................................................................ 27

Digital I/O Characteristics.......................................... 27

ADC Electrical Characteristics .................................. 28

Bluetooth Silicon Current Consumption .................... 29

Chipset RF Specifications ............................................. 30

Timing and AC Characteristics ..................................... 32

UART Timing............................................................. 33

SPI Timing................................................................. 33

I2C Compatible Interface Timing............................... 35

Environmental Specifications ....................................... 39

Environmental Compliance ....................................... 39

RF Certification.......................................................... 39

Safety Certification .................................................... 39

Environmental Conditions ......................................... 39

ESD and EMI Protection ........................................... 39

Regulatory Information.................................................. 40

FCC........................................................................... 40

ISED.......................................................................... 41

European Declaration of Conformity ......................... 42

MIC Japan................................................................. 42

Packaging........................................................................ 43

Ordering Information...................................................... 45

Acronyms........................................................................ 46

Document Conventions ................................................. 46

Units of Measure ....................................................... 46

Document History Page................................................. 47

Sales, Solutions, and Legal Information...................... 48

Worldwide Sales and Design Support....................... 48

Products .................................................................... 48

PSoC® Solutions ...................................................... 48

Cypress Developer Community................................. 48

Technical Support ..................................................... 48

Document Number: 002-23992 Rev. ** Page 3 of 48

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CYBT-413034-02

Overview

Functional Block Diagram

Figure 1 illustrates the CYBT-413034-02 functional block diagram.

Figure 1. Functional Block Diagram

Note: General Purpose Input/Output pins shown in Figure 1 are configuratble to any specified input or output function in the SuperMux table detailed in Table 5 in the Module

Connections section.

Note: Connections shown in the above block diagram are maximum number of connections per function. The total number of GPIOs available on the CYBT-413034-02 is 17.

Module Description

The CYBT-413034-02 module is a complete module designed to be soldered to the applications main board.

Module Dimensions and Drawing

Cypress reserves the right to select components from various vendors to achieve the Bluetooth module functionality. Such selections will still guarantee that all mechanical specifications and module certifications are maintained. Any changes to the current BOM for the CYBT-413034-02 will not be made until approval is provided by the end customer for this product. The CYBT-413034-02 will be held within the physical dimensions shown in the mechanical drawings in Figure 2 on page 5. All dimensions are in millimeters (mm).

Table 1. Module Design Dimensions

Dimension Item Specification

Module dimensions

Antenna location dimensions

PCB thickness Height (H) 0.50 ± 0.10 mm Shield height Height (H) 1.20 mm Maximum component height Height (H) 0.60 Total module thickness (bottom of module to top of shield) Height (H) 1.70 mm typical

See Figure 2 for the mechanical reference drawing for CYBT-413034-02.

Length (X) 12.00 ± 0.15 mm

Width (Y) 16.30 ± 0.15 mm

Length (X) 12.00 mm

Width (Y) 4.60 mm

mm typical

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PRELIMINARY

CYBT-413034-02

Figure 2. Module Mechanical Drawing

Bottom View (Seen from Bottom)

Top View (Seen from Top)

Side View

Notes

1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on recommended host PCB layout, see “Recommended Host PCB Layout” on page 7.

Document Number: 002-23992 Rev. ** Page 5 of 48

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CYBT-413034-02

Pad Connection Interface

Solder Pad Connections

(Seen from Bottom)

Optional Host PCB Keep Out Area

Around Chip Antenna

(Seen from Bottom)

As shown in the bottom view of Figure 2 on page 5, the CYBT-413034-02 has 28 connections to a host board via solder pads (SP).

Ta bl e 2 and Figure 3 detail the solder pad length, width, and pitch dimensions of the CYBT-413034-02 module.

Table 2. Connection Description

Name Connections Connection Type Pad Length Dimension Pad Width Dimension Pad Pitch

SP 30 Solder Pad 0.86 mm 0.66 mm 1.016 mm

Figure 3. Solder Pad Dimensions (Seen from Bottom)

To maximize RF performance, the host layout should follow these recommendations:

1. Antenna Area Keepout: The host board directly below the antenna area of the Cypress module (see Figure 2 on page 5) must contain no ground or signal traces. This keep out area requirement applies to all layers of the host board.

2. Module Placement: The ideal placement of the Cypress Bluetooth module is in a corner of the host board with the chip antenna located at the far corner. This placement minimizes the additional recommended keep out area stated in item 3 below. Please refer to AN96841 for module placement best practices.

3. Optional Keepout: To maximize RF performance, the area immediately around the Cypress Bluetooth module chip antenna may contain an additional keep out area, where there are no grounding or signal traces. The keep out area applies to all layers of the host board. The recommended dimensions of the host PCB keep out area are shown in Figure 4 (dimensions are in mm).

Figure 4. Optional Additional Host PCB Keep Out Area Around the CYBT-413034-02 Chip Antenna

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CYBT-413034-02

Recommended Host PCB Layout

Top View (Seen on Host PCB)

Figure 5, Figure 6, Figure 7, and Ta bl e 3 provide details that can be used for the recommended host PCB layout pattern for the

CYBT-413034-02. Dimensions are in millimeters unless otherwise noted. Pad length of 1.11 mm (0.56 mm from center of the pad on either side) shown in Figure 7 is the minimum recommended host pad length. The host PCB layout pattern can be completed using either Figure 5, Figure 6, or Figure 7. It is not necessary to use all figures to complete the host PCB layout pattern.

Figure 5. CYBT-413034-02 Host Layout (Dimensioned) Figure 6. CYBT-413034-02 Host Layout (Relative to Origin)

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CYBT-413034-02

Ta bl e 3 provides the center location for each solder pad on the CYBT-413034-02. All dimensions are referenced to the center of the

Top View (Seen on Host PCB)

solder pad. Refer to Figure 7 for the location of each module solder pad.

Table 3. Module Solder Pad Location Figure 7. Solder Pad Reference Location

Solder Pad

(Center of Pad)

1 (0.31, 5.26) (12.20, 207.09) 2 (0.31, 6.27) (12.20, 246.85) 3 (0.31, 7.29) (12.20, 287.01) 4 (0.31, 8.31) (12.20, 327.16) 5 (0.31, 9.32 (12.20, 366.93) 6 (0.31, 10.34) (12.20, 407.09) 7 (0.31, 11.35) (12.20, 446.85) 8 (0.31, 12.37) (12.20, 487.01)

9 (0.31, 13.39) (12.20, 527.16) 10 (0.31, 14.40) (12.20, 566.93) 11 (1.44, 15.99) (56.69, 629.53) 12 (2,46, 15.99) (96.85, 629.53) 13 (3.47, 15.99) (136.61, 629.53) 14 (4.49, 15.99) (176.77, 629.53) 15 (5.51, 15.99) (216.93, 629.53) 16 (6.52, 15.99) (256.69, 629.53) 17 (7.54, 15.99) (296.85, 629.53) 18 (8.55, 15.99) (336.61, 629.53) 19 (9.57, 15.99) (376.77, 629.53) 20 (10.59, 15.99) (416.93, 629.53) 21 (11.69, 14.40) (460.24, 566.53) 22 (11.69, 13.39) (460.24, 527.16) 23 (11.69, 12.37) (460.24, 487.01) 24 (11.69, 11.35) (460.24, 446.85) 25 (11.69, 10.34) (460.24, 407.09) 26 (11.69, 9.32) (420.87, 366.93) 27 (11.69, 8.31) (460.24, 327.16) 28 (11.69, 7.29) (460.24, 287.01) 29 (11.69, 6.27) (460.24, 246.85) 30 (11.69, 5.26) (460.24, 207.09)

Location (X,Y) from

Orign (mm)

Dimension from

Orign (mils)

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CYBT-413034-02

Module Connections

Note

2. The CYBT-413034-02 can configure GPIO connections to any Input/Output function described in Tab l e 5 .

3. P15 should not be driven high externally while the part is held in reset (it can be floating or driven low). Failure to do so may cause some current to flow through P15 until the device comes out of reset.

Ta bl e 4 details the solder pad connection definitions and available functions for each connection pad. The GPIO connections available

on the CYBT-413034-02 can be configured to any of the input or output funcitons listed in Ta bl e 5 . Table 4 specifies any function that is required to be used on a specific solder pad, and also identifies GPIOs that can be configured using the SuperMux.

Table 4. CYBT-413034-02 Solder Pad Connection Definitions

Pad Pad Name Silicon Pin Name XTALI/O ADC GPIO

1 GND GND Ground 2 VDD VDDIO Power Supply Input (1.76V ~ 3.63V) 3 XRES RST_N External Reset (Active Low) 4P25 P25 - - 33 see Table 5 5P33 P33 - IN6 33 see Table 5 6P26 P26 - - 33 see Table 5 7P38 P38 - IN1 33 see Table 5 8P1 P1 - IN28 33 see Table 5

9P0 P0 - IN29 33 see Table 5 10 P29 P29 - IN10 33 see Table 5 11 GND GND Ground

12 P13/P23/P28

13 P17 P17 - IN18 33 see Table 5 14 P7 P7 - - 3 - 15 P4 P4 - - 3 - 16 P2 P2 - - 33 see Table 5 17 P16 P16 - IN19 3 -

XTALI_32K/

19 P6 P6 - - 33 see Table 5

20 XTALO_32K XTALO_32K

21 P10/P11

22 P34/P35/P36

23 UART_CTS_N BT_UART_CTS_N UART (HCI UART) Clear To Send Input Only 24 UART_RTS_N BT_UART_RTS_N UART (HCI UART) Request To Send Output Only 25 UART_TXD BT_UART_TXD UART (HCI UART) Transmit Data Only 26 UART_RXD BT_UART_RXD UART (HCI UART) Receive Data Only

27 HOST_WAKE BT_HOST_WAKE

28 GND GND Ground 29 GND GND Ground 30 GND GND Ground

P15

[3]

P13 P23 P28

XTALI_32K

P15

P10 P11

P34 P35 P36

External Oscillator Input

(32KHz)

External Oscillator

Output (32KHz)

A signal from the CYBT-423028-02 module to the host indicating that the Bluetooth device requires

IN22 (P13) IN12 (P23) IN11 (P28)

IN20 (P15) 3(P15) 3(P15), see Ta b le 5

-- -

IN25 (P10) IN24 (P11)

IN5 (P34) IN4 (P35) IN3 (P36)

3(P13/P23/P28) 3 see Table 5

3 (P10/P11) 3 see Table 5

3 (P34/P35/P36) 3 see Table 5

attention.

SuperMux Capable

[2]

Ta bl e 5 details the available Input and Ouput functions that are configurable to any sodler pad in Table 4 that are marked as SuperMux

capable.

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CYBT-413034-02

Table 5. GPIO SuperMux Input and Output Functions

Function Input or Output Function Type GPIOs Required Function Connection Description

SWD

SPI 1

SPI 2

PUART

C Input/Output

C 2 Input/Output

PCM In Input Audio Input Communication 3

PCM Out Output Audio Output Communication 3

S In Input Audio Input Communication 3

S Out Ouput Audio Output Communication 3

PDM Input Microphone 1 ~ 2

PWM Output Pulse Width Modulator 1 ~ 6

Input

Input/Output SWDIO, Serial Wire Debugger I/O

Input/Output

Output SPI 1 DCX (DBI-C DCX 8-bit mode)

Input/Output

Output SPI 2 DCX (DBI-C DCX 8-bit mode)

Input Serial Communication Input

Output Serial Communication Output

Serial Communication and

Debug

Serial Communication

(Master or Slave)

Serial Communication

(Master or Slave)

Serial Communication

(Master or Slave)

Serial Communication

(Master or Slave)

4 ~ 8

SWDCK, Serial Wire Debugger Clock

SPI 1 Clock

SPI 1 Chip Select

SPI 1 MOSI

SPI 1 MISO SPI 1 I/O 2 (Quad SPI) SPI 1 I/O 3 (Quad SPI)

SPI 1 Interrupt

SPI 2 Clock

SPI 2 Chip Select

SPI 2 MOSI

SPI 2 MISO SPI 2 I/O 2 (Quad SPI) SPI 2 I/O 3 (Quad SPI)

SPI 2 Interrupt

Periperal UART RX

Peripheral UART CTS

Peripheral UART TX

Peripheral UART RTS

I2C Clock

I2C Data

I2C 2 Clock

I2C 2 Data PCM Input

PCM Clock

PCM Sync

PCM Output

PCM Clock

PCM Sync

I2S DI, Data Input

I2S WS, Word Select

I2S Clock I2S DO, Data Output I2S WS, Word Select

I2S Clock

PDM Input Channel 1 PDM Input Channel 2

PWM Channel 0 PWM Channel 1 PWM Channel 2 PWM Channel 3 PWM Channel 4 PWM Channel 5

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CYBT-413034-02

Function Input or Output Function Type GPIOs Required Function Connection Description

ACLK Output Auxiliary Clock 1 ~ 2

HIDOFF Output HID-OFF Indicator 1 HID-OFF Indicator to host

Auxiliary Clock 0 (ACLK0) Auxiliary Clock 1 (ACLK1)

Connections and Optional External Components

Power Connections (VDD)

The CYBT-413034-02 contains one power supply connection, VDD. VDD accepts a supply input of 1.76 V to 3.63 V. Table 12 provides this specification. The maximum power supply ripple for this power

connection is 100 mV, as shown in Table 12.

Considerations and Optional Components for Brown Out (BO) Conditions

Power supply design must be completed to ensure that the CYBT-413034-02 module does not encounter a Brown Out condition, which can lead to unexpected funcitonality, or module lock up. A Brown Out condition may be met if power supply provided to the module during power up or reset is in the range shown below:

≤ VDD ≤ V

Refer to Ta bl e 1 6 for the VIL and V System design should ensure that the condition above is not encountered when power is removed from the system. In the event that

this cannot be guaranteed (i.e. battery installation, high value power capacitors with slow discharge), it is recommended that an external voltage detection device be used to prevent the Brown Out voltage range from occuring during power removal. Please refer to Figure 8 for the recommended circuit design when using an external voltage detection IC.

Figure 8. Reference Circuit Block Diagram for External Voltage Detection IC

specifications.

In the event that the module does encounter a Brown Out condition, and is operating erratically or not responsive, power cycling the module will correct this issue and once reset, the module should operate correctly. Brown Out conditions can potentially cause issues that cannot be corrected, but in general, a power-on-reset operation will correct a Brown Out condition.

External Reset (XRES)

The CYBT-413034-02 has an integrated power-on reset circuit which completely resets all circuits to a known power on state. This action can also be envoked by an external reset signal, forcing it into a power-on reset state. The XRES signal is an active-low signal, which is an input to the CYBT-413034-02 module (solder pad 3). The CYBT-413034-02 module does not require an external pull-up resistor on the XRES input

During power on operation, the XRES connection to the CYBT-413034-02 is required to be held low 50 ms after the VDD power supply input to the module is stable. This can be accomplished in the following ways:

n The host device can connect a GPIO to the XRES of Cypress CYBT-413034-02 module and pull XRES low until VDD is stable.

XRES is recommended to be released 50 ms after VDD is stable.

n If the XRES connection of the CYBT-413034-02 module is not used in the application, a 0.33 uF capacitor may be connected to the

XRES solder pad of the CYBT-413034-02 in order to delay the XRES release. The capacitor value for this recommended imple-

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CYBT-413034-02

mentation is approximate, and the exact value may differ depending on the VDD power supply ramp time of the system. The capacitor value should result in an XRES release timing of at least 50 ms after VDD stability.

n The XRES release timing may be controlled by a external voltage detection IC. XRES should be released 50 ms after VDD is stable.

Refer to Figure 11 on page 18 for XRES operating and timing requirements during power on events.

HCI UART Connections

The recommendations in this section apply to the HCI UART (Solder Pads 23, 24, 25, and 26). For full UART functionality, all UART signals must be connected to the Host device. If full UART functionality is not being used, and only UART RXD and TXD are desired or capable, then the following connection considerations should be followed for UART RTS and CTS:

n UART RTS: Can be left floating, pulled low, or pulled high. RTS is not critical for initial firmware uploading at power on.

n UART CTS: Must be pulled low to bypass flow control and to ensure that continuous data transfers are made from the host to the

module.

External Component Recommendation

Power Supply Circuitry

It is not required to place any power supply decoupling or noise reduction circuitry on the host PCB. If desired, an external ferrite bead between the supply and the module connection can be included. The ferrite bead should be positioned as close as possible to the module pad connection.

If used, the recommended ferrite bead value is 330 Ω, 100 MHz. (Murata BLM21PG331SN1D).

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CYBT-413034-02

Figure 9 illustrates the CYBT-413034-02 schematic.

Figure 9. CYBT-413034-02 Schematic Diagram

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CYBT-413034-02

Critical Components List

Ta bl e 6 details the critical components used in the CYBT-413034-02 module.

Table 6. Critical Component List

Component Reference Designator Description

Silicon U2 40-pin QFN Bluetooth Silicon Device - CYW20719 Crystal Y1 24.000 MHz, 12PF

Antenna Design

Ta bl e 7 details the PCB trace antenna used in the CYBT-413034-02 module.

Table 7. Chip Antenna Specifications

Item Description

Frequency Range 2400 – 2500 MHz Peak Gain –0.5 dBi typical Return Loss 10 dB minimum

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CYBT-413034-02

Bluetooth Baseband Core

The Bluetooth Baseband Core (BBC) implements all time-critical functions required for high-performance Bluetooth operation. The BBC manages the buffering, segmentation, and routing of data for all connections. It prioritizes and schedules all RX/TX activities including adv, paging, scanning, and servicing of connections. In addition to these functions, it independently handles the host controller interface (HCI) including all commands, events, and data flowing over HCI. The core also handles symbol timing, forward error correction (FEC), header error control (HEC), cyclic redundancy check (CRC), authentication, data encryption/decryption, and data whitening/dewhitening.

Table 8. Bluetooth Features

Bluetooth 1.0 Bluetooth 1.2 Bluetooth 2.0

Basic Rate Interlaced Scans EDR 2 Mbps and 3 Mbp SCO Adaptive Frequency Hopping – Paging and Inquiry eSCO – Page and Inquiry Scan – – Sniff – –

Bluetooth 2.1 Bluetooth 3.0 Bluetooth 4.0

Secure Simple Pairing Unicast Connectionless Data Bluetooth Low Energy Enhanced Inquiry Response Enhanced Power Control – Sniff Subrating eSCO –

Bluetooth 4.1 Bluetooth 4.2 Bluetooth 5.0

Low Duty Cycle Advertising Data Packet Length Extension LE 2 Mbps Dual Mode LE Secure Connection Slot Availability Mask LE Link Layer Topology Link Layer Privacy High Duty Cycle Advertising

BQB and Regulatory Testing Support

The CYBT-413034-02 fully supports Bluetooth Test mode as described in Part I:1 of the Specification of the Bluetooth System Version

3.0. This includes the transmitter tests, normal and delayed loop back tests, and reduced hopping sequence. In addition to the standard Bluetooth Test Mode, the CYBT-413034-02 also supports enhanced testing features to simplify RF

debugging and qualification and type-approval testing. These features include:

n Fixed frequency carrier wave (unmodulated) transmission

p Simplifies some type-approval measurements (Japan) p Aids in transmitter performance analysis

n Fixed frequency constant receiver mode

p Receiver output directed to I/O pin p Allows for direct BER measurements using standard RF test equipment p Facilitates spurious emissions testing for receive mode

n Fixed frequency constant transmission

p 8-bit fixed pattern or PRBS-9 p Enables modulated signal measurements with standard RF test equipment

Document Number: 002-23992 Rev. ** Page 15 of 48

+ 33 hidden pages

Cypress Semiconductor 3034 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

General Description

Module Description

RF Characteristics

Power Consumption

Functional Capabilities

Benefits

More Information

References

Development Environments

Technical Support

Overview

Functional Block Diagram

Module Description

Module Dimensions and Drawing

Pad Connection Interface

Recommended Host PCB Layout

Module Connections

Connections and Optional External Components

Power Connections (VDD)

Considerations and Optional Components for Brown Out (BO) Conditions

External Reset (XRES)

HCI UART Connections

External Component Recommendation

Power Supply Circuitry

Critical Components List

Antenna Design

Bluetooth Baseband Core

BQB and Regulatory Testing Support