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Cypress Semiconductor
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3033
User Manual
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Cypress Semiconductor 3033 User Manual

PRELIMINARY
CYBT-013033-01
EZ-BT™ Module

General Description

Benefits

The Cypress CYBT-013033-01 is a certified module supporting dual-mode Bluetooth® Classic (BR/EDR) and Bluetooth® Low Energy (BLE) wireless communication standards. The CYBT-013033-01 is a turnkey solution and includes an onboard crystal oscillator, PCB trace antenna, passive components, and Cypress CYW20707 silicon device.
The CYBT-013033-01 is a custom RF module design intended to provide Bluetooth Classic and BLE communication, and allow up to two GPIO connections for system or module wake events. The CYBT-013033-01 supports UART and BSC (I2C compatible) serial communication, and allows for interface to the Apple MFi Coprocessor chip (via the BSC connection).
The Cypress CYBT-013033-01 complies with Bluetooth Core Specification version 4.2+HS and is designed for use in UART HCI applications. The combination of the Bluetooth Baseband Core (BBC), a Peripheral Transport Unit (PTU), and a Cortex-M3 based microprocessor with on-chip ROM provides a lower and upper layer Bluetooth stack, including Link Controller (LC), Link Manager (LM), and HCI.

Module Features

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Module size: 10.0 mm × 15.0 mm × 2.25 mm (with shield) Bluetooth dual-mode module, complying with Bluetooth Core
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Specification 4.2 including BR/EDR/BLE Supports maximum Bluetooth data rates over HCI UART
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Temperature range: –30 °C to +85 °C
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ARM® Cortex®-M3 processor
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Multiple serial interface options:
UART: HCI interface supporting up to 4 Mbps
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❐
BSC (I2C compatible): Supporting 400 kHz clock support
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Apple MFi Coprocessor interface
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2 GPIOs
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Certified to FCC, CE, MIC, and IC regulations
FCC ID: WAP3033
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IC ID: 7922A-3033
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MIC ID: TBD
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Bluetooth SIG 4.2 qualified
QDID: TBD
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Declaration ID: TBD
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The CYBT-013033-01 module is provided as a turnkey solution, including all necessary hardware required to use BR, EDR, and BLE communication standards.
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Proven, qualified, and certified hardware design ready to use
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Small footprint (10 × 15 mm × 2.25 mm), perfect for space constrained applications
Fully certified module eliminates the time needed for desig n,
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development and certification processes
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Bluetooth SIG qualified with QDID and Declaration ID Multiple serial communication protocol support
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Interface option for Apple MFi Authentication Coprocessor
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WICED Studio provides an easy-to-use integrated design
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environment (IDE) to configure, develop, program, and test your application.
Cypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1709 • 408-943-2600 Document Number: 002-18414 Rev. ** Revised January 27, 2017
PRELIMINARY
CYBT-013033-01

Contents

Overview............................................................................ 3
Functional Block Diagram ........................................... 3
Module Description...................................................... 3
Pad Connection Interface................................................ 6
Recommended Host PCB Layout ................................... 7
Module Connections............................... ... ... ................... 8
Connections and Optional External Components ....... 8
Power Connections (VDDIN)....................................... 8
External Reset (XRES)................................................ 8
UART Connections...................................................... 8
External Component Recommendation ...................... 8
Critical Components List ........................................... 10
Antenna Design......................................................... 10
Bluetooth Baseband Core ............................................. 11
Bluetooth Low Energy............................................... 11
Link Control Layer.......................................................... 11
Power Management Unit................................................ 12
RF Power Management ............................................ 12
SoC Power Management .......................................... 12
Bluetooth Baseband Core Power Management........ 12
Adaptive Frequency Hopping.................................... 13
Microprocessor Unit....................................................... 14
Overview ...................... ... .......................................... 14
One-Time Programmable Memory................................ 14
Peripheral Transport Unit.............................................. 14
HCI Transport Detection Configuration..................... 14
UART Interface.......................................................... 15
Electrical Characteristics.................................. ... .......... 16
RF Specifications........................................................... 19
Timing and AC Characteristics.................................. 22
Environmental Specifications....................................... 24
Environmental Compliance ....................................... 24
RF Certification.......................................................... 24
Safety Certification.................................................... 24
Environmental Conditions ......................................... 24
ESD and EMI Protection........................................... 24
Regulatory Information........................................... ... .... 25
FCC........................................................................... 25
Industry Canada (IC) Certific ation............................. 26
European R&TTE Declaration of Conformity ............ 26
MIC Japan................................................................. 27
Packaging........................................................................ 28
Ordering Information...................................................... 30
Part Numbering Convention...................................... 30
Acronyms........................................................................ 31
Document Conventions................................. ................ 31
Units of Measure....................................................... 31
Document History Page................................................. 32
Sales, Solutions, and Legal Information...................... 33
Worldwide Sales and Design Support....................... 33
Products.................................................................... 33
PSoC® Solutions ...................................................... 33
Cypress Developer Community................................. 33
Technical Support ..................................................... 33
Document Number: 002-18414 Rev. ** Page 2 of 33
PRELIMINARY
CYBT-013033-01

Overview

Functional Block Diagram

Figure 1 illustrates the CYBT-013033-01 functional block diagram.
Figure 1. Functional Block Diagram

Module Description

The CYBT-013033-01 module is a complete module designed to be soldered to the applications main board.

Module Dimensions and Drawing

Cypress reserves the right to select components from various vendors to achieve the Bluetooth module functionality. Such selections will still guarantee that all mechanical speci fications and module certifications are maintained. Designs should b e held within the physical dimensions shown in the mechanical drawings in Figure 2 on page 4. All dimensions are in millimeters (mm).
Table 1. Module Design Dimensions
Dimension Item Specification
Module dimensions
Antenna location dimensions PCB thickness Height (H) 0.80 ± 0.10 mm
Shield height Height (H) 1.45 ± 0.10 mm Maximum component height Height (H) 1.05 mm typical (Bluetooth silicon device) T ot al module thickness (bottom of module to highest component) Height (H) 2.25 mm typical
See Figure 2 for the mechanical reference drawing for CYBT-013033-01.
Length (X) 10.00 ± 0.15 mm
Width (Y) 15.00 ± 0.15 mm
Length (X) 5.13 mm
Width (Y) 10.00 mm
Document Number: 002-18414 Rev. ** Page 3 of 33
PRELIMINARY
CYBT-013033-01
Figure 2. Module Mechanical Drawing
Bottom View (Seen from Bottom)
Side View
Top View (See from Top)
Notes
1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on recommended host PCB layout, see “Recommended Host PCB Layout” on page7.
2. The CYBT-013033-01 includes castellated p ad co nnections, den oted as the circul ar openings at the p ad locat ion above. Ref er to the 3 D rendering in Figure 3 on page 5 for a depiction of the pad construction.
Document Number: 002-18414 Rev. ** Page 4 of 33
PRELIMINARY
CYBT-013033-01
Figure 3. Module 3D Drawing
Top View With Shield
Top View Without Shield
Document Number: 002-18414 Rev. ** Page 5 of 33
PRELIMINARY
CYBT-013033-01

Pad Connection Interface

Bottom View (Seen from Bottom)
Optional Host PCB Keep Out Area Around Chip Antenna
As shown in the bottom view of Figure 2 on page 4, the CYBT-013033-01 connects to the host board via solder pads on the bottom side of the module. Table 2 and Figure 4 detail the solder pad length, width, and pitch dimensions of the CYBT-013033-01 module.
Table 2. Solder Pad Connection Description
Name Connections Connection Type Pad Length Dimension Pad Width Dimension Pad Pitch
SP 13 Castellated Solder Pads 1.02 mm 0.71 mm 1.27 mm
Figure 4. Solder Pad Dimensions (Seen from Bottom)
To maximize RF performance, the host layout should follow these recommendations:
1. Antenna Area Keepout: The host board directly below the ante nna area of the Cypress module (see Figure 2 on page 4) must contain no ground or signal traces. This keep out area requirement applies to all layers of the host board.
2. Module Placement: The ideal placement of the Cypress Bluetooth module is in a corner of the host boa rd with the PCB trace antenna located at the far corner. This placement minimizes the additional re commended keep o ut area stated in item 2 . Please refer to AN96841 for module placement best practices.
3. Optional Keepout: To maximize RF performance, the area immediately around the Cypress Bluetooth module PCB trace antenna may contain an additional keep out area, where no grounding or signal traces are contained. The keep out area applies to all layers of the host board. The recommended dimensions of the host PCB keep out area are shown in Figure 5 (dimensions are in mm).
Figure 5. Optional Additional Host PCB Keep Out Area Around the CYBT-013033-01 PCB Trace Antenna
Document Number: 002-18414 Rev. ** Page 6 of 33
PRELIMINARY
CYBT-013033-01

Recommended Host PCB Layout

Top View (Seen on Host PCB)
Top View (Seen on Host PCB)
Figure 6 (Dimensioned) and Figure 7 (Relative to Origin) provide the recommended host PCB layout pattern for the CYBT-013033-01.
Pad length of 1.27 mm (0.655 mm from center of the pad on either side) shown in Figure 7 is the minimum recomme nded host pad length. All dimensions are in millimeters.
Figure 6. CYBT-013033-01 Host Layout (Dimensioned) Figure 7. CYBT-013033-01 Host Layout (Relative to Origin)
Figure 8. Solder Pad Reference Dimensions
Document Number: 002-18414 Rev. ** Page 7 of 33
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CYBT-013033-01

Module Connections

Notes
3. BT_GPIO_0/BT_DEV_WAKE is a signal from the host to the CYBT-013033-01 that the host requires attention.
4. BT_GPIO_1/BT_HOST_WAKE is a signal from the CYBT-013033-01 module to the host indicating that the Bluetooth device requires attention.
Table 3 details the solder pad connection definitions and available functions for each connection pad. Table 3 lists the solder pads on
the CYBT-013033-01, the silicon device pin, and denotes what functions are available for each solder pad. Table3 also lists the primary/intended function for each solder pad for the application this module was specifically designed for.
Table 3. Solder Pad Connection Definitions
Pad
Number
1 A6 External Reset Hardware Connection Input External Reset (Active Low) 2A8 ✓(SCL) ✓(PWM3) ✓(P3, P29, or P35) Apple SCL Interface 3C7 ✓(SDA) ✓(PWM3) ✓(P12) Apple SDA Interface 4F8 ✓(BT_GPIO_0)
5F7✓(PUART: RXD or TXD) ✓(BT_GPIO_1)
6F5✓(UART_RXD) UART RXD 7G4 ✓(UART_CTS) UART CTS 8F4 ✓(UART_TXD) UART TXD
9F3 ✓(UART_RTS) UART RTS 10 VDDIN Power Supply Input (3.00 to 3.60V) Power Supply Input 11 GND GND Ground Connection 12 GND GND Ground Connection 13 GND GND Ground Connection

Connections and Optional External Components

Silicon
Device Pin
UART BSC (I2C) PWM GPIO_WAKE GPIO Primary Function
[3]
✓(P36 or P38) Device Wake Event Input
[4]
✓(P25 or P32)
UART_TX Debug Host Wake Event Output NC/GPIO

Power Connections (VDDIN)

The CYBT-013033-01 contains one power supply connection, VDDIN.
VDDIN accepts a supply range of 3.00 V to 3.60 V. Table 10 provides this specification. The maximum power supply ripple for this power connection is 100 mV, as shown in Table 10.

External Reset (XRES)

The CYBT-013033-01 has an integrated power-on reset circuit which completely resets all circuits to a known power on state. This action can also be driven by an external reset signal, which can be used to externally control the device, forcing it into a power-on reset state. The XRES signal is an active-low signal, which is an input to the CYBT-013033-01 module.

UART Connections

For full UART functionality, all UAR T signals must be connected to the Host device. If full UART functionality is not being used, and only UART RXD and TXD are desired or capable, then the following connection considerations should be followed for UART RTS and CTS:
■ UART RTS: Can be left floating, pulled low, or pulled high. RTS
is not critical for initial firmware uploading at power on.
■ UART CTS: Must by pulled low to bypass flow control and to
ensure that continuous data transfers are made from the host to the module.

External Component Recommendation

Power Supply Circuitry

It is not required to place any power supply decoupling or noise reduction circuitry on the host PCB. If desired, an external ferrite bead between the supply and the module connection can be included, but is not necessary. If used, the ferrite bead should be positioned as close as possible to the module pin connection.
If used, the recommended ferrite bead value is 330, 100 MHz. (Murata BLM21PG331SN1D).

Apple MFi Authentication Coprocessor Interface

If solder pads 2 and 3 are used as the interface to the Apple MFi authentication coprocessor, 10 Kpull-up resistors should be placed between the MFi coprocessor and the Cypress module.
Document Number: 002-18414 Rev. ** Page 8 of 33
PRELIMINARY
CYBT-013033-01
Figure 9 illustrates the CYBT-013033-01 schematic.
Figure 9. CYBT-013033-01 Schematic Diagram
Document Number: 002-18414 Rev. ** Page 9 of 33
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CYBT-013033-01

Critical Components List

Table 4 details the critical components used in the CYBT-013033-01 module.
Table 4. Critical Component List
Component Reference Designator Description
Silicon U1 49-pin BGA Dual-Mode BT/BLE Silicon Device - BCM20707UA2KFFB4G Crystal Y1 24.000 MHz, 12PF

Antenna Design

Table 5 details the PCB trace antenna used in the CYBT-013033-01 module.
Table 5. Trace Antenna Specifications
Item Description
Frequency Range 2400 – 2500 MHz Peak Gain 0.5 dBi typical Return Loss 10 dB minimum
Document Number: 002-18414 Rev. ** Page 10 of 33
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