Cypress Semiconductor 2006 User Manual

PRELIMINARY

CYBLE-212006-01 CYBLE-202007-01

CYBLE-202013-11

More Information

Cypress provides a wealth of data at www.cypress.com to help you to select the right module for your design, and to help you to quickly and effectively integrate the module into your design.

n Overview: EZ-BLE Module Portfolio, Module Roadmap n EZ-BLE PRoC Product Overview n PRoC BLE Silicon Datasheet n Application notes: Cypress offers a number of BLE application

notes covering a broad range of topics, from basic to advanced level. Recommended application notes for getting started with EZ-BLE modules are:

p AN96841 - Getting Started with EZ-BLE Module p AN94020 - Getting Started with PRoC BLE p AN97060 - PSoC

4 BLE and PRoC™ BLE - Over-The-Air

(OTA) Device Firmware Upgrade (DFU) Guide

p AN91162 - Creating a BLE Custom Profile p AN91184 - PSoC 4 BLE - Designing BLE Applications p AN92584 - Designing for Low Power and Estimating Battery

Life for BLE Applications

p AN85951 - PSoC p AN95089 - PSoC

4 CapSense® Design Guide

4/PRoC™ BLE Crystal Oscillator Selec-

tion and Tuning Techniques

p AN91445 - Antenna Design and RF Layout Guidelines

n Knowledge Base Articles

p KBA97095 - EZ-BLE™ Module Placement

n Technical Reference Manual (TRM):

p PRoC

n Development Kits:

p CYBLE-212006-EVAL, CYBLE-212006-01 Evaluation Board p CYBLE-202007-EVAL, CYBLE-202007-01 Evaluation Board p CYBLE-202013-EVAL, CYBLE-202013-11 Evaluation Board p CY8CKIT-042-BLE, Bluetooth

p CY8CKIT-002, PSoC

n Test and Debug Tools:

p CYSmart, Bluetooth p CYSmart Mobile, Bluetooth

BLE Technical Reference Manual

Kit

MiniProg3 Program and Debug Kit

LE Test and Debug Tool (Windows)

Low Energy (BLE) Pioneer

LE Test and Debug Tool

(Android/iOS Mobile App)

PSoC® Creator™ Integrated Design Environment (IDE)

PSoC Creator is an Integrated Design Environment (IDE) that enables concurrent hardware and firmware editing, compiling and

debugging of PSoC 3, PSoC 4, PSoC 5LP, PSoC 4 BLE, PRoC BLE and EZ-BLE module systems with no code size limitations. PSoC peripherals are designed using schematic capture and simple graphical user interface (GUI) with over 120 pre-verified, production-ready PSoC Components™.

PSoC Components are analog and digital “virtual chips,” represented by an icon that users can drag-and-drop into a design and configure to suit a broad array of application requirements.

Bluetooth Low Energy Component

The Bluetooth Low Energy Component inside PSoC Creator provides a comprehensive GUI-based configuration window that lets you quickly design BLE applications. The Component incorporates a Bluetooth Core Specification v4.1 compliant BLE protocol stack and provides API functions to enable user applications to interface with the underlying Bluetooth Low Energy Sub-System (BLESS) hardware via the stack.

Technical Support

n Frequently Asked Questions (FAQs): Learn more about our BLE ECO System.

n Forum: See if your question is already answered by fellow developers on the PSoC 4 BLE and PRoC BLE forums.

n Visit our support page and create a technical support case or contact a local sales representatives. If you are in the United States,

you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 2 at the prompt.

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Overview............................................................................ 4

Module Description...................................................... 4

Pad Connection Interface ................................................ 6

Recommended Host PCB Layout ................................... 7

Power Supply Connections and Recommended External

Components.................................................................... 10

Connection Options................................................... 10

External Component Recommendation .................... 10

Critical Components List ........................................... 13

Antenna Design......................................................... 13

Qualified Antenna for CYBLE-202007-01 and CY .........

BLE-202013-11 ................................................................ 13

Power Amplifier (PA) and Low Noise Amplifier (LNA) 13

Electrical Specification .................................................. 14

GPIO ......................................................................... 16

XRES......................................................................... 17

Digital Peripherals ..................................................... 20

Serial Communication ............................................... 22

Memory ..................................................................... 23

System Resources .................................................... 23

Environmental Specifications ....................................... 29

Environmental Compliance ....................................... 29

RF Certification.......................................................... 29

Safety Certification .................................................... 29

Environmental Conditions ......................................... 29

ESD and EMI Protection ........................................... 29

Regulatory Information.................................................. 30

FCC........................................................................... 30

Industry Canada (IC) Certification............................. 31

European R&TTE Declaration of Conformity ............ 31

MIC Japan................................................................. 32

KC Korea................................................................... 32

Packaging........................................................................ 33

Ordering Information...................................................... 35

Part Numbering Convention...................................... 35

Acronyms........................................................................ 36

Document Conventions ................................................. 36

Units of Measure ....................................................... 36

Document History Page................................................. 37

Sales, Solutions, and Legal Information...................... 38

Worldwide Sales and Design Support....................... 38

Products .................................................................... 38

PSoC® Solutions ................................................

Cypress Developer Community................................. 38

Technical Support ..................................................... 38

...... 38

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Overview

Module Description

The CYBLE-2X20XX-X1 module is a complete module designed to be soldered to the applications main board.

Module Dimensions and Drawing

Cypress reserves the right to select components (including the appropriate BLE device) from various vendors to achieve the BLE module functionality. Such selections will still guarantee that all height restrictions of the component area are maintained. Designs should be held within the physical dimensions shown in the mechanical drawings in Figure 1. All dimensions are in millimeters (mm).

Table 1. Module Design Dimensions

Dimension Item Specification

Module dimensions

Antenna location dimensions

PCB thickness Height (H) 0.80 ± 0.10 mm Shield height Height (H) 1.20 ± 0.10 mm

Maximum component height Height (H)

Total module thickness (bottom of module to highest component) Height (H)

Length (X) 15.00 ± 0.15 mm

Width (Y) 23.00 ± 0.15 mm

Length (X) 15.00 ± 0.15 mm

Width (Y) 4.65 ± 0.15 mm

1.20 mm typical (shield) - CYBLE-212006-01

1.25 mm typical (connector) - CYBLE-202007-01

0.75mm typical (crystal) - CYBLE-202013-11

2.00 mm typical - CYBLE-212006-01

2.05 mm typical - CYBLE-202007-01

1.55 mm typical - CYBLE-202013-11

See Figure 1 on page 5 for the mechanical reference drawing for CYBLE-2X20XX-X1.

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Figure 1. Module Mechanical Drawing

Top View (View from Top)

Bottom View (Seen from Bottom)

Side View

Note

1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on recommended host PCB layout, see Figure 3, Figure 4, Figure 5, and Figure 6 and Ta bl e 3 .

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Pad Connection Interface

Host PCB Keep Out Area Around Trace Antenna

As shown in the bottom view of Figure 1 on page 5, the CYBLE-2X20XX-X1 connects to the host board via solder pads on the backside of the module. Tab l e 2 and Figure 2 detail the solder pad length, width, and pitch dimensions of the CYBLE-2X20XX-X1 module.

Table 2. Solder Pad Connection Description

Name Connections Connection Type Pad Length Dimension Pad Width Dimension Pad Pitch

SP 30 Solder Pads 1.02 mm 0.71 mm 1.27 mm

Figure 2. Solder Pad Dimensions (Seen from Bottom)

To maximize RF performance, the host layout should follow these recommendations:

1. The ideal placement of the Cypress BLE module is in a corner of the host board with the trace antenna located at the far corner. This placement minimizes the additional recommended keep out area stated in item 2. Please refer to AN96841 for module placement best practices.

2. To maximize RF performance, the area immediately around the Cypress BLE module trace antenna should contain an additional keep out area, where no grounding or signal trace are contained. The keep out area applies to all layers of the host board. The recommended dimensions of the host PCB keep out area are shown in Figure 3 (dimensions are in mm).

Figure 3. Recommended Host PCB Keep Out Area Around the CYBLE-2X20XX-X1 Antenna

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Recommended Host PCB Layout

Top View (On Host PCB)

Figure 4, Figure 5, Figure 6, and Ta b le 3 provide details that can be used for the recommended host PCB layout pattern for the

CYBLE-212006-01. Dimensions are in millimeters unless otherwise noted. Pad length of 1.27 mm (0.635 mm from center of the pad on either side) shown in Figure 6 is the minimum recommended host pad length. The host PCB layout pattern can be completed using either Figure 4, Figure 5, or Figure 6. It is not necessary to use all figures to complete the host PCB layout pattern.

Figure 4. Host Layout Pattern for CYBLE-2X20XX-X1 Figure 5. Module Pad Location from Origin

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Ta bl e 3 provides the center location for each solder pad on the CYBLE-2X20XX-X1. All dimensions reference the to the center of the

solder pad. Refer to Figure 6 for the location of each module solder pad.

Table 3. Module Solder Pad Location Figure 6. Solder Pad Reference Location

Solder Pad

(Center of Pad)

1 (0.38, 10.54) (14.96, 414.96) 2 (0.38, 11.81) (14.96, 464.96) 3 (0.38, 13.08) (14.96, 514.96) 4 (0.38, 14.35) (14.96, 564.96) 5 (0.38, 15.62) (14.96, 614.96) 6 (0.38, 16.89) (14.96, 664.96) 7 (0.38, 18.16) (14.96, 714.96) 8 (0.38, 19.43) (14.96, 764.96)

9 (0.38, 20.70) (14.96, 814.96) 10 (0.38, 21.97) (14.96, 864.96) 11 (2.32, 22.62) (91.34, 890.55) 12 (3.59, 22.62) (141.34, 890.55) 13 (4.86, 22.62) (191.34, 890.55) 14 (6.13, 22.62) (241.34, 890.55) 15 (7.40, 22.62) (291.34, 890.55) 16 (8.67, 22.62) (341.34, 890.55) 17 (9.94, 22.62) (391.34,8 90.55) 18 (11.21, 22.62) (441.34, 890.55) 19 (12.48, 22.62) (491.34, 890.55) 20 (13.75, 22.62) (541.34, 890.55 21 (14.62, 20.70) (575.59, 814.96) 22 (14.62, 19.43) (575.59, 764.96) 23 (14.62, 18.16) (575.59, 714.96) 24 (14.62, 16.89) (575.59, 664.96) 25 (14.62, 15.62) (575.59, 614.96) 26 (14.62, 14.35) (575.59, 564.96) 27 (14.62, 13.08) (575.59, 514.96) 28 (14.62, 11.81) (575.59, 464.96) 29 See Figure 2 See Figure 2 30 See Figure 2 See Figure 2

Location (X,Y) from

Orign (mm)

Dimension from

Orign (mils)

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Ta bl e 4 details the solder pad connection definitions and available functions for each connection pad. Ta bl e 4 lists the solder pads on

Notes

2. TCPWM: Timer, Counter, and Pulse Width Modulator. If supported, the pad can be configured to any of these peripheral functions.

3. When using the capacitive sensing functionality, Pad 3 (P4.0) must be connected to a C

MOD

capacitor (located off of Cypress BLE Module). The value of this

capacitor is 2.2 nF and should be placed as close to the module as possible.

4. The main board needs to connect all GND connections (Pad 24/25/26/27) on the module to the common ground of the system.

5. If the I

S feature is used in the design, the I2S pins shall be dynamically routed to the appropriate available GPIO by PSoC Creator.

CYBLE-2X20XX-X1, the BLE device port-pin, and denotes whether the function shown is available for each solder pad. Each connection is configurable for a single option shown with a 3.

Table 4. Solder Pad Connection Definitions

Solder Pad

Number

1 GND Ground Connection 2 XRES External Reset Hardware Connection Input 3P4.0

4P3.73(SCB1_CTS) 3(TCPWM3_N) 3(Sensor) 5P3.63(SCB1_RTS) 3(TCPWM3_P) 3(Sensor) 6P3.53(SCB1_TX) 3(SCB1_SCL) 3(TCPWM2_N) 3(Sensor) 7P3.43(SCB1_RX) 3(SCB1_SDA) 3(TCPWM2_P) 3(Sensor)

8 VREF Reference Voltage Input (Optional) 9P2.6

10 P2.4 3(Sensor) 11 P2.3 3(Sensor) 12 P2.2 3(SCB0_SS3) 3(Sensor) 13 P2.0 3(SCB0_SS1) 3(Sensor) 14 P1.7 3(SCB0_CTS) 3(SCB0_SCLK 3(TCPWM3_N) 3(Sensor) 15 P1.6 3(SCB0_RTS) 3(SCB0_SS0) 3(TCPWM3_P) 3(Sensor) 16 P1.5 3(SCB0_TX) 3(SCB0_MISO) 3(SCB0_SCL) 3(TCPWM2_N) 3(Sensor) 17 P1.4 3(SCB0_RX) 3(SCB0_MOSI) 3(SCB0_SDA) 3(TCPWM2_P) 3(Sensor) 18 P0.7 3(SCB0_CTS) 3(SCB0_SCLK 3(TCPWM2_N) 3(Sensor) 19 P1.0 3(TCPWM0_P) 3(Sensor) 20 P0.4 3(SCB0_RX) 3(SCB0_MOSI) 3(SCB0_SDA) 3(TCPWM1_P) 3(Sensor) 21 P0.5 3(SCB0_TX) 3(SCB0_MISO) 3(SCB0_SCL) 3(TCPWM1_N) 3(Sensor)

22 V 23 P0.6

24 GND 25 GND Ground Connection 26 GND Ground Connection 27 GND Ground Connection 28 V 29 ANT RF Pin to External Antenna 30 GND Ground Connection

Device

Port Pin

[3]

[4]

DDR

UART SPI I2C TCPWM

[2]

Cap-

Sense

3(SCB1_RTS) 3(SCB1_MOSI) 3(TCPWM0_P) 3(C

3(Sensor)

Digital Power Supply Input (1.8 to 5.5V)

3(SCB0_RTS) 3(SCB0_SS0)

3(TCPWM2_P)

Ground Connection

Radio Power Supply (2V to 3.6V)

3(Sensor)

MOD

WCO

ECO

Out

)

LCD SWD GPIO

Out

33 3

33 33 33

33 33

33 3

33 33 33 33 33 33

3(SWDCLK)

33 3

3(SWDIO)

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Power Supply Connections and Recommended External Components

Two Ferrite Bead Option

Single Ferrite Bead Option

Power Connections

The CYBLE-2X20XX-X1 contains two power supply connections, VDD and VDDR. The VDD connection supplies power for both digital and analog device operation. The VDDR connection supplies power for the device radio.

VDD accepts a supply range of 1.71 V to 5.5 V. VDDR accepts a supply range of 2.0V to 3.6V. These specifications can be found in Ta b le 1 2 . The maximum power supply ripple for both power connections on the module is 100 mV, as shown in

Ta bl e 1 0.

The power supply ramp rate of VDD must be equal to or greater than that of VDDR.

Connection Options

Two connection options are available for any application:

1. Single supply: Connect VDD and VDDR to the same supply.

2. Independent supply: Power VDD and VDDR separately.

Figure 7. Recommended Host Schematic Options for a Single Supply Option

External Component Recommendation

In either connection scenario, it is recommended to place an external ferrite bead between the supply and the module connection. The ferrite bead should be positioned as close as possible to the module pin connection.

Figure 7 details the recommended host schematic options for a

single supply scenario. The use of one or two ferrite beads will depend on the specific application and configuration of the CYBLE-2X20XX-X1.

Figure 8 details the recommended host schematic for an

independent supply scenario. The recommended ferrite bead value is 330 Ω, 100 MHz. (Murata

BLM21PG331SN1D).

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Figure 8. Recommended Host Schematic for an Independent Supply Option

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The CYBLE-2X20XX-X1 schematic is shown in Figure 9.

Figure 9. CYBLE-2X20XX-X1 Schematic Diagram

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Electrical Specification

Ta bl e 1 0 details the absolute maximum electrical characteristics for the Cypress BLE module.

Table 10. CYBLE-2X20XX-X1 Absolute Maximum Ratings

Parameter Description Min Typ Max Units Details/Conditions

DDD_ABS

CCD_ABS

DD_RIPPLE

GPIO_ABS

GPIO_injection

LU Pin current for latch up –200 200 mA –

Ta bl e 11 details the RF characteristics for the Cypress BLE module.

Table 11. CYBLE-2X20XX-X1 RF Performance Characteristics

Parameter Description Min Ty p Max Units Details/Conditions

RFO RF output power on ANT 1 7.5 dBm

RL Return loss – –10 – dB –

Analog, digital, or radio supply relative to VSS (V

= V

SSD

Direct digital core voltage input relative to V

SSA

)

SSD

Maximum power supply ripple for VDD and V input voltage

–0.5 – 6 V Absolute maximum

–0.5 – 1.95 V Absolute maximum

DDR

– – 100 mV

3.0V supply Ripple frequency of 100 kHz

to 750 kHz GPIO voltage –0.5 – VDD +0.5 V Absolute maximum Maximum current per GPIO –25 – 25 mA Absolute maximum GPIO injection current: Maximum for VIH > VDD

and minimum for V

< V

–0.5 – 0.5 mA

Absolute maximum current

injected per pin

Configurable via register

settings (CYBLE-212006-01)

RF receive sensitivity on ANT – –93 – dBm

Measured value

(CYBLE-212006-01) Module frequency range 2402 – 2480 MHz – Peak gain – –0.5 – dBi –

Ta bl e 1 2 through Table 51 list the module level electrical characteristics for the CYBLE-2X20XX-X1. All specifications are valid for

–40 °C ≤ TA ≤ 85 °C and TJ ≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V, except where noted.

Table 12. CYBLE-2X20XX-X1 DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

DD1

DD2

DDR1

DDR2

Active Mode, V

DD3

DD4

DD5

DD6

DD7

DD8

Power supply input voltage 1.8 – 5.5 V With regulator enabled

Power supply input voltage unregulated 1.71 1.8 1.89 V

Internally unregulated

supply Radio supply voltage (radio on) 2.0 – 3.6 V Restricted by RFX2401C Radio supply voltage (radio off) 2.0 – 3.6 V –

= 1.71 V to 5.5 V

Execute from flash; CPU at 3 MHz – 1.7 – mA

T = 25 °C,

= 3.3 V

Execute from flash; CPU at 3 MHz – – – mA T = –40 °C to 85 °C

Execute from flash; CPU at 6 MHz – 2.5 – mA

T = 25 °C,

= 3.3 V

Execute from flash; CPU at 6 MHz – – – mA T = –40 °C to 85 °C

Execute from flash; CPU at 12 MHz – 4 – mA

T = 25 °C,

= 3.3 V

Execute from flash; CPU at 12 MHz – – – mA T = –40 °C to 85 °C

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Table 12. CYBLE-2X20XX-X1 DC Specifications (continued)

Parameter Description Min Typ Max Units Details/Conditions

DD9

DD10

DD11

DD12

Execute from flash; CPU at 24 MHz – 7.1 – mA

Execute from flash; CPU at 24 MHz – – – mA T = –40 °C to 85 °C

Execute from flash; CPU at 48 MHz – 13.4 – mA

Execute from flash; CPU at 48 MHz – – – mA T = –40 °C to 85 °C

T = 25 °C,

= 3.3 V

T = 25 °C,

= 3.3 V

Sleep Mode, VDD = 1.8 to 5.5 V

DD13

Sleep Mode, V

DD14

IMO on – – – mA

and V

ECO on – – – mA

Deep-Sleep Mode, V

DD15

DD16

DD17

DD18

WDT with WCO on – 1.5 – μA

WDT with WCO on – – – μA T = –40 °C to 85 °C

WDT with WCO on – – – μA

WDT with WCO on – – – μA T = –40 °C to 85 °C

Deep-Sleep Mode, V

DD19

DD20

WDT with WCO on – – – μA T = 25 °C WDT with WCO on – – – μA T = –40 °C to 85 °C

Hibernate Mode, V

DD27

DD28

GPIO and reset active – 150 – nA

GPIO and reset active – – – nA T = –40 °C to 85 °C

Hibernate Mode, V

DD29

DD30

Stop Mode, V

DD33

DD34

DD35

DD36

Stop Mode, V

DD37

DD38

DD39

DD40

GPIO and reset active – – – nA

GPIO and reset active – – – nA T = –40 °C to 85 °C

= 1.8 to 3.6 V

Stop-mode current (VDD)–20–nA

Stop-mode current (V

Stop-mode current (VDD) – – – nA T = –40 °C to 85 °C

Stop-mode current (V

= 3.6 to 5.5 V

Stop-mode current (VDD)–––nA

Stop-mode current (V

Stop-mode current (VDD) – – – nA T = –40 °C to 85 °C Stop-mode current (V

= 1.9 to 5.5 V

DDR

= 1.8 to 3.6 V

= 1.71 to 1.89 V (Regulator Bypassed)

= 1.8 to 3.6 V

= 3.6 to 5.5 V

)–40–- nA

DDR

)–––nA

DDR

)–––nA

DDR

) – – – nA T = –40 °C to 85 °C

DDR

T = 25 °C, V

SYSCLK = 3 MHz

T = 25 °C, V

SYSCLK = 3 MHz

T = 25 °C,

= 3.3 V

T = 25 °C,

VDD = 5 V

T = 25 °C,

= 3.3 V

T = 25 °C,

= 5 V

T = 25 °C,

= 3.3 V

T = 25 °C,

= 3.3 V

DDR

T = –40 °C to 85 °C,

= 1.9 V to 3.6 V

DDR

T = 25 °C,

= 5 V

T = 25 °C,

= 5 V

DDR

= 3.3 V,

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Table 13. AC Specifications

Note

6. V

must not exceed VDD + 0.2 V.

Parameter Description Min Typ Max Units Details/Conditions

CPU

SLEEP

DEEPSLEEP

HIBERNATE

STOP

CPU frequency DC – 48 MHz 1.71 V ≤ VDD ≤ 5.5 V Wakeup from Sleep mode – 0 – μs Guaranteed by characterization

Wakeup from Deep-Sleep mode – – 25 μs

24-MHz IMO. Guaranteed by

characterization Wakeup from Hibernate mode – – 2 ms Guaranteed by characterization Wakeup from Stop mode – – 2 ms XRES wakeup

GPIO

Table 14. GPIO DC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

[6]

PULLUP

PULLDOWN

IL_CTBM

HYSTTL

HYSCMOS

DIODE

TOT_GPIO

Input voltage HIGH threshold 0.7 × V LVTTL input, V LVTTL input, V

< 2.7 V 0.7 × V

≥ 2.7 V 2.0 – – V –

Input voltage LOW threshold – – 0.3 × V LVTTL input, V LVTTL input, V Output voltage HIGH level V Output voltage HIGH level V

< 2.7 V – – 0.3 × V

≥ 2.7 V – – 0.8 V –

–0.6 – – V IOH = 4 mA at 3.3-V VDD

–0.5 – – V IOH = 1 mA at 1.8-V V

Output voltage LOW level – – 0.6 V IOL = 8 mA at 3.3-V V Output voltage LOW level – – 0.6 V IOL = 4 mA at 1.8-V V Output voltage LOW level – – 0.4 V IOL = 3 mA at 3.3-V V Pull-up resistor 3.5 5.6 8.5 kΩ – Pull-down resistor 3.5 5.6 8.5 kΩ – Input leakage current (absolute value) – – 2 nA 25 °C, VDD = 3.3 V Input leakage on CTBm input pins – – 4 nA – Input capacitance – – 7 pF – Input hysteresis LVTTL 25 40 – mV VDD > 2.7 V Input hysteresis CMOS 0.05 × V Current through protection diode to

DD/VSS

Maximum total source or sink chip current

– – 100 μA–

– – 200 mA –

– – V CMOS input

– – V –

VCMOS input

V–

– – 1 –

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Table 15. GPIO AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

RISEF

FALLF

RISES

FALLS

GPIOUT1

GPIOUT2

GPIOUT3

GPIOUT4

GPIOIN

Rise time in Fast-Strong mode 2 – 12 ns 3.3-V V Fall time in Fast-Strong mode 2 – 12 ns 3.3-V V Rise time in Slow-Strong mode 10 – 60 ns 3.3-V V Fall time in Slow-Strong mode 10 – 60 ns 3.3-V V GPIO Fout; 3.3 V ≤ V

Fast-Strong mode GPIO Fout; 1.7 V≤ V

Fast-Strong mode GPIO Fout; 3.3 V ≤ V

Slow-Strong mode GPIO Fout; 1.7 V ≤ V

Slow-Strong mode GPIO input operating frequency

1.71 V ≤ V

≤ 5.5 V

≤ 3.3 V

≤ 5.5 V

≤ 3.3 V

––33MHz

– – 16.7 MHz

–– 7MHz

––3.5MHz

90/10%, 25 pF load, 60/40 duty cycle

– – 48 MHz 90/10% V

DDD

, C , C , C , C

LOAD

= 25 pF = 25 pF = 25 pF = 25 pF

Table 16. OVT GPIO DC Specifications (P5_0 and P5_1 Only)

Parameter Description Min Typ Max Units Details/Conditions

Input leakage (absolute value).

> V

––10 μA 25°C, VDD = 0 V, VIH = 3.0 V

Output voltage LOW level – – 0.4 V IOL = 20 mA, VDD > 2.9 V

Table 17. OVT GPIO AC Specifications (P5_0 and P5_1 Only)

Parameter Description Min Typ Max Units Details/Conditions

RISE_OVFS

FALL_OVFS

RISESS

FALLSS

GPIOUT1

GPIOUT2

Output rise time in Fast-Strong mode 1.5 – 12 ns 25-pF load, 10%–90%, V Output fall time in Fast-Strong mode 1.5 – 12 ns 25-pF load, 10%–90%, V

Output rise time in Slow-Strong mode 10 – 60 ns

Output fall time in Slow-Strong mode 10 – 60 ns

GPIO F Fast-Strong mode

; 3.3 V ≤ V

OUT

; 1.71 V ≤ V

OUT

≤ 5.5 V

≤ 3.3 V

––24MHz

––16MHz

25 pF load, 10%-90%,

= 3.3 V

25 pF load, 10%-90%,

= 3.3 V

90/10%, 25 pF load, 60/40 duty cycle

XRES

Table 18. XRES DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

PULLUP

HYSXRES

DIODE

Input voltage HIGH threshold 0.7 × V Input voltage LOW threshold – – 0.3 × V

– – V CMOS input

DDD

V CMOS input

DDD

Pull-up resistor 3.5 5.6 8.5 kΩ – Input capacitance – 3 – pF – Input voltage hysteresis – 100 – mV – Current through protection diode to

DD/VSS

– – 100 μA–

= 3.3 V = 3.3 V

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Table 19. XRES AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

RESETWIDTH

Reset pulse width 1 – – μs–

Temperature Sensor

Table 20. Temperature Sensor Specifications

Parameter Description Min Typ Max Units Details/Conditions

SENSACC

Temperature-sensor accuracy –5 ±1 5 °C –40 °C to +85 °C

SAR ADC

Table 21. SAR ADC DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

A_RES Resolution – – 12 bits A_CHNIS_S Number of channels - single-ended – – 8 8 full-speed

A-CHNKS_D Number of channels - differential – – 4

Diff inputs use neighboring I/O

A-MONO Monotonicity – – – Yes

A_GAINERR Gain error – – ±0.1 %

A_OFFSET Input offset voltage – – 2 mV

With external reference

Measured with 1-V V

REF

A_ISAR Current consumption – – 1 mA A_VINS Input voltage range - single-ended V A_VIND Input voltage range - differential V

–V – V

DDA

V A_INRES Input resistance – – 2.2 kΩ A_INCAP Input capacitance – – 10 pF

VREFSAR Trimmed internal reference to SAR –1 – 1 %

Percentage of Vbg (1.024 V)

Table 22. SAR ADC AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

A_PSRR Power-supply rejection ratio 70 – – dB

Measured at 1-V

reference A_CMRR Common-mode rejection ratio 66 – – dB A_SAMP Sample rate – – 1 Msps

Fsarintref

A_SNR Signal-to-noise ratio (SNR) 65 – – dB F

SAR operating speed without external ref. bypass

– – 100 Ksps 12-bit resolution

= 10 kHz

A_BW Input bandwidth without aliasing – – A_SAMP/2 kHz

A_INL

A_dnl

Integral nonlinearity. V 1 Msps

Integral nonlinearity. V 500 Ksps

Differential nonlinearity. V

5.5 V, 1 Msps

= 1.71 V to 5.5 V,

= 1 .71 V to 3.6 V,

DDD

= 1.71 V to 5.5 V,

= 1.71 V to

–1.7 – 2 LSB V

–1.5 – 1.7 LSB V

–1 – 2.2 LSB V

= 1 V to V

REF

= 1.71 V to V

REF

= 1 V to V

REF

= 1 V to V

REF

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Table 22. SAR ADC AC Specifications (continued)

Parameter Description Min Typ Max Units Details/Conditions

A_DNL

A_THD Total harmonic distortion – – –65 dB FIN = 10 kHz

CSD

CSD Block Specifications

Parameter Description Min Typ Max Units Details/Conditions

CSD

IDAC1 DNL for 8-bit resolution –1 – 1 LSB – IDAC1 INL for 8-bit resolution –3 – 3 LSB – IDAC2 DNL for 7-bit resolution –1 – 1 LSB – IDAC2 INL for 7-bit resolution –3 – 3 LSB –

SNR Ratio of counts of finger to noise 5 – – Ratio

DAC1_CRT1

DAC1_CRT2

DAC2_CRT1

DAC2_CRT2

Differential nonlinearity. V

3.6 V, 1 Msps Differential nonlinearity. V

5.5 V, 500 Ksps

Voltage range of operation 1.71 – 5.5 V –

Output current of IDAC1 (8 bits) in High range

Output current of IDAC1 (8 bits) in Low range

Output current of IDAC2 (7 bits) in High range

Output current of IDAC2 (7 bits) in Low range

= 1.71 V to

–1 – 2 LSB V

–1 – 2.2 LSB V

–612 –

–306 –

–305 –

–153 –

μA

= 1.71 V to V

REF

= 1 V to V

REF

Capacitance range of

9 pF to 35 pF, 0.1-pF

sensitivity. Radio is not

operating during the

scan

–

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Digital Peripherals

Timer

Table 23. Timer DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

TIM1

TIM2

TIM3

Table 24. Timer AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

TIMFREQ

CAPWINT

CAPWEXT

TIMRES

TENWIDINT

TENWIDEXT

TIMRESWINT

TIMRESEXT

Counter

Table 25. Counter DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

CTR1

CTR2

CTR3

Table 26. Counter AC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

CTRFREQ

CTRPWINT

CTRPWEXT

CTRES

CENWIDINT

CENWIDEXT

CTRRESWINT

CTRRESWEXT

Block current consumption at 3 MHz – – 42 μA 16-bit timer Block current consumption at 12 MHz – – 130 μA 16-bit timer Block current consumption at 48 MHz – – 535 μA 16-bit timer

Operating frequency F Capture pulse width (internal) 2 × T Capture pulse width (external) 2 × T Timer resolution T Enable pulse width (internal) 2 × T Enable pulse width (external) 2 × T Reset pulse width (internal) 2 × T Reset pulse width (external) 2 × T

CLK

–48MHz ––ns ––ns ––ns ––ns ––ns ––ns ––ns

Block current consumption at 3 MHz – – 42 μA 16-bit counter Block current consumption at 12 MHz – – 130 μA 16-bit counter Block current consumption at 48 MHz – – 535 μA 16-bit counter

Operating frequency F Capture pulse width (internal) 2 × T Capture pulse width (external) 2 × T Counter Resolution T Enable pulse width (internal) 2 × T Enable pulse width (external) 2 × T Reset pulse width (internal) 2 × T Reset pulse width (external) 2 × T

CLK

–48MHz – ––ns – ––ns – ––ns – ––ns – ––ns – ––ns – –– ns –

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Pulse Width Modulation (PWM)

Table 27. PWM DC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

PWM1

PWM2

PWM3

Block current consumption at 3 MHz – – 42 μA 16-bit PWM Block current consumption at 12 MHz – – 130 μA 16-bit PWM Block current consumption at 48 MHz – – 535 μA 16-bit PWM

Table 28. PWM AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

PWMFREQ

PWMPWINT

PWMEXT

PWMKILLINT

PWMKILLEXT

PWMEINT

PWMENEXT

PWMRESWINT

PWMRESWEXT

Operating frequency F Pulse width (internal) 2 × T Pulse width (external) 2 × T Kill pulse width (internal) 2 × T Kill pulse width (external) 2 × T Enable pulse width (internal) 2 × T Enable pulse width (external) 2 × T Reset pulse width (internal) 2 × T Reset pulse width (external) 2 × T

CLK

–48MHz – ––ns – ––ns – ––ns – ––ns – ––ns – ––ns – ––ns – ––ns –

LCD Direct Drive

Table 29. LCD Direct Drive DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

LCDLOW

LCDCAP

LCD

OFFSET

LCDOP1

LCDOP2

Operating current in low-power mode – 17.5 – μA

LCD capacitance per segment/common driver

– 500 5000 pF –

Long-term segment offset – 20 – mV –

LCD system operating current, V

= 5 V – 2 – mA

BIAS

= 3.3 V – 2 – mA

BIAS

16 × 4 small segment display at 50 Hz

3 2 × 4 s e g me n t s . 5 0 H z a t 25 °C

32 × 4 segments 50 Hz at 25 °C

Table 30. LCD Direct Drive AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

LCD

LCD frame rate 10 50 150 Hz –

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Serial Communication

Table 31. Fixed I2C DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

I2C1

I2C2

I2C3

I2C4

Table 32. Fixed I

Parameter Description Min Typ Max Units Details/Conditions

I2C1

Table 33. Fixed UART DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

UART1

UART2

Table 34. Fixed UART AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

UART

Block current consumption at 100 kHz – – 50 μA– Block current consumption at 400 kHz – – 155 μA– Block current consumption at 1 Mbps – – 390 μA– I2C enabled in Deep-Sleep mode – – 1.4 μA–

C AC Specifications

Bit rate – – 400 kHz

Block current consumption at 100 kbps – – 55 μA– Block current consumption at 1000 kbps – – 312 μA–

Bit rate – – 1 Mbps –

Table 35. Fixed SPI DC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

SPI1

SPI2

SPI3

Block current consumption at 1 Mbps – – 360 μA– Block current consumption at 4 Mbps – – 560 μA– Block current consumption at 8 Mbps – – 600 μA–

Table 36. Fixed SPI AC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

SPI

SPI operating frequency (master; 6x over sampling) – – 8 MHz –

Table 37. Fixed SPI Master Mode AC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

DMO

DSI

HMO

MOSI valid after SCLK driving edge – – 18 ns – MISO valid before SCLK capturing edge

Full clock, late MISO sampling used

20 – – ns Full clock, late MISO sampling

Previous MOSI data hold time 0 – – ns Referred to Slave capturing edge

Table 38. Fixed SPI Slave Mode AC Specifications

Parameter Description Min Ty p Max Units

DMI

DSO

DSO_ext

HSO

SSELSCK

MOSI valid before SCLK capturing edge 40 – – ns MISO valid after SCLK driving edge – – 42 + 3 × T MISO Valid after SCLK driving edge in

external clock mode. V

< 3.0 V

– – 50 ns

CPU

Previous MISO data hold time 0 – – ns SSEL valid to first SCK valid edge 100 – – ns

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Memory

Note

7. It can take as much as 20 ms to write to flash. During this time, the device should not be reset, or flash operations will be interrupted and cannot be relied on to have completed. Reset sources include the XRES pin, software resets, CPU lockup states and privilege violations, improper power supply levels, and watchdogs. Make certain that these are not inadvertently activated.

Table 39. Flash DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

WS48

WS32

WS16

Erase and program voltage 1.71 – 5.5 V – Number of Wait states at 32–48 MHz 2 – – CPU execution from flash Number of Wait states at 16–32 MHz 1 – – CPU execution from flash Number of Wait states for 0–16 MHz 0 – – CPU execution from flash

Table 40. Flash AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

ROWWRITE

ROWERASE

ROWPROGRAM

BULKERASE

DEVPROG

END

RET

RET2

[7]

Row (block) write time (erase and program) – – 20 ms Row (block) = 256 bytes

[7]

Row erase time – – 13 ms –

[7]

Row program time after erase – – 7 ms –

[7]

Bulk erase time (256 KB) – – 35 ms –

[7]

Total device program time – – 25 seconds – Flash endurance 100 K – – cycles – Flash retention. TA ≤ 55 °C, 100 K P/E cycles 20 – – years – Flash retention. TA ≤ 85 °C, 10 K P/E cycles 10 – – years –

System Resources

Power-on-Reset (POR)

Table 41. POR DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

RISEIPOR

FALLIPOR

IPORHYST

Rising trip voltage 0.80 – 1.45 V – Falling trip voltage 0.75 – 1.40 V – Hysteresis 15 – 200 mV –

Table 42. POR AC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

PPOR_TR

Precision power-on reset (PPOR) response time in Active and Sleep modes

––1

μs–

Table 43. Brown-Out Detect

Parameter Description Min Typ Max Units Details/Conditions

FALLPPOR

FALLDPSLP

BOD trip voltage in Active and Sleep modes 1.64 – – V – BOD trip voltage in Deep Sleep 1.4 – – V –

Table 44. Hibernate Reset

Parameter Description Min Typ Max Units Details/Conditions

HBRTRIP

BOD trip voltage in Hibernate 1.1 – – V –

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Voltage Monitors (LVD)

Table 45. Voltage Monitor DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

LVI 1

LVI 2

LVI 3

LVI 4

LVI 5

LVI 6

LVI 7

LVI 8

LVI 9

LVI 10

LVI 11

LVI 12

LVI 13

LVI 14

LVI 15

LVI 16

LVI_IDD Block current – – 100

LVI_A/D_SEL[3:0] = 0000b 1.71 1.75 1.79 V – LVI_A/D_SEL[3:0] = 0001b 1.76 1.80 1.85 V – LVI_A/D_SEL[3:0] = 0010b 1.85 1.90 1.95 V – LVI_A/D_SEL[3:0] = 0011b 1.95 2.00 2.05 V – LVI_A/D_SEL[3:0] = 0100b 2.05 2.10 2.15 V – LVI_A/D_SEL[3:0] = 0101b 2.15 2.20 2.26 V – LVI_A/D_SEL[3:0] = 0110b 2.24 2.30 2.36 V – LVI_A/D_SEL[3:0] = 0111b 2.34 2.40 2.46 V – LVI_A/D_SEL[3:0] = 1000b 2.44 2.50 2.56 V – LVI_A/D_SEL[3:0] = 1001b 2.54 2.60 2.67 V – LVI_A/D_SEL[3:0] = 1010b 2.63 2.70 2.77 V – LVI_A/D_SEL[3:0] = 1011b 2.73 2.80 2.87 V – LVI_A/D_SEL[3:0] = 1100b 2.83 2.90 2.97 V – LVI_A/D_SEL[3:0] = 1101b 2.93 3.00 3.08 V – LVI_A/D_SEL[3:0] = 1110b 3.12 3.20 3.28 V – LVI_A/D_SEL[3:0] = 1111b 4.39 4.50 4.61 V –

μA–

Table 46. Voltage Monitor AC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

MONTRIP

Voltage monitor trip time – – 1 μs–

SWD Interface

Table 47. SWD Interface Specifications

Parameter Description Min Ty p Max Units Details/Conditions

F_SWDCLK1 3.3 V ≤ VDD ≤ 5.5 V – – 14 MHz SWDCLK ≤ 1/3 CPU clock frequency F_SWDCLK2 1.71 V ≤ V

≤ 3.3 V – – 7 MHz SWDCLK ≤ 1/3 CPU clock frequency

T_SWDI_SETUP T = 1/f SWDCLK 0.25 × T – – ns – T_SWDI_HOLD T = 1/f SWDCLK 0.25 × T – – ns – T_SWDO_VALID T = 1/f SWDCLK – – 0.5 × T ns – T_SWDO_HOLD T = 1/f SWDCLK 1 – – ns –

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Internal Main Oscillator

Table 48. IMO DC Specifications

Parameter Description Min Typ Max Units Details/Conditions

IMO1

IMO2

IMO3

IMO4

IMO5

Table 49. IMO AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

IMOTOL3

Internal Low-Speed Oscillator

Table 50. ILO DC Specifications

Parameter Description Min Ty p Max Units Details/Conditions

ILO2

Table 51. ILO AC Specifications

Parameter Description Min Typ Max Units Details/Conditions

STARTILO1

ILOTRIM1

IMO operating current at 48 MHz – – 1000 μA– IMO operating current at 24 MHz – – 325 μA– IMO operating current at 12 MHz – – 225 μA– IMO operating current at 6 MHz – – 180 μA– IMO operating current at 3 MHz – – 150 μA–

Frequency variation from 3 to 48 MHz – – ±2 % With API-called calibration IMO startup time – 12 – μs–

ILO operating current at 32 kHz – 0.3 1.05 μA–

ILO startup time – – 2 ms – 32-kHz trimmed frequency 15 32 50 kHz –

Table 52. ECO Trim Value Specification

Parameter Description Value Details/Conditions

ECO

TRIM

BLE Subsystem

Table 53. BLE Subsystem

Parameter Description Min Typ Max Units Details/Conditions

RF Receiver Specification

RXS, IDLE RX sensitivity with idle transmitter – –89 – dBm –

RXS, DIRTY RX sensitivity with dirty transmitter – –87 –70 dBm

RXS, HIGHGAIN

PRXMAX Maximum input power –10 –1 – dBm

CI1

24-MHz trim value (firmware configuration)

RX sensitivity with idle transmitter excluding Balun loss

RX sensitivity in high-gain mode with idle transmitter

Cochannel interference, Wanted signal at –67 dBm and Interferer at FRX

0x00007FDC

– –91 – dBm

– –91 – dBm –

– 9 21 dB

Optimum trim value that needs to be loaded to register CY_SYS_XTAL_BLERD_BB_XO_CAPTRIM_REG

Guaranteed by design simulation

RF-PHY Specification (RCV-LE/CA/01/C)

RF-PHY Specification (RCV-LE/CA/06/C)

RF-PHY Specification (RCV-LE/CA/03/C)

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Table 53. BLE Subsystem (continued)

Parameter Description Min Typ Max Units Details/Conditions

Adjacent channel interference

CI2

CI3

CI4

CI5

CI3

OBB1

OBB2

OBB3

OBB4

IMD

RXSE1

RXSE2

RF Transmitter Specifications

Wanted signal at –67 dBm and Interferer at FRX ±1 MHz

Adjacent channel interference Wanted signal at –67 dBm and Interferer at FRX ±2 MHz

Adjacent channel interference Wanted signal at –67 dBm and Interferer at ≥FRX ±3 MHz

Adjacent channel interference Wanted Signal at –67 dBm and Interferer at Image frequency (F

Adjacent channel interference Wanted signal at –67 dBm and Interferer at Image frequency (F

Out-of-band blocking, Wanted signal at –67 dBm and Interferer at F = 30–2000 MHz

Out-of-band blocking, Wanted signal at –67 dBm and Interferer at F = 2003–2399 MHz

Out-of-band blocking, Wanted signal at –67 dBm and Interferer at F = 2484–2997 MHz

Out-of-band blocking, Wanted signal a –67 dBm and Interferer at F = 3000–12750 MHz

Inter modulation performance Wanted signal at –64 dBm and 1-Mbps BLE, third, fourth, and fifth offset channel

Receiver spurious emission 30 MHz to 1.0 GHz

Receiver spurious emission

1.0 GHz to 12.75 GHz

IMAGE

– 3 15 dB

– –29 – dB

– –39 – dB

– –20 – dB

)

– –30 – dB

± 1 MHz)

–30 –27 – dBm

–35 –27 – dBm

–30 –27 – dBm

–50 – – dBm

–––57dBm

–––47dBm

RF-PHY Specification (RCV-LE/CA/03/C)

RF-PHY Specification (RCV-LE/CA/04/C)

RF-PHY Specification (RCV-LE/CA/05/C)

100-kHz measurement bandwidth ETSI EN300 328 V1.8.1

1-MHz measurement bandwidth ETSI EN300 328 V1.8.1

TXP, ACC RF power accuracy – ±1 – dB –

TXP, RANGE RF power control range – 20 – dB –

TXP, 0dBm Output power, 0-dB Gain setting (PA7) – 0 – dBm –

TXP, MAX

TXP, MIN

F2AVG

F1AVG

Output power, maximum power setting (PA10)

Output power, minimum power setting (PA1)

Average frequency deviation for 10101010 pattern

Average frequency deviation for 11110 000 patt ern

–3 – dBm –

– –18 – dBm –

185 – – kHz

225 250 275 kHz

RF-PHY Specification (TRM-LE/CA/05/C)

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Table 53. BLE Subsystem (continued)

Parameter Description Min Typ Max Units Details/Conditions

EO Eye opening = ΔF2AVG/ΔF1AVG 0.8 – –

FTX, ACC Frequency accuracy –150 – 150 kHz

FTX, MAXDR Maximum frequency drift –50 – 50 kHz

FTX, INITDR Initial frequency drift –20 – 20 kHz

FTX, DR Maximum drift rate –20 – 20

IBSE1

IBSE2

TXSE1

TXSE2

RF Current Specifications

IRX Receive current in normal mode – 18.7 – mA –

In-band spurious emission at 2-MHz offset

In-band spurious emission at ≥3-MHz offset

Transmitter spurious emissions (average), <1.0 GHz

Transmitter spurious emissions (average), >1.0 GHz

–––20dBm

––-30dBm

– – -55.5 dBm FCC-15.247

– – -41.5 dBm FCC-15.247

kHz/

RF-PHY Specification (TRM-LE/CA/05/C)

RF-PHY Specification (TRM-LE/CA/06/C)

RF-PHY Specification

μs

(TRM-LE/CA/06/C) RF-PHY Specification

(TRM-LE/CA/03/C) RF-PHY Specification

(TRM-LE/CA/03/C)

IRX_RF Radio receive current in normal mode – 16.4 – mA Measured at V

IRX, HIGHGAIN Receive current in high-gain mode – 21.5 – mA –

ITX, 3dBm TX current at 3-dBm setting (PA10) – 20 – mA –

ITX, 0dBm TX current at 0-dBm setting (PA7) – 16.5 – mA –

ITX_RF, 0dBm Radio TX current at 0 dBm setting (PA7) – 15.6 – mA Measured at V

ITX_RF, 0dBm

ITX,-3dBm TX current at –3-dBm setting (PA4) – 15.5 – mA –

ITX,-6dBm TX current at –6-dBm setting (PA3) – 14.5 – mA –

ITX,-12dBm TX current at –12-dBm setting (PA2) – 13.2 – mA –

ITX,-18dBm TX current at –18-dBm setting (PA1) – 12.5 – mA –

Iavg_1sec, 0dBm

Iavg_4sec, 0dBm

General RF Specifications

FREQ RF operating frequency 2400 – 2482 MHz –

Radio TX current at 0 dBm excluding Balun loss

Average current at 1-second BLE connection interval

Average current at 4-second BLE connection interval

– 14.2 – mA

– 17.1 –

–6.1 – μA

μA

Guaranteed by design simulation

TXP: 0 dBm; ±20-ppm master and slave clock accuracy. For empty PDU exchange

DDR

CHBW Channel spacing – 2 – MHz –

DR On-air data rate – 1000 – kbps –

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Table 53. BLE Subsystem (continued)

Parameter Description Min Typ Max Units Details/Conditions

IDLE2TX BLE.IDLE to BLE. TX transition time – 120 140 μs–

IDLE2RX BLE.IDLE to BLE. RX transition time – 75 120

RSSI Specifications

RSSI, ACC RSSI accuracy – ±5 – dB –

RSSI, RES RSSI resolution – 1 – dB –

RSSI, PER RSSI sample period – 6 –

μs–

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Environmental Specifications

Note

8. This does not apply to the RF pins (ANT, XTALI, and XTALO). RF pins (ANT, XTALI, and XTALO) are tested for 500-V HBM.

Environmental Compliance

This Cypress BLE module is built in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen Free (HF) directives. The Cypress module and components used to produce this module are RoHS and HF compliant.

RF Certification

The CYBLE-212006-01 and CYBLE-202007-01 modules will be certified under the following RF certification standards at production release.

n FCC: WAP2006

n CE

n IC: 7922A-2006

n MIC: TBD

n KC: TBD

Safety Certification

The CYBLE-212006-01 and CYBLE-202007-01 modules comply with the following regulations:

n Underwriters Laboratories, Inc. (UL) - Filing E331901

n CSA

n TUV

Environmental Conditions

Ta bl e 5 4 describes the operating and storage conditions for the Cypress BLE module.

Table 54. Environmental Conditions for CYBLE-2X20XX-X1

Description Minimum Specification Maximum Specification

Operating temperature –40 °C 85 °C Operating humidity (relative, non-condensation) 5% 85% Thermal ramp rate Storage temperature Storage temperature and humidity – 85 ° C at 85%

ESD: Module integrated into system Components

[8]

– 3 °C/minute

–40 °C 85 °C

–

15 kV Air

2.2 kV Contact

ESD and EMI Protection

Exposed components require special attention to ESD and electromagnetic interference (EMI). A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance. Any openings in the enclosure

near the module should be surrounded by a grounded conductive layer to provide ESD protection and a low-impedance path to ground. Device Handling: Proper ESD protocol must be followed in manufacturing to ensure component reliability.

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RF Exposure distance of the device is 15mm.

la distance d'exposition RF de l'appareil est de 15mm.

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MIC Japan

CYBLE-212006-01 and CYBLE-202007-01 are certified as a module with type certification number TBD. End products that integrate CYBLE-212006-01 and CYBLE-202007-01 do not need additional MIC Japan certification for the end product.

End product can display the certification label of the embedded module.

KC Korea

CYBLE-212006-01 and CYBLE-202007-01 are certified for use in Korea with certificate number TBD.

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PRELIMINARY

CYBLE-212006-01 CYBLE-202007-01

CYBLE-202013-11

Packaging

Table 55. Solder Reflow Peak Temperature

Module Part Number Package Maximum Peak Temperature

CYBLE-2X20XX-X1 30-pad SMT 260 °C 30 seconds 2

Table 56. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2

Module Part Number Package MSL

CYBLE-2X20XX-X1 30-pad SMT MSL 3

The CYBLE-2X20XX-X1 is offered in tape and reel packaging. Figure 10 details the tape dimensions used for the CYBLE-2X20XX-X1.

Figure 10. CYBLE-2X20XX-X1 Tape Dimensions

Maximum Time at Peak

Tem per atur e

No. of Cycles

Figure 11 details the orientation of the CYBLE-2X20XX-X1 in the tape as well as the direction for unreeling.

Figure 11. Component Orientation in Tape and Unreeling Direction (Illustration Only) - TBD

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CYBLE-212006-01 CYBLE-202007-01

CYBLE-202013-11

Figure 12 details reel dimensions used for the CYBLE-2X20XX-X1.

Figure 12. Reel Dimensions

The CYBLE-2X20XX-X1 is designed to be used with pick-and-place equipment in an SMT manufacturing environment. The center-of-mass for the CYBLE-2X20XX-X1 is detailed in Figure 13.

Figure 13. CYBLE-2X20XX-X1 Center of Mass (Seen from Top) - TBD

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CYBLE-212006-01 CYBLE-202007-01

CYBLE-202013-11

Ordering Information

Ta bl e 5 7 lists the CYBLE-2X20XX-X1 part numbers and features.

Table 57. Ordering Information

Part Number

CYBLE-212006-01 48 256 Yes 2 4 1 Msps Yes Yes 30-SMT Tape and Reel Yes CYBLE-202007-01 48 256 Yes 2 4 1 Msps Yes Yes 30-SMT Tape and Reel Yes CYBLE-202013-11 48 256 Yes 2 4 1 Msps Yes Yes 30-SMT Tape and Reel No

CPU

Speed

(MHz)

Flash

Size (KB)

CapSense SCB TCPWM

12-Bit

SAR ADC

I2S LCD Package Packing Certified

Part Numbering Convention

The part numbers are of the form CYBLE-ABCDEF-GH where the fields are defined as follows.

For additional information and a complete list of Cypress Semiconductor BLE products, contact your local Cypress sales representative. To locate the nearest Cypress office, visit our website.

U.S. Cypress Headquarters Address 198 Champion Court, San Jose, CA 95134 U.S. Cypress Headquarter Contact Info (408) 943-2600 Cypress website address http://www.cypress.com

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CYBLE-202013-11

Acronyms Document Conventions

Table 58. Acronyms Used in this Document

Acronym Description

BLE Bluetooth Low Energy Bluetooth

SIG CE European Conformity CSA Canadian Standards Association EMI electromagnetic interference ESD electrostatic discharge FCC Federal Communications Commission GPIO general-purpose input/output IC Industry Canada IDE integrated design environment KC Korea Certification

MIC

PCB printed circuit board RX receive QDID qualification design ID

SMT

TCPWM timer, counter, pulse width modulator (PWM)

TUV

TX transmit

Bluetooth Special Interest Group

Ministry of Internal Affairs and Communications (Japan)

surface-mount technology; a method for producing electronic circuitry in which the components are placed directly onto the surface of PCBs

Germany: Technischer Überwachungs-Verein (Technical Inspection Association)

Units of Measure

Table 59. Units of Measure

Symbol Unit of Measure

°C degree Celsius kV kilovolt mA milliamperes mm millimeters mV millivolt

A microamperes

μ μ

m micrometers MHz megahertz GHz gigahertz Vvolt

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CYBLE-212006-01 CYBLE-202007-01

CYBLE-202013-11

Document History Page

Document Title: CYBLE-212006-01, CYBLE-202007-01, CYBLE-202013-11 EZ-BLE™ PRoC™ 4.2 XR Module Document Number: 002-09764

Revision ECN

PRELIM-

INARY

Orig. of Change

MINS

Submission

Date

PRELIM-

INARY

Description of Change

Preliminary datasheet for CYBLE-212006-01, CYBLE-202007-01 and CYBLE-202013-11module.

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PRELIMINARY

CYBLE-212006-01 CYBLE-202007-01

CYBLE-202013-11

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations.

Products

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Technical Support

cypress.com/support

© Cypress Semiconductor Corporation, 2016. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, in cludin g Spansion LLC ("C ypress"). This document, incl uding any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited.

TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any res ulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.

Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.

Document Number: 002-15631 Rev.PRELIMINARY Revised July 28, 2016 Page 38 of 38

Cypress Semiconductor 2006 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

More Information

PSoC® Creator™ Integrated Design Environment (IDE)

Bluetooth Low Energy Component

Technical Support

Contents

Overview

Module Description

Module Dimensions and Drawing

Pad Connection Interface

Recommended Host PCB Layout

Power Supply Connections and Recommended External Components

Connection Options

External Component Recommendation

Electrical Specification

GPIO

XRES

Temperature Sensor

SAR ADC

Digital Peripherals

Timer

Counter

Pulse Width Modulation (PWM)

LCD Direct Drive

Serial Communication

Memory

System Resources

Power-on-Reset (POR)

Voltage Monitors (LVD)

SWD Interface

Internal Main Oscillator

Internal Low-Speed Oscillator

BLE Subsystem

Environmental Specifications

Environmental Compliance

RF Certification

Safety Certification

Environmental Conditions

ESD and EMI Protection

MIC Japan

KC Korea

Packaging

Ordering Information

Part Numbering Convention

Acronyms Document Conventions

Units of Measure

Document History Page

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Products

PSoC® Solutions

Cypress Developer Community

Technical Support