512K x 8 SRAM Module
CYM1465
1CYM146 5
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Features
• High-density 4-megabit SRAM module
• High-speed CMOS SRAMs
—Access time of 70 ns
• Low active power
—605 mW (max.)
• 2V data retention (L Version)
• JEDEC-compatible pinout
• 32-pin, 0.6-inch-wide DIP package
• TTL-compatible inputs and outputs
• Low profile
—Max. height of 0.27 in.
• Small PCB footprint
—0.98 sq. in.
Functional Description
The CYM1465 is a high-performance 4-megabit static RAM
module organized as 512K words by 8 bits. This module is
constructed using four 128K x 8 RAMs mounted on a substrate
with pins. A decoder is used to interpret the higher-order addresses (A
Writing to the module is accomplished when the chip select
) and write enable (WE) inputs are both LOW. Data on the
(CS
eight input/output pins (I/O
ten into the memory location specified o n the a ddress pins (A
through A18). Reading the device is accomplished by taking
chip select and output enable (OE
remains inactive or HIGH. Under these conditions, the contents of the memory location spec i fied o n the address pins (A
through A18) will appear on the eight appropriate data input/output pins (I/ O
The input/output pins remain in a high-impedance state unle ss
and A18) and to select one of the four RAMs.
17
through I/O7) of the device is writ-
0
) LOW while write enable
through I/O7).
0
the module is selected, outputs are enabled, and write enable
is HIGH.
Logic Block Diagram Pin Configuration
DIP
0
1
2
Top View
1
S
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A0− A
16
WE
OE
A
A
CS
A
18
A
16
A
14
A
12
A
128K x 8
SRAM
17
18
1 OF 4
DECODER
128K x 8
SRAM
128K x 8
SRAM
128K x 8
SRAM
A
A
A
A
A
A
A
I/O
I/O
I/O
GND
7
6
5
4
3
2
1
0
0
0
32
V
CC
31
A
15
A
30
17
29
WE
28
A
13
27
A
8
26
A
9
A
25
11
24
OE
A
23
10
22
CS
21
I/O
I/O
I/O
I/O
I/O
7
6
5
4
3
20
19
18
17
1465–2
1465–1
I/O − I/O
0
7
Selection G uide
1465-70 1465-85 1465-100 1465-120 1465-150
Maximum Access Time (ns) 70 85 100 120 150
Maximum Operati ng Current (mA) 110 110 110 110 110
Maximum Standby Current (mA) 12 12 12 12 12
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
January 1991 – Revised January 1995
(a)
(b)
1465–3 1465–4
5V
90%
10%
3.0V
GND
90%
10%
OUTPUT
INCLUDING
JIG AND
SCOPE
5V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
<10ns
1.847k Ω 1.847k
Ω
OUTPUT
C
L
[2]
1kΩ1kΩ
Equiva le nt to: THÉ VENIN EQUIVALENT
<10ns
648Ω
1.76V
CYM1465
Maximum Ratings
(Above which the useful life may be impaired.)
Storage Temperature . ................................–55°C to +150°C
Ambient Temperature with
Power Applied...............................................–10°C to +85°C
Supply Voltage to Ground Potential...............–0.5V to +7.0V
DC Input Voltage ................................. ............-0.5V to +7.0V
Operating Range
Ambient
Range
Commercial 0°C to +70°C 5V ± 10%
Industrial –40°C to +85°C 5V ± 10%
Temperature
V
CC
DC Voltage Applied to Outputs
in High Z State ............................................... –0.5V to +7.0V
Electrical Characteristics Over the Operating Range
1465
Parameter Description Test Conditions Min. Max. Unit
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1
I
SB2
Capacitance
C
IN
C
OUT
Output HIGH Voltage VCC = Min., IOH = –1.0 mA 2.4 V
Output LOW Voltage VCC = Min., IOL = 2.1 mA 0.4 V
Input HIGH Voltage 2.2 VCC + 0.3 V
Input LOW Voltage –0.3 0.8 V
Input Load Current GND < VI < V
CC
–10 +10 µA
Output Leakage Current GND < VO < VCC, Output Disabled –20 +20 µA
VCC Operating Supply
Current
Automatic CS Power-Down
Current
Automatic CS Power-Down
Current
[1]
VCC = Max., I
= 0 mA, CS < V
OUT
Max. VCC, CS > VIH,
Min. Duty Cycle = 100%
Max. VCC, CS > VCC - 0.2V,
V
> VCC - 0.2V or VIN < 0.2V
IN
IL
110 mA
12 mA
Standard Version 8 mA
L Version 420 µA
Parameter Description Test Conditions Max. Unit
Input Capacitance TA = 25°C, f = 1 MHz,
V
= 5.0V
Output Capacitance 45 pF
CC
45 pF
AC Test Loads and Waveforms
Notes:
1. Tested on a sample basis.
2