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CY8CKIT-030 PSoC
®
3 Development
Kit Guide
Doc. # 001-61038 Rev. *A
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl): 408.943.2600
http://www.cypress.com
Page 2
Copyrights
Copyrights
© Cypress Semiconductor Corporation, 2011. The information contained herein is subject to change without notice. Cypress
Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress
product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor
intended to be used for medical, life support, life saving, critical control or sa fety applica tions, unless pursu ant to an express
written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in lifesupport systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The
inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use
and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by
and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty
provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, transla tion, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described
herein. Cypress does not assume any liability arising out of the applica tion or use of any product or circuit described herein.
Cypress does not authorize its products for use as critical components in life-support systems whe re a malfunction or failure
may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all
charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
®
Creator™ is a trademark and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks
PSoC
or registered trademarks referenced herein are property of the respective corporations.
Flash Code Protection
Cypress products meet the specifications contained in their particular Cypress PSoC Data Sheets. Cypress believes that its
family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used.
There may be methods, unknown to Cypress, that can breach the code protecti on features. Any of these methods, to our
knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as ‘unbreakable’.
Cypress is willing to work with the customer who is concerned about the inte grity of their code. Co de prot ection i s constantly
evolving. We at Cypress are committed to continuously improving the code protection features of our products.
2 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
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Contents
1. Introduction 5
1.1 Kit Contents..................................... ... ... ....................................... ... ... ... .... ..................5
1.2 PSoC Creator ..............................................................................................................5
1.3 Additional Learning Resources..................... ... ... ... ... .... ... ... ... .... ... ...............................6
1.4 Document History ........................................................................................................6
1.5 Documentation Conventions .......................................................................................6
2. Getting Started 7
2.1 Introduction..................................................................................................................7
2.2 CD Installation .................................... ... ... .... ... ... ... ... .... ...................................... .... ... ..7
2.3 Install Hardware...........................................................................................................8
2.4 Install Software ............................................................................................................8
2.5 Uninstall Software........................................................................................................8
3. Kit Operation 9
3.1 Introduction..................................................................................................................9
3.2 Programming PSoC 3 Device......................................................................................9
4. Hardware 11
4.1 System Block Diagram ....................................... ....................................... ... ... ... .... ...11
4.2 Functional Description .................................. ......................................... .... ................12
4.2.1 Power Supply.................................................................................................12
4.2.1.1 Power Supply Jumper Settings........................................................14
4.2.1.2 Grounding Scheme..........................................................................14
4.2.1.3 Low Power Functionality. .... ... ... ... ... .... ... ... ... .... ... ... ... ... .... ... ... ... .......15
4.2.2 Programming Interface...................................................................................15
4.2.2.1 On-board Programming Interface....................................................15
4.2.2.2 JTAG/SWD Programming................................................................16
4.2.3 USB Communication..................... .... ... ... ... ... .... ... ... ... .... ... ... ..........................17
4.2.4 Boost Convertor.............................................................................................18
4.2.5 32-kHz and 24-MHz Crystal...........................................................................19
4.2.6 PSoC 3 Development Kit Expansion Ports....................................................19
4.2.6.1 Port D. ... ....................................... ... .... ... ... .......................................19
4.2.6.2 Port E........ ... ... ... ....................................... ... .... ... ... ..........................21
4.2.7 RS-232 Interface............................................................................................22
4.2.8 Prototyping Area ........... ... .... ... ... ... .... ... ... ....................................... ... ... ... .... ...22
4.2.9 Character LCD........................................... ... .... ... ... ... ....................................23
4.2.10 CapSense Sensors........................................................................................24
5. Example Projects 25
5.1 Voltage Display..........................................................................................................26
5.1.1 Project Description..................................... ... .... ... ... ... .... ... ... ... ... .... ... .............26
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Contents
5.1.2 Hardware Connections ..................................................................................26
5.1.3 Del-Sig ADC Configuration............................................................................26
5.1.4 Verify Output..................................................................................................27
5.2 Intensity LED...... ... ... ....................................... ... .... ...................................... ... .... ......27
5.2.1 Project Description .. ... ... .... ... ... ....................................... ... ... .... ... ...................27
5.2.2 Hardware Connections ..................................................................................27
5.2.3 Verify Output..................................................................................................28
5.3 Low Power Demonstration ........................................................... ... .... ......................28
5.3.1 Project Description .. ... ... .... ... ... ....................................... ... ... .... ... ...................28
5.3.2 Hardware Connections ..................................................................................28
5.3.3 Verify Output..................................................................................................28
5.4 CapSense Example...................................................................................................29
5.4.1 Project Description .. ... ... .... ... ... ....................................... ... ... .... ... ...................29
5.4.2 Hardware Connections ..................................................................................29
5.4.3 Verify Output..................................................................................................30
5.5 ADC and DMA-DAC Example...................................................................................31
5.5.1 Project Description .. ... ... .... ... ... ....................................... ... ... .... ... ...................31
5.5.2 Hardware Connections ..................................................................................31
5.5.3 Verify Output..................................................................................................31
A. Appendix 33
A.1 Schematic..................................................................................................................33
A.2 Board Layout......... ... .... ... ... ... ... ....................................... ... .... ... ... .............................38
A.2.1 PDC-09589 Top.............................................................................................38
A.2.2 PDC-09589 Power.........................................................................................39
A.2.3 PDC-09589 Ground.......................................................................................40
A.2.4 PDC-09589 Bottom........................................................................................41
A.3 BOM .........................................................................................................................42
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1. Introduction
Thank you for your interest in the CY8CKIT-030 PSoC® 3 Development Kit. This kit allows you to
develop precision analog and low power designs using PSoC 3. You can design your own projects
with PSoC Creator™ or by altering sample projects prov ided with this kit.
The CY8CKIT-030 PSoC 3 Development Kit is based on the PSoC 3 family of dev ices. PSoC 3 is a
Programmable System-on-Chip™ platform for 8- and 16-bit applications. It combines precision
analog and digital logic with a high-performance CPU. With PSoC, you can create the exact
combination of peripherals and integrated proprietary IP to meet your application requirements.
1.1 Kit Contents
The PSoC 3 Development Kit contains:
■ Development board
■ Kit CD
■ Quick Start Guide
■ USB A to Mini B cable
■ 3.3 V LCD module
Inspect the contents of the kit; if you find any part missing, contact your n earest Cypress sales office
for help.
1.2 PSoC Creator
Cypress's PSoC Creator software is a state-of-the-art, easy-to-use integrated development
environment (IDE) that introduces a game-changing, hardware and software design environment
based on classic schematic entry and revolutionary embedded design methodology.
With PSoC Creator, you can:
■ Create and share user-defined, custom peripherals using hierarchical schematic design.
■ Automatically place and route select components and integrate simple glue logic, normally
located in discrete muxes.
■ Trade-off hardware and software design considerations allowing you to focus on what matters
and getting to market faster.
PSoC Creator also enables you to tap into an entire tools eco system with integrated compiler tool
chains, RTOS solutions, and prod uction programmers to support both PSoC 3 and PSoC 5.
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Introduction
1.3 Additional Learning Resources
Visit www.cypress.com for additional learning resources in the form of data sheets, technical
reference manual, and application notes.
1.4 Document History
Revision
** 01/06/11 QVS Initial version of kit guide
*A 04/28/11 RKAD Updated Schematic
PDF Creation
Date
1.5 Documentation Conventions
Table 1-1. Document Conventions for Guides
Convention Usage
Courier New
Italics
[Bracketed, Bold]
File > Open
Bold
Times New Roman
Text in gray boxes Describes cautions or unique functionality of the product.
Displays file locations, user entered text, and source code:
C:\ ...cd\icc\
Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Designer User Guide.
Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
Represents menu paths:
File > Open > New Project
Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Displays an equation:
2 + 2 = 4
Origin of
Change
Description of Change
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2. Getting S tarted
2.1 Introduction
This chapter describes how to install and configure the PSoC 3 Development Kit. Chapter 3
describes the kit operation. It explains how to program a PSoC 3 device with PSoC Programmer and
use the kit with the help of an example project. To reprogram the PSoC device with PSoC Creator,
refer to the CD installation instructions for PSoC Creator. Chapter 4 details the hardware operation.
Chapter 5 provides instructions to create a simple example project. The Appendix section provides
the schematics and BOM associated with the PSoC 3 Development Kit.
2.2 CD Installation
Follow these steps to install the PSoC 3 Development Kit software:
1. Insert the kit CD into the CD drive of your PC. The CD is designed to auto-run and the kit menu
appears.
Figure 2-1. Kit Menu
Note If auto-run does not execute, double-click AutoRun on the root directory of the CD.
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Getting Started
After the installation is complete, the kit contents are available at the following location:
C:\Program Files\Cypress\PSoC 3 Development Kit\1.0
2.3 Install Hardware
No hardware installation is required for this kit.
2.4 Install Software
When installing the PSoC 3 Development Kit, the installer checks if your system has the required
software. These include PSoC Creator, PSoC Programmer, Windows Installer, .NET, Acrobat
Reader, and KEIL Complier. If these applications are not installed, then the installer prompts you to
download and install them.
Install the following software from the kit CD:
1. PSoC Creator
2. PSoC Programmer 3.12.3 or later
Note When installing PSoC Programmer, select Typical on the Installation Type page.
3. Example projects (provided in the Firmware folder)
2.5 Uninstall Software
The software can be uninstalled using one of the following methods:
■ Go to Start > Control Panel > Add or Remove Programs; select the Remove button.
■ Go to Start > All Programs > Cypress > Cypress Update Manager > Cypress Update Man-
ager; select the Uninstall button.
■ Insert the installation CD and click Install PSoC 3 Development Kit button. In the CyInstaller
for PSoC 3 Development Kit 1.0 window, select Remove from the Installation T ype drop-down
menu. Follow the instructions to uninstall.
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3. Kit Operation
3.1 Introduction
The example projects in the PSoC 3 Development Kit help you develop precision analog
applications using the PSoC 3 family of devices. The board also has hooks to enable low power
measurements for low power application development and evaluation.
3.2 Programming PSoC 3 Device
The default programming interface for the board is a USB based on-board programming interface.
To program the device, plug the USB cable to the programming USB connector J1, as shown in the
following figure.
Figure 3-1. Connect USB Cable to J1
When plugged in, the board enumerates as DVKProg. After enumeration, initiate, build, and then
program using PSoC Creator.
When using on-board programming, it is not necessary to power the board from the 12-V or 9-V DC
supply or a battery. The USB power to the programming section can be used.
If the board is already powered from another source, plugging in the programming USB does not
damage the board.
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Kit Operation
The PSoC 3 device on the board can also be programmed using a MiniProg3 (CY8CKIT-002). To
use MiniProg3 for programming, use the connector J3 on the board as shown in the following figure.
Note The MiniProg3 (CY8CKIT-002) is not part of the PSoC 3 Development Kit contents. It can be
purchased from the Cypress Online Store.
Figure 3-2. Connect MiniProg
With the MiniProg3, programming is similar to the on-board programmer; however, the setup
enumerates as a MiniProg3.
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4. Hardware
4.1 System Block Diagram
The PSoC 3 Development Kit has the following sections:
■ Power supply system
■ Programming interface
■ USB communications
■ Boost convertor
■ PSoC 3 and related circuitry
■ 32-kHz crystal
■ 24-MHz crystal
■ Port E (analog performance port) and port D (CapSense
■ RS232 communications interface
■ Prototyping area
■ Character LCD interface
■ CapSense buttons and sliders
®
or generic port)
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Hardware
Power Adapter
9V Battery
Boost Converter
Input
Communication USB
10-Pin JTAG/SWD/SWO
Debug and Prog Header
On-Board
Programming
USB
24 MHz Crystal
Port D
(CapSense/
Miscellaneous
Port)
32 kHz Crystal
Port E
(Analog Port)
Variable
Resistor/
Potentiometer
RS-232
Interface
Character LCD Interface
Switches/LEDs
Prototyping Area
CapSense
RESET Button
Figure 4-1. PSoC 3 Development Kit Details
4.2 Functional Description
4.2.1 Power Supply
The power supply system on this board is versatile; input supply can be from the following sources:
■ 9-V or 12-V wall wart supply using connector J4
■ 9-V battery connector using connectors BH1 and BH2
■ USB power from communications section using connector J2
■ USB power from the on-board programming section using connector J1
■ Power from JTAG/SWD programming interface using connector J3
■ Power through boost convertor that uses the input test points VBAT and GND
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Hardware
3.3-V Regulator
5-V Regulator
5-V/3.3-V Analog
Regulator
USB
Commu nication
Power
9-V Battery
12-V/9-V Wall
wart
Vin
Vddd
Selection
(J10)
Vdda
Selection
(J11)
3.3 V
Vddd
5 V
Vdda
USB
Programming
5 V
The board power domain has five rails:
■ Vin rail: This is where the input of the on-board regulators are connected. This domain is
powered through protection diodes.
■ 5-V rail: This is the output of the 5-V regulator U2. The rail is a fixed 5 V output regardless of
jumper settings. The voltage in this rail can be less than 5 V only when the board is powered by
the USB. This 5-V rail powers the circuits that require fixed 5 V supply.
■ 3.3-V rail: This is the output of the 3.3-V regulator U4. This rail remains 3.3 V regardless of
jumper settings or power source changes. It powe rs the circui t s requ iring fixed 3.3 V supply such
as the on-board programming section.
■ Vddd rail: This rail provides power to the digital supply for the PSoC device. It can be derived
from either the 5 V or 3.3 V rail. The selection is made using J10 (3-pin jumper).
■ Vdda rail: This rail provides power to the analog supply of the PSoC device. It is the output of a
low noise regulator U1. The regulator is a variable output voltage and can be either 3.3 V or 5 V.
This is done by changing the position on J11 (3-pin jumper).
The following block diagram shows the structure of the power system on the board.
Figure 4-2. Power System Structure
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Hardware
4.2.1.1 Power Supply Jumper Settings
Figure 4-3. Jumper Settings
Two jumpers govern the power rails on the board. J10 is responsible for the selection of Vddd (digital
power) and J11 selects Vdda (analog power).
The jumper settings for each power scheme are as follows.
Powering Scheme Jumper Settings
Vdda = 5 V, Vddd = 5 V J10 in 5 V setting and J11 in 5 V setting.
Vdda = 3.3 V, Vddd = 3.3 V J10 in 3.3 V setting and J11 in 3.3 V setting.
Vdda = 5 V, Vddd = 3.3 V J10 in 3.3 V setting and J11 in 5 V setting.
Vdda = 3.3 V, Vddd = 5 V
Warning:
■ The PSoC device performance is guaranteed when Vdda is greater than or equal to Vddd. Fail-
ure to meet this condition can have implications on the silicon performance.
■ When USB power is used, ensure a 3.3 V setting on both analog and digital supplies. This is
because, the 5 V rail of the USB power is not accurate and is not recommended.
4.2.1.2 Grounding Scheme
The board is designed considering analog designs as major target applications. Therefore, the
grounding scheme in the board is unique to ensure precision analog performance.
There are three types of ground on this board:
■ GND - This is the universal ground where all the regulators are referred. Both Vssd and Vssa
connect to this ground through a star connection.
■ Vssd - This is the digital ground and covers the digital circuitry present on the board, such as
RS232 and LCD.
■ Vssa - This is the analog ground and covers the grounding for analog circuitry present on the
board, such as the reference block.
Can be achieved, but is an invalid condition because the PSoC 3 silicon
performance cannot be guaranteed.
When creating custom circuitry in the prototyping area provided on the board, remember to use the
Vssa for the sensitive analog circuits and Vssd for the digital ones.
Port E on the board is the designated analog expansion connector. This connector brings out
ports 0, 3, and 4, which are the best performing analog ports on PSoC 3 and PSoC 5 devices. The
expansion connector, port E, has two types of grounds. One is the analog ground (GND_A in silk
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screen, Vssa in the schematic), which connects directly to the analog ground on the board. The
other ground known simply as GND, is used for the digital and high current circuitry on the
expansion board. This differentiation on the connector grounds helps the expansion board designer
to separate the analog and digital ground on any high precision analog boards being designed for
port E.
4.2.1.3 Low Power Functionality
The kit also facilitates application development, which requires low power consumption. Low power
functions require a power measurement capability, also available in this kit.
The analog supply is connected to the device through the zero-ohm resistor (R23). By removing this
resistor and connecting an ammeter in series using the test points, Vdda_p and Vdda, you can
measure the analog power used by the system.
The digital supply can be monitored by removing connection on the jumper J10 and connecting an
ammeter in place of the short. This allows to measure the digital power used by the system.
The board provides the ability to measure analog and digital power separately. T o measure power at
a single point, rather than at analog and di git al sep ar ately, remove the resistor R23 to disconnect the
analog regulator from powering the Vdda and short Vdda and Vddd through R30. Now, the net
power can be measured at the J10 jumper similar to the digital power measurement. To switch
repeatedly between R23 and R30, moving around the zero-ohm resistors can be discomforting.
Hence, a J38 (unpopulated) is provided to populate a male 3 -pi n he ader a nd h ave a shor tin g jum per
in the place of R23/R30.
Hardware
While measuring device power, make the following changes in the board to avoid leakage through
other components that are connected to th e device power rails.
■ Disconnect the RS232 power by disconnecting R58. An additional jumper capability is available
as J37 if you populate it with a 2-pin male header.
■ Disconnect the potentiometer by disconnecting J30.
■ Ground the boost pins if boost operation is not used by po pulating R1, R28, and R29. Also make
sure R25 and R31 are not populated.
4.2.2 Programming Interface
This kit allows programming in two modes:
■ Using the on-board programming interface
■ Using the JTAG/SWD programming interface that uses a MiniProg3
4.2.2.1 On-board Programming Interface
The on-board programmer interfaces with your PC through a USB connector marked as USB
programming.
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Hardware
Figure 4-4. On-board Programming Interface
When the USB programming is plugged into the PC, it enumerates as DVKProg and you can use the
normal programming interface from PSoC Creator to program this board through the on-board
programmer.
A zero-ohm resistor R9 is provided on the board to disconnect power to the on-board programme r.
4.2.2.2 JTAG/SWD Programming
Apart from the on-board programming interface, the board also provides the option of using the
MiniProg3. This interface is much faster than the on-board program interface. The JTAG/SWD
programming is done through the 10-pin connector, J3.
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Figure 4-5. JTAG/SWD Programming
Hardware
The JTAG/SWD programming using J3 requires the MiniProg3 programmer, which can be
purchased from http://www.cypress.com.
4.2.3 USB Communication
The board has a USB communications interface that uses the connector, as shown in Figure 4-6.
The USB connector connects to the D+ and D– lines on the PSoC to enable development of USB
applications using the board. This USB interface can also supply power to the board as di scussed in
Power Supply on page 12.
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Hardware
Figure 4-6. USB Interface
4.2.4 Boost Convertor
The PSoC 3 device has a unique capability of working from a voltage supply as low as 0.5 V. This is
possible using the boost convertor. The boost convertor uses an external inductor and a diode.
These components are pre-populated on the board. Figure 4-7 shows the boost convertor.
To enable the boost convertor functionality, make the following hardware changes on the board.
■ Populate resistors R25, R27, R29, and R31
■ Ensure that R1 and R28 are not populated
After making these changes, you can make a boost convertor based design by making the
appropriate configurations in the project. The input power supply to the boost convertor must be
provided through the test points marked Vbat and GND.
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Figure 4-7. Boost Converter
Hardware
4.2.5 32-kHz and 24-MHz Crystal
PSoC 3 has an on-chip Real Time Clock (RTC), which can function in sleep. This requires an
external 32-kHz crystal, which is provided on board to facilitate RTC based designs. The PSoC 3
also has an option for an external MHz crystal in applications where the IMO tolerance is not
satisfactory. In these applications, the board has a 24-MHz crystal to provide an accurate main
oscillator.
4.2.6 PSoC 3 Development Kit Expansion Ports
The PSoC 3 Development Kit has two expansion ports, Port D and Port E, each with their own
unique features.
4.2.6.1 Port D
This is the miscellaneous port on the board. It is designe d to handle CapSense based application
boards and digital application boards. The signal routing to this port adheres to the stringent
requirements posed to provide good performance CapSense. This port can also be used for other
functions and Expansion Board Kits (EBKs).
This port is not designed for precision analog performance. The pins on the port are functionally
compatible to port B of the PSoC Development Kit. So any project made to function on port B of the
PSoC Development Kit can be easily ported over to port D on this board. A caveat to this is that
there is no opamp available on this port; therefore, opamp based designs are not recommended for
use on this port.
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Hardware
The following figure shows the pin mapping for the port.
Figure 4-8. Port D
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4.2.6.2 Port E
This is the analog port on this kit and has special layout considerations. It also brings out all analog
resources such as dedicated opamps to a single connect. Therefore, this port is ideal for precision
analog design development. This port is functionally compatible to port A of the PSoC Development
Kit and it is easy to port application developed on port A.
There are two types of grounds on this port, CGND1 and CGND2. The two grounds are conne cted to
the GND on the board, but are provided for expansion boards desig ned for analog performance. The
expansion boards have an analog and digital ground. The two grounds on this port help to keep it
distinct even on this board until it reaches the GND plane.
Figure 4-9. Port E
Hardware
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Hardware
4.2.7 RS-232 Interface
The board has an RS-232 transceiver on board for designs using RS-232 (UART). The RS-232
section power can be disconnected through a single resistor R58. This is useful for low-power
designs.
Figure 4-10. RS-232 Interface
4.2.8 Prototyping Area
The prototyping area on the board has two complete ports of the device for simple custom circuit
development. The ports in the area are port 0 and port 3, which bring out the four dedicated opamp
pins on the device. Therefore, these ports can be used with the prototyping area to create simple yet
elegant analog designs. It also brings SIOs such as port 12[4], port 12[5], port 12[6], and port 12[7]
and GPIOs such as port P6[0] and port P6[6]. There is power and ground connections close to the
prototyping space for convenience.
The area also has four LEDs and two switches for applications development. The two switches on
the board are hard-wired to port 15[5] and port 6[1]. Two LEDs out of the four are hard-wired to port
6[2] and port 6[3] and the other two are brought out on pads closer to the prototyping area.
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Figure 4-11. Prototyping Area
Hardware
This area also comprises of a potentiometer to be used for analog system development work. The
potentiometer connects from Vdda, whic h is a n o ise free supply and is hence capable of being used
for low noise analog applications. Potentiometer output is available on P6[5] and VR o n header P6 in
prototyping area.
4.2.9 Character LCD
The kit has a character LCD module, which goes into the character LCD header, P8. The LCD runs
on a 3.3-V supply and can function regardless of the voltage on which PSoC is powered. There is a
zero-ohm resistor setting available on the LCD section (R71/72), making it possible to convert it to a
3.3 V LCD.
CAUTION: When the resistor is shifted to support a 5 V LCD module, plugging in a 3.3 V LCD mod-
ule into the board can damage the LCD module.
Figure 4-12. Pin 1 Indication
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 23
Page 24
Hardware
Figure 4-13. LCD Connected on P8 Connector
4.2.10 CapSense Sensors
The board layout has considered the special requirements for CapSense. It has two CapSense
buttons and a 5-element CapSense slider. The CapSense buttons are connected to pins P5[6] and
P5[5]. The slider elements are connected to pins P5[0:4].
The Cmod (modulation capacitor) is connected to pin P6[4] and an optional Rb (bleeder resistor) is
available on P15[4].
Figure 4-14. CapSense Sensors
24 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 25
5. Example Projects
To access example projects described in this section, open the PSoC Creator start page. For
additional example projects, visit http://www.cypress.com.
Figure 5-1. PSoC Creator Start Page
Follow these steps to open and program example projects:
1. Click on Example Projects from Kits and Solutions on the PSoC Creator Start page.
2. Create a folder in the desired location and click OK.
3. The project opens in PSoC Creator and is saved to that folder.
4. Build the example project to generate the .hex file.
5. To program the example projects, power the board us ing the instructions in On-board Program-
ming Interface on page 15.
6. Click the Program icon to program the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 25
Page 26
Example Projects
5.1 Voltage Display
5.1.1 Project Description
This example code measures a simple analog voltage controlled by the potentiometer. The code
uses the internal Delta-Sigma ADC configured for a 20-bit operation; the ADC range is 0 to Vdda.
The voltage measurement resolution is in microvolts. The results are displayed on the character
LCD module.
Note The PSoC 3 Development Kit is factory-programmed with the Voltage Display example
project.
5.1.2 Hardware Connections
The example requires the character LCD on P8. Because it uses the potentiometer, the jumper
POT_PWR should be in place. This connects the potentiometer to the Vdda.
5.1.3 Del-Sig ADC Configuration
Figure 5-2. Delta-Sigma ADC Configuration
The Del-Sig ADC is configured as follows:
■ Continuous mode of operation is selected because the ADC scans only one channel.
■ Conversion rate is set to 187 samples/sec, which is the maximum sample rate possible at 20-bit
resolution.
■ Range is set to Vssa to Vdda in single ended mode because the potentiometer ou tp ut is a single
ended signal that can go from 0 to Vdda. Therefore, at 20-bit resolution, the ADC will resolve in
steps of Vdda/2
26 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
20
.
Page 27
5.1.4 V erify Output
Build and program the example project and reset the device. The LCD shows the voltage reading
corresponding to the voltage on the potent iometer. Figure 5-3 demonstrates the functionality. When
you turn the potentiometer, the voltage value changes. You can also verify the voltage on the
potentiometer using a precision multimeter.
Note The potentiometer connects to a differential ADC, which works in single-ended mode. This
means the ADC input is measured against internal Vssa. Any offset in the measurement can be
positive or negative. This can result in a small offset voltage, even when the potentiometer is zero.
Figure 5-3. Voltage Display
Example Projects
5.2 Intensity LED
5.2.1 Project Description
This example code uses a pulse width modulator ( PWM) to illumin ate an LED. When the pul se wid th
of the PWM varies, the LED brightness changes. By continuously varying the pulse width of the
PWM, the example code makes an LED go from low brightness to a high brightness and back.
5.2.2 Hardware Connections
No hardware connections are required for this project, because all the connectio ns ar e ha rd wired to
specific pins on the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 27
Page 28
Example Projects
5.2.3 V erify Output
When the example code is built and programmed into the device, reset the device by pressing the
RESET button or power cycling the board.
The project output is LED3 glowing with a brightness control that changes with time (see Figure 5-4).
Figure 5-4. Verify Output - Example Project
5.3 Low Power Demonstration
5.3.1 Project Description
This example project demonstrates the low power functionality of PSoC 3. The project implements
an RTC based code, which goes to sleep and wakes up on the basis of switch input s.
The RTC uses an accurate 32-kHz clock generated using the external cryst al provid ed on the boar d.
When there is a key press, the device is put to sleep while the RTC is kept active.
5.3.2 Hardware Connections
The project requires a 3.3 V LCD to view the time display. No extra connections are required for
project functionality. To make low power measurements using this project, refer and implement the
changes proposed in Low Power Functionality on page 15.
5.3.3 V erify Output
In normal operation, the project displays the time star ting from 00:00:00. When you press the SW2
button, the device is put to sleep. If an ammeter is connected to measure the system current (refer
Low Power Functionality on page 15 for details), a system current of less than 2 µA is displayed.
The device wakes up when SW2 is pressed again and displays the time on the LCD. The following
figures show the output display.
28 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 29
Figure 5-5. PSoC 3 in Active Mode
Figure 5-6. PSoC 3 in Sleep Mode
Example Projects
5.4 CapSense Example
5.4.1 Project Description
This example project provides a platform to build CapSense based projects using PSoC 3. The
example uses two CapSense buttons and one 5-element slider provided on the board. Each
capacitive sensor on the board is scanned using the Cypress CSD algorithm. The buttons are pretuned in the example code to take care of factors such as board parasitic.
5.4.2 Hardware Connections
This project uses the LCD for display; therefore, ensure that it is plugged into the port. There ar e no
specific hardware connections required for this project because all connections are hard wired on
the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 29
Page 30
Example Projects
5.4.3 V erify Output
Build and program the example project and reset the device. The LCD displays the status of the two
buttons as ON/OFF . The LCD also shows the slider touch position as a percentage. When you touch
either of the buttons, the corresponding button's state changes on the LCD. When the slider is
touched, the corresponding finger posit io n is displa ye d as a pe rc en tage on the LCD.
Figure 5-7. CapSense Slider
Figure 5-8. CapSense Button
30 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 31
5.5 ADC and DMA-DAC Example
5.5.1 Project Description
This project demonstrates sine wave generation by using an 8-bit DAC and DMA. The sine wave
period is based on the current value of the ADC value of the potentiometer.
The firmware reads the voltage output by the board potentiometer and displays the raw counts on
the board character LCD display. An 8-bit DAC outputs a table generated sine wave to an LED using
DMA at a frequency proportional to the ADC count.
5.5.2 Hardware Connections
For this example, the character LCD must be installed on P8. The example uses the potentiometer;
therefore, the jumper POT_PWR should also be in place. This jumper connects the potentiometer to
the Vdda.
5.5.3 V erify Output
Build, program the device, and press the Reset button on the PSoC 3 Development Kit to see the
ADC output displayed on the LCD. LED4 is an AC signal output whose period is based on the ADC.
Turning the potentiometer results in LCD value change. This also results in change in the period of
the sine wave fed into LED4, which can also be observed.
Example Projects
Figure 5-9. ADC Output
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 31
Page 32
Example Projects
32 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 33
A. Appendix
VSSA
VSSD
Note:
For 5V: J11-3 to J11-2, J10-3 to J10-2
For 3.3V: J11-2 to J11-1, J10-2 to J10-1
For 5V Analog,3.3V Digital: J11-3 to J11-2, J10-2 to J10-1
5.0V/1A LDO
3.3V/0.8A LDO
+9V/+12V, 1A
9V Battery
Terminals
VSSB
GND
Power Supply
VSSA
NO LOAD
VSSD
GND
GND
GND
GND
GND
5V/3.3V/0.5A LDO
GND
NO LOAD
GND
Note: Load R30 when either
Analog and Digital regulator required
VSSD
NO LOAD
VSSA
VDDA_P
RED
VSSD
NO LOAD
VSSA
VSSD
NO LOAD
GND GND
NO LOAD
VBAT
GND
Note: Load R25, R29 and R31 for operating the device on Boost
Note: Load R1,R28 and Un-Load R27 for low power application
NO LOAD
Internal Boost Regulator
NO LOAD
VSSB
NO LOAD
GND
SEL3V3
SENSE
SENSE
SEL3V3
VDDA_P
Ind
Vboost
VDDA
VDDD
V3.3
VDDD
V5.0
V5.0
VDDA
VIN
V3.3
V5.0
VDDD
VDDA
V5.0
VDDA
VBAT
VDDD
0805
R29
0805
R29
0805
R31
0805
R31
0805
R28
0805
R28
SOT23
D6
ZHCS
SOT23
D6
ZHCS
TO-252
U2
AP1117D50G
TO-252
U2
AP1117D50G
GND
1
VOUT
2
VIN
3
0402
C23
0.1 uFd
0402
C23
0.1 uFd
0805
R25
0805
R25
7032
L1
22 uH
7032
L1
22 uH
0805
R26
ZERO
0805
R26
ZERO
1 2
0805
D5
LED Green
0805
D5
LED Green
21
0603
R13
3.74K
0603
R13
3.74K
12
D-64
D4
SS12-E3/61T
D-64
D4
SS12-E3/61T
2 1
J11J11
11223
3
J4
POWER JACK P-5
J4
POWER JACK P-5
1
2
3
SOT-223
U4
LM1117MPX-3.3
SOT-223
U4
LM1117MPX-3.3
GND
1
VOUT
2
VIN
3
TAB
4
J33J33
1
1
9V
BH1
BAT 9V MALE
9V
BH1
BAT 9V MALE
NEG1
1
NEG2
2
NEG3
3
0805
R15
330 ohm
0805
R15
330 ohm
12
D-64
D3
SS12-E3/61T
D-64
D3
SS12-E3/61T
2 1
TP3
RED
TP3
RED
0805
R24
ZERO
0805
R24
ZERO
12
+
3216
C14
10 uFd 16v
+
3216
C14
10 uFd 16v
J38J38
1
1
2
2
3
3
+
3216
C2
10 uFd 16v
+
3216
C2
10 uFd 16v
0402
C3
0.1 uFd
0402
C3
0.1 uFd
1210
C6
22 uFd
10V
1210
C6
22 uFd
10V
BH2
BAT 9V FEMALE
BH2
BAT 9V FEMALE
POS1
1
POS2
2
POS3
3
0805
R23
ZERO
0805
R23
ZERO
1 2
+
3216
C15
10 uFd 16v
+
3216
C15
10 uFd 16v
1210
C22
22 uFd
10V
1210
C22
22 uFd
10V
TP1
BLACK
TP1
BLACK
0805
R57
ZERO
0805
R57
ZERO
12
+
3216
C13
10 uFd 16v
+
3216
C13
10 uFd 16v
0805
R11
1K
0805
R11
1K
12
TP2
RED
TP2
RED
0805
R30
ZERO
0805
R30
ZERO
12
TP4
RED
TP4
RED
+
3216
C4
10 uFd 16v
+
3216
C4
10 uFd 16v
J10J10
11223
3
0805
R27
ZERO
0805
R27
ZERO
1 2
0402
C17
0.1 uFd
0402
C17
0.1 uFd
0603
R12
3.16K
0603
R12
3.16K
12
+
3216
C5
10 uFd 16v
+
3216
C5
10 uFd 16v
U1
LT1763CS8
U1
LT1763CS8
IN
8
nSHDN
5
OUT
1
SENSE
2
Byp
4
GND3GND16GND2
7
0805R10805
R1
A.1 Schematic
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 33
Page 34
VSSD
NO LOAD
VSSB
NO LOAD
VSSD
VSSA
VSSD
VSSA
VSSA
PSoC 3 Section
VSSD
NO LOAD
VSSD
Rbleed
Cmod
NO LOAD NO LOAD
Note:
Place De-Caps near to the Chip
VSSD
VSSD
VSSD
NO LOAD
NO LOAD
VSSD
VSSA
NO LOAD
VSSA
VSSA
VSSA
NO LOAD
NO LOAD
P5[6]
P5[7]
P6[5]
P6[2]
P4[5]
P5[0]
P12[2]
P1[5]
P0[0]
P4[6]
P5[1]
P12[3]
/XRES
P5[2]
P4[7]
P5[3]
SWO
P4[1]
P4[2]
P6[3]
P4[3]
P4[4]
P3[1]
P0[1]
P6[4]
P15[5]
P3[2]
P0[2]
TDI
P2[0]
P2[1]
P2[2]
Ind
Vboost
VBAT
P2[3]
SWDCK
P2[4]
P2[5]
P4[0]
P2[6]
P6[0]
P2[7]
SWDIO
P0[5]
P0[4]
P12[0]
P0[7]
P1[7]
P3[3]
P6[1]
P0[3]
P12[1]
DP_P
P3[4]
DM_P
P3[0]
P0[6]
P15[4]
P3[6]
P3[7]
VBUS2
P1[6]
P12[4]
P6[7]
P15[4]
P12[5]
P12[6]
P12[7]
P1[2]
P5[4]
DM
DP
P3[5]
P5[5]
P6[6]
VCCa
VDDA
VDDA
VDDD
VDDD
VCCd
VCCd
VDDD
VDDD
VDDA
VDDD VDDA
0402
C36
0.1 uFd
0402
C36
0.1 uFd
21
Y3
24 MHz Crystal
21
Y3
24 MHz Crystal
0603
R38
2.2K
0603
R38
2.2K
J16
1 PIN HDR
J16
1 PIN HDR
1
1
0603
R35
ZERO
0603
R35
ZERO
0603
R36
ZERO
0603
R36
ZERO
0603
C27
22 pFd
0603
C27
22 pFd
12
Y2
32.768KHz XTAL
Y2
32.768KHz XTAL
1 2
345
0603
C37
1.0 uFd
0603
C37
1.0 uFd
J8
1 PIN HDR
J8
1 PIN HDR
1
1
J26
1 PIN HDR
J26
1 PIN HDR
1
1
R23KR2
3K
0402
C26
0.1 uFd
0402
C26
0.1 uFd
0603
R47
ZERO
0603
R47
ZERO
0402
C35
0.1 uFd
0402
C35
0.1 uFd
J12
1 PIN HDR
J12
1 PIN HDR
1
1
0402
C40
0.1 uFd
0402
C40
0.1 uFd
0402
C41
0.1 uFd
0402
C41
0.1 uFd
0402
C38
0.1 uFd
0402
C38
0.1 uFd
J25
1 PIN HDR
J25
1 PIN HDR
1
1
0402
C43
0.1 uFd
0402
C43
0.1 uFd
U7
CY8C3866AXI-040 TQFP100
U7
CY8C3866AXI-040 TQFP100
P2_5
1
P2_6
2
P2_7
3
P12_4 I2C0_SCL, SIO
4
P12_5 I2C0_SDA, SIO
5
P6_4
6
P6_5
7
P6_6
8
P6_7
9
VSSb
10
Ind
11
Vboost
12
Vbat
13
VSSd
14
XRES
15
P5_0
16
P5_1
17
P5_2
18
P5_3
19
P1_0
20
P1_1
21
P1_2
22
P1_3
23
P1_4
24
P1_5
25
VDDio126P1_627P1_728P12_6_SIO29P12_7_SIO30P5_431P5_532P5_633P5_734P15_6 DP35P15_7 DM36VDDd37VSSd38VCCd39NC140NC241P15_042P15_143P3_044P3_145P3_246P3_347P3_448P3_549VDDio3
50
VDDio0
75
P0_3
74
P0_2
73
P0_1
72
P0_0
71
P4_1
70
P4_0
69
SIO_P12_3
68
SIO_P12_2
67
VSSd
66
VDDa
65
VSSa
64
VCCa
63
NC8
62
NC7
61
NC6
60
NC5
59
NC4
58
NC3
57
P15_3
56
P15_2
55
SIO, I2C1_SDA P12_1
54
SIO, I2C1_SCL P12_0
53
P3_7
52
P3_6
51
P2_499P2_398P2_297P2_196P2_0
95
P15_594P15_4
93
P6_392P6_291P6_190P6_0
89
VDDd
88
VSSd
87
VCCd
86
P4_785P4_684P4_583P4_482P4_381P4_280P0_779P0_678P0_577P0_4
76
VDDio2
100
R8
1.5KR81.5K
0805
C39
2200 pFd
0805
C39
2200 pFd
12
0402
C30
22 pFd
0402
C30
22 pFd
0603
R33
22E
0603
R33
22E
1 2
0603
C44
1.0 uFd
0603
C44
1.0 uFd
0603
R39
ZERO
0603
R39
ZERO
TP5TP5
0603
C42
1.0 uFd
0603
C42
1.0 uFd
0402
C31
22 pFd
0402
C31
22 pFd
J18
1 PIN HDR
J18
1 PIN HDR
1
1
0603
R3222E
0603
R3222E
1 2
0402
C33
0.1 uFd
0402
C33
0.1 uFd
J22
1 PIN HDR
J22
1 PIN HDR
1
1
0402
C34
0.1 uFd
0402
C34
0.1 uFd
0603
C29
1.0 uFd
0603
C29
1.0 uFd
0603
C25
22 pFd
0603
C25
22 pFd
12
34 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 35
GND
PLACE ONE CAP PER EACH VCC ON U5.
PLACE C11 AND C16 CLOSE
CLOSE TO U5-3 AND U5-7.
TP2
GND
NO LOAD
GND
GND
FX2LP Programmer
GND
FIRMWARE UPDATE
REQUIRED FOR
GND
GND
GND
USB BACKVOLTAGE
COMPLIANCE.
GND
VSSD
VSSD
SWD/SWV/JTAG
VSSD
10-PIN TRACE HEADER
NO LOAD
SWDIO
SWDCK
3V3_FX12P
SWO
/XRES
D+
VBUS1
VBUS1
D-
3V3_FX12P
VBUS1
3V3_FX12P
VBUS1
SWO
/XRES
SWDCK
TDI
P2[5]
P2[7]
P2[4]
P2[6]
P2[3]
SWDIO
V3.3
VIN V5.0
VDDD
VDDD
0603
R21
39K
1%
0603
R21
39K
1%
1 2
0402
R5
2.2K
0402
R5
2.2K
Y1
24 MHzY124 MHz
13
2
0402
C11
2.2 uFd
6.3V
0402
C11
2.2 uFd
6.3V
0402
R17
10K
0402
R17
10K
0805
R9
ZERO
0805
R9
ZERO
12
0402
C8
0.01 uFd
0402
C8
0.01 uFd
1 2
8-SOIC
U3
24LC00/SN 8-SOIC
8-SOIC
U3
24LC00/SN 8-SOIC
SDA
5
NC11NC22NC3
3
VCC
8
SCL
6
NC4
7
GND
4
0402
C19
0.1 uFd
0402
C19
0.1 uFd
D-64
D8
SS12-E3/61T
D-64
D8
SS12-E3/61T
2 1
J3
50MIL KEYED SMD
J3
50MIL KEYED SMD
1
3
5
7
9
2
4
6
8
10
J40
50MIL KEYED SMD
J40
50MIL KEYED SMD
1
3
5
7
9
2
4
6
8
10
0402
C1
0.1 uFd
0402
C1
0.1 uFd
U5
CY7C68013A-56LTXC
U5
CY7C68013A-56LTXC
RESERVED
14
WAKEUP#
44
PA1/nINT1
34
SCL
15
VCC5
43
SDA
16
PA2/SLOE
35
VCC3
17
PA3/WU2
36
VCC4
27
PA4/FIFOADR0
37
PA5/FIFOADR1
38
AVCC1
3
PA6/PKTEND
39
GND3
26
PA7/FLAGD
40
GND4
28
PB0/FD0
18
GND6
56
AGND1
6
XTALIN
5
XTALOUT
4
PA0/nINT0
33
PB1/FD1
19
PB2/FD2
20
PB3/FD3
21
PB4/FD4
22
PB5/FD5
23
PB6/FD6
24
PB7/FD7
25
DPLUS
8
DMINUS
9
CLKOUT
54
RESET#
42
VCC6
55
RDY0/SLRD
1
RDY1/SLWR
2
CTL0/FLAGA
29
CTL1/FLAGB
30
CTL2/FLAGC
31
IFCLK
13
PD0/FD8
45
PD1/FD9
46
PD2/FD10
47
PD3/FD11
48
PD4/FD12
49
PD5/FD13
50
PD6/FD14
51
PD7/FD15
52
VCC111VCC2
32
GND112GND2
41
AGND2
10
AVCC2
7
GND553CP
57
0402
C10
0.1 uFd
0402
C10
0.1 uFd
0402
C18
0.1 uFd
0402
C18
0.1 uFd
D-64
D2
SS12-E3/61T
D-64
D2
SS12-E3/61T
2 1
0402
C21
0.1 uFd
0402
C21
0.1 uFd
0402
C16
0.1 uFd
0402
C16
0.1 uFd
TV1TV1
1
0402
R6
2.2K
0402
R6
2.2K
0402
C20
0.1 uFd
0402
C20
0.1 uFd
TV2
TV-20R
TV2
TV-20R
1
0603
R14
100K
1%
0603
R14
100K
1%
12
0402
R3
100K
0402
R3
100K
0603
R22
62K
1%
0603
R22
62K
1%
1 2
0402
C12
0.1 uFd
0402
C12
0.1 uFd
D-64
D11
D-64
D11
2 1
J1
USB MINI BJ1USB MINI B
VBUS
1
DM
2
DP
3
GND
5
ID
4
S16S2
7
S38S4
9
D-64
D10
D-64
D10
2 1
0402
C7
0.1 uFd
0402
C7
0.1 uFd
J9J9
1
1
D-64D9D-64
D9
2 1
NO LOAD
CapSense Button and Slider
NO LOAD
VSSA
NO LOAD
NO LOAD
VSSA
VSSD
NO LOAD
VSSA
NO LOAD
VSSD
NO LOAD
VSSA
NO LOAD
NO LOAD
VSSD
VSSD
VSSD
Prototype Area
VSSA
NO LOAD
Note: Load R56 for
high precision analog
Note: Un-Load R48 - R54 to disconnect Capacitive Sensors
VSSA
VSSD
VSSD
VSSD
VSSD
NO LOAD
NO LOAD
NO LOAD
NO LOAD
P0[2]
P6[5]
P0[3]
LED1
P0[4]
LED2
P0[5]
P0[6]
P0[7]
P6[5]
P6[1]
P6[2]
P3[0]
P3[1]
P3[2]
P15[5]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
P6[3]
P12[7]
LED1
P0[0]
P12[4]
P5[0]
P5[5]
P5[1]
P5[2]
P5[6]
P5[3]
P5[4]
P6[0]
P6[5]
/XRES
P12[5]
P0[1]
P6[6]
P12[6]
LED2
VDDD
VDDA
VDDD
V3.3
V5.0
VDDD
VDDA
VDDA
VDDA
VDDD
P9
RECP 8X1P9RECP 8X1
112233445566778
8
J6
1 PIN HDRJ61 PIN HDR
1
1
0805
LED2
LED Red
0805
LED2
LED Red
2 1
0805
R61
330 ohm
0805
R61
330 ohm
1 2
+
3216
C45
10 uFd 16v
+
3216
C45
10 uFd 16v
0603
R51
ZERO
0603
R51
ZERO
J34J34
1
1
CSB2
CapSense
CSB2
CapSense
1
0603
R48
ZERO
0603
R48
ZERO
J50
Breadboard
J50
Breadboard
R56
POT 10K
R56
POT 10K
13
2
0603
R49
ZERO
0603
R49
ZERO
CSB1
CapSense
CSB1
CapSense
1
0805
R62
330 ohm
0805
R62
330 ohm
1 2
R55
10K
R55
10K
1 3
2
SW3
SW PUSHBUTTON
SW3
SW PUSHBUTTON
1A1B2A
2B
CSS1
CapSense Linear Slider 5 Seg
CSS1
CapSense Linear Slider 5 Seg
12345
J7
1 PIN HDRJ71 PIN HDR
1
1
J31J31
1
1
J5
1 PIN HDRJ51 PIN HDR
1
1
P4
RECP 8X1P4RECP 8X1
112233445566778
8
J32J32
1
1
0805
R60
330 ohm
0805
R60
330 ohm
1 2
0603
R52
ZERO
0603
R52
ZERO
J30J30
1
1
2
2
J35
1 PIN HDR
J35
1 PIN HDR
1
1
0603
R54
ZERO
0603
R54
ZERO
0805
LED4
LED Red
0805
LED4
LED Red
2 1
0603
R53
ZERO
0603
R53
ZERO
0805
R59
330 ohm
0805
R59
330 ohm
1 2
SW1
SW PUSHBUTTON
SW1
SW PUSHBUTTON
1A1B2A
2B
0805
LED1
LED Red
0805
LED1
LED Red
2 1
0805
LED3
LED Red
0805
LED3
LED Red
2 1
J14
1 PIN HDR
J14
1 PIN HDR
1
1
J28
1 PIN HDR
J28
1 PIN HDR
1
1
SW2
SW PUSHBUTTON
SW2
SW PUSHBUTTON
1A1B2A
2B
P6P6
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
J29J29
1
1
J36
1 PIN HDR
J36
1 PIN HDR
1
1
0603
R50
ZERO
0603
R50
ZERO
J27
1 PIN HDR
J27
1 PIN HDR
1
1
P3
RECP 8X1P3RECP 8X1
112233445566778
8
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 35
Page 36
VSSD
CGND1
VSSD
CGND1
SDA
SCL
CGND1
GND
NO LOAD
SDASCL
Port E (Analog EBK Connector) Port D (Misc Connector)
NO LOAD
NO LOAD
NO LOAD
NO LOAD
NO LOAD
Expansion Connectors
VSSA
NO LOAD
NO LOAD
Use Separate Track
for CGND1 to GND
NO LOAD
Voltage Reference
VSSA
VSSA
NO LOAD
NO LOAD
VSSA
NO LOAD
VREF
P2[4]
P2[2]
P2[0]
P2[6]
P5[6]
P5[0]
P5[2]
P5[4]
P1[2]
P1[6]
TDI
SWDIO
SWO
SWDCK
P12[1]
P12[3]
P1[7]
P1[5]
P12[0]
P12[2]
VIN
V3.3
V5.0
P3[2]
P3[6]
P3[4]
P3[0]
P3[3]
P3[1]
P12[1]
P0[7]
P0[5]
P4[3]
P4[1]
P12[3]
P3[7]
P3[5]
P0[6]
P0[3]
P0[1]
P4[7]
P4[5]P4[4]
P4[2]
P4[0]
P12[0]
P12[2]
P0[4]
P0[2]
P0[0]
P4[6]
VIN
V3.3
V5.0
P2[3]
P2[1]
P2[7]
P2[5]
P5[7]
P5[5]
P5[3]
P5[1]
P3[2]
P0[3]
VREF
VDDA
J13J13
1
1
U6
LM4140U6LM4140
VIN
2
EN
3
VREF
6
NC
5
GND1GND14GND27GND3
8
0805
R73
ZERO
0805
R73
ZERO
1 2
0805
R37
ZERO
0805
R37
ZERO
1 2
J39J39
1
1
0603
C24
1.0 uFd
0603
C24
1.0 uFd
J17J17
1
1
+
3216
C28
10 uFd 16v
+
3216
C28
10 uFd 16v
J15J15
1
1
J21J21
1
1
P2
20x2 RECP RA
P2
20x2 RECP RA
112
2
334
4
556
6
778
8
9910
10
111112
12
131314
14
151516
16
171718
18
191920
20
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
J24J24
1
1
J20J20
1
1
0402
C32
0.1 uFd
0402
C32
0.1 uFd
0805
R34
ZERO
0805
R34
ZERO
1 2
J19J19
1
1
P1
20x2 RECP RA
P1
20x2 RECP RA
112
2
334
4
556
6
778
8
9910
10
111112
12
131314
14
151516
16
171718
18
191920
20
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
J23J23
1
1
36 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 37
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 37
Page 38
A.2 Board Layout
A.2.1 PDC-09589 Top
38 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 39
A.2.2 PDC-09589 Power
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 39
Page 40
A.2.3 PDC-09589 Ground
40 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 41
A.2.4 PDC-09589 Bottom
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 41
Page 42
A.3 BOM
Item Qty Reference Value Description Manufacturer Mfr Part Number
PCB Cypress PDC-09589
1 1 BH1 BAT 9V MALE
2 1 BH2 BAT 9V FEMALE
39
4 2 C6,C22 22 uFd
529
6 2 C8,C9 0.01 uFd
7 1 C11 2.2 uFd
8 4 C29,C37,C42,C44 1.0 uFd
9 4 C30,C31,C25, C27 22pF
10 1 C39 2200 pFd
11 6 D1,D2,D3,D4, D7, D8 SS12-E3/61T
12 1 D5 LED Green
13 1 D6 ZHCS
14 2 J1,J2 USB MINI B
15 1 J3
16 1 J4
17 5
19 4
20 1 L1 22 uH
21 2 P1,P2 20x2 RECP RA
22 1 P7 DB9 FEMALE
23 1 P8
24 2 R3,R4 100K
C2,C4,C5,C13,C14,C1
5,C28,C45,C46
C7,C10,C12,C16,C17,
C18,C19,C20,C21,C2
6,C32,C33,C34,C35,C
36,C38,C40,C41,C43,
C47,C48,C49,C50,C5
1,C52, C53, C1, C3,
C23
TP1, J26, J27, J35,
J28
LED1,LED2,LED3,LE
D4
10 uFd 16v
0.1 uFd
50MIL KEYED
SMD
POWER JACK P-5CONN JACK POWER 2.1mm
BLACK TEST
POINT
LED Red LED RED CLEAR 0805 SMD Rohm Semiconductor SML-210LTT86
LCD HEADER W/
O BACKLIGHT
BATTERY HOLDER 9V Male
PC MT
BATTER Y HOLDER 9V Female
PC MT
CAP 10UF 16V TANTALUM
10% 3216
CAP CER 22UF 10V 10% X5R
1210
CAP .1UF 16V CERAMIC Y5V
0402
CAP 10000PF 16V CERAMIC
0402 SMD
CAP CER 2.2UF 6.3V 20%
X5R 0402
CAP CERAMIC 1.0UF 25V X5R
0603 10%
CAP, CER, 22 pF, 50V, 5%,
COG, 0603, SMD
SMD/SMT 0805 2200pF 50volts
C0G 5%
DIODE SCHOTTKY 20V 1A
SMA
LED GREEN CLEAR 0805
SMD
DIODE SCHOTTKY 40V 1.0A
SOT23-3
CONN USB MINI AB SMT
RIGHT ANGLE
CONN HEADER 10 PIN 50MIL
KEYED SMD
PCB RA
TEST POINT PC MINI .040"D
Black
INDUCTOR SHIELD PWR
22UH 7032
CONN FMALE 40POS DL .100
R/A GOLD
CONN DB9 FMALE VERT
PRESSFIT SLD
CONN RECEPT 16POS .100
VERT AU
RES 100K OHM 1/16W 5%
0402 SMD
Keystone Electronics 593
Keystone Electronics 594
AVX TAJA106K016R
Kemet C1210C226K8PACTU
Panasonic - ECG ECJ-0EF1C104Z
Panasonic - ECG ECJ-0EB1C103K
Panasonic - ECG ECJ-0EB0J225M
Taiyo Yuden TMK107BJ105KA-T
Panasonic - ECG ECJ-0EC1H220J
Murata
Vishay/General Semi-
conductor
Chicago Miniature CMD17-21VGC/TR8
Zetex ZHCS1000TA
TYCO 1734035-2
Samtec FTSH-105-01-L-DV-K
CUI PJ-102A
Keystone Electronics 5001
TDK Corporation
Sullins Electronics
Corp.
Norcomp Inc. 191-009-223R001
Tyco Electronics 1-534237-4
Panasonic - ECG ERJ-2GEJ104X
GRM2165C1H222JA01
D
SS12-E3/61T
SLF7032T-220MR96-2PF
PPPC202LJBN-RC
42 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 43
Item Qty Reference Value Description Manufacturer Mfr Part Number
25 6
26 2 R5,R6 2.2K
27 1 R11 1K
28 1 R12 3.16K
29 1 R13 3.74K
30 1 R14 100K
31 5
32 8
33 13
34 2 R32,R33 22E
35 2 R63,R65 100 ohm
36 1 R56 POT 10K
37 1 R58 10E
38 1 R68 100 ohm
39 1 R69 10K
40 3 SW1,SW2,SW3
41 1 U1 LT1763CS8
42 1 U2 AP1117D50G IC REG LDO 1.0A 5.0V TO-252 Diodes Inc AP1117D50G-13
43 1 U3 24LC00/SN
44 1 U4 LM1117MPX-3.3
45 1 U5
46 1 U7
47 1 U8 MAX3232CDR
48 1 Y1 24 MHz
49 1 Y2 32.768KHz XTAL
50 1 Y3 24 MHz Crystal
R9,R23,R24,R26,R27,
R71
R15,R59,R60,R61,R6
2
R17,R40,R41,R42,R4
3,R44,R45,R46
R35,R36,R39,R47,R4
8,R49,R50,R51,R52,R
53,R54,R64,R66
ZERO
330 ohm
10K
ZERO
SW PUSHBUTTON
CY7C68013A56LTXC
CY8C3866AXI040 TQFP100
RES 0.0 OHM 1/10W 5% 0805
SMD
RES 2.2K OHM 1/16W 5%
0402 SMD
RES 1.0K OHM 1/8W 5% 0805
SMD
RES 3.16K OHM 1/10W .5%
0603 SMD
RES 3.74K OHM 1/10W 1%
0603 SMD
RES 100K OHM 1/10W 1%
0603 SMD
RES 330 OHM 1/10W 5% 0805
SMD
RES 10K OHM 1/16W 5% 0402
SMD
RES ZERO OHM 1/16W 5%
0603 SMD
RES 22 OHM 1/16W 1% 0603
SMD
RES 100 OHM 1/8W 5% 0805
SMD
POT 10K OHM 9MM SQ PLASTIC
RES 10 OHM 1/8W 5% 0805
SMD
RES 100 OHM 1/16W 5% 0603
SMD
RES 10K OHM 1/16W 5% 0603
SMD
LT SWITCH 6MM 160GF
H=2.5MM SMD
IC LDO REG LOW NOISE ADJ
8-SOIC
IC EEPROM 128BIT 400KHZ
8SOIC
IC REG 3.3V 800MA LDO SOT223
IC, FX2 HIGH-SPEED USB
PERIPHERAL CONTROLLER
QFN56
PSoC3 Mixed-Signal Array Cypress Semiconductor CY8C3866AXI-040
IC 3-5.5V LINE DRVR/RCVR
16-SOIC
RESONATOR, 24.000MHZ,
WITH CAPS, SMD
CRYSTAL 32.768 KHZ CYL
12.5PF CFS308
CRYSTAL 24.000MHZ 20PF
SMD
Panasonic-ECG ERJ-6GEY0R00V
Panasonic - ECG ERJ-2GEJ222X
Panasonic - ECG ERJ-6GEYJ102V
Yageo RT0603DRD073K16L
Panasonic - ECG ERJ-3EKF3741V
Yageo RC0603FR-07100KL
Panasonic - ECG ERJ-6GEYJ331V
Stackpole Electronics
Inc
Panasonic - ECG ERJ-3GEY0R00V
Panasonic - ECG ERJ-3EKF22R0V
Rohm MCR10EZHJ101
Bourns Inc. 3310Y-001-103L
Stackpole Electronics
Inc
Panasonic - ECG ERJ-3GEYJ101V
Panasonic - ECG ERJ-3GEYJ103V
Panasonic - ECG EVQ-Q2P02W
Linear Technology LT1763CS8#PBF
Microchip Technology 24LC00/SN
National Semiconductor LM1117IMP-3.3/NOPB
Cypress Semiconductor CY7C68013A-56LTXC
Texas Insturments MAX3232IDR
Murata
Citizen America Corpo-
ration
ECS Inc ECS-240-20-5PX-TR
RMCF 1/16S 10K 5% R
RMCF 1/10 10 5% R
CSTCE24M0XK2010R0
CFS308-32.768KDZFUB
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 43
Page 44
Item Qty Reference Value Description Manufacturer Mfr Part Number
51 3 J8,J33, TP2
52 1 R38 2.2K
53 2 J10,J11 3p_jumper
54 1 J30 2p_jumper
55 1 NA
56 1 NA 16 pin header
57 6
58 1 R21 39K
59 1 R22 62K
No Load Components
60 1 C24 1.0 uFd
61 13
62 4 J7,J32,J34,J36 BLACK
63 1 TP5 WHITE
64 1 J50 Breadboard BREADBOARD 17x5x2 3M 923273-I
65 4 P3,P4,P6,P9 RECP 8X1 CONN RECT 8POS .100 VERT 3M 929850-01-08-RA
66 1 R67 10K
67 10
68 1 R55 10K
69 2 R1,R28 ZERO
70 1 U6 LM4140
71 1 R8 1.5K
72 1 R2 3K
73 1 P5 4x1 RECP
74 1 J38 3p_jumper
75 1 J37 2p_jumper
76 1 J40
D9, D10, D11, D12,
D13, D14
J5,J6,J12,J14,J29,J31
,J18,J22,J25,TP3,TP4,
J16,J39
R30,R34,R57,R72,R2
5,R31,R70,R37,R29,
R73
RED TEST
POINT
3.3V LCD Module
16POS w/16 pin
header installed
ESD diode
RED
ZERO
50MIL KEYED
SMD
TEST POINT PC MINI .040"D
RED
RES 2.2KOHM 1/16W
2700PPM 5%0603
CONN HEADER VERT SGL
3POS GOLD
CONN HEADER VERT SGL
2POS GOLD
3.3V LCD Module 16POS w/16
pin header installed
CONN HEADER VERT SGL
16POS GOLD
SUPPRESSOR ESD 5VDC
0603 SMD
RES 39.0K OHM 1/10W 1%
0603 SMD
RES 62.0K OHM 1/10W 1%
0603 SMD
CAP CERAMIC 1.0UF 25V X5R
0603 10%
TEST POINT PC MINI .040"D
RED
TEST POINT PC MINI .040"D
Black
TEST POINT PC MINI .040"D
WHITE
POT 10K OHM 1/4" SQ CERM
SL ST
RES 0.0 OHM 1/10W 5% 0805
SMD
TRIMPOT 10K OHM 4MM TOP
ADJ SMD
RES ZERO OHM 1/10W 5%
0603 SMD
IC REF PREC VOLT
MICROPWR 8-SOIC
RES 1.5KOHM 1/10W
1500PPM 5%0805
RES 1/10W 3K OHM 0.1%
0805
CONN RECEPT 4POS .100
VERT GOLD
CONN HEADER VERT SGL
3POS GOLD
CONN HEADER VERT SGL
2POS GOLD
CONN HEADER 10 PIN 50MIL
KEYED SMD
Keystone Electronics 5000
Panasonic - ECG ERA-V27J222V
3M 961103-6404-AR
3M 961102-6404-AR
Lumex LCM-S01602DTR/A-3
3M 961116-6404-AR
Bourns Inc. CG0603MLC-05LE
Rohm Semiconductor MCR03EZPFX3902
Rohm Semiconductor MCR03EZPFX6202
Taiyo Yuden TMK107BJ105KA-T
Keystone Electronics 5000
Keystone Electronics 5001
Keystone Electronics 5002
Bourns Inc. 3362P-1-103LF
Panasonic-ECG ERJ-6GEY0R00V
Bourns Inc. 3214W-1-103E
Panasonic - ECG ERJ-3GEY0R00V
National Semiconductor LM4140ACM-1.0/NOPB
Panasonic - ECG ERA-S15J152V
Stackpole Electronics
Inc
3M 929850-01-04-RA
3M 961103-6404-AR
3M 961102-6404-AR
Samtec FTSH-105-01-L-DV-K
RNC 20 T9 3K 0.1% R
44 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
Page 45
Item Qty Reference Value Description Manufacturer Mfr Part Number
77 2 CSB1,CSB2 CapSense CapSense Button Cypress
78 1 CSS1
79 9
80 2 TV1,TV2 PADS PADS
Install On Bottom of PCB As Close To Corners As Possible
81 5
Special Jumper Installation Instructions
82 1 J30
83 2 J10, J11
J9,J13,J15,J17,J19,J2
0,J21,J23,J24
CapSense Linear Slider 5 Seg
PADS PADS
Install jumper
across pins 1 and
2
Install jumper
across pins 1 and
2
CapSense Slider Cypress
BUMPER CLEAR .500X.23"
SQUARE
Rectangular Connectors MINI
JUMPER GF 13.5 CLOSE
TYPE BLACK
Rectangular Connectors MINI
JUMPER GF 13.5 CLOSE
TYPE BLACK
Richco Plastic Co RBS-3R
Kobiconn 151-8030-E
Kobiconn 151-8030-E
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A 45
Page 46
46 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *A
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