Cypress CY7C185 User Manual
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1013
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ax id:
CY7C185
8K x 8 Static RAM
Features
• High speed
—15 ns
• Fast t
• Low active power
• Low st andby p ow e r
• CMOS for optimum speed/power
• Easy memory expansion with CE
• TTL-compatible inputs and outputs
• Automat ic power-dow n wh en deselected
DOE
—715 mW
—220 mW
, CE2, and OE f eatures
1
provided by an active LOW chip enable (CE
chip enable (CE
three-state driv ers . This de vi ce has an automati c power -do wn
feature (CE
), and active LOW output enable (OE) and
2
or CE2), reduci ng the po wer c onsumption b y 70%
1
when deselected. Th e CY7C185 i s in a st andard 3 00-mi l-wide
DIP, SOJ, or SOIC package.
An active LOW write enable signal (WE
ing/reading operation of the memory. When CE
puts are both LOW and CE
input/output pin s (I/O
location addressed by the address present on the address
pins (A
through A12). Reading the device is acco mplishe d by
0
0
is HIGH, data on the eight data
2
through I/O7) is written into the memory
selecting the device and enabling the outputs, CE
active LOW, CE2 active HIG H, wh ile WE rem ains in active or
HIGH. Under the se condit ions , the co ntents of the locat ion ad -
), an active HIGH
1
) controls the writ-
dressed by t he i nf ormation on a ddress p ins are pr ese nt on t he
Functional Description
The CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is
eight data input/output pins.
The input/out put pins rem ain in a high- impedance s tate unle ss
the chip is selected, outputs are enabled, and write enable
(WE
) is HIGH. A die coat is used to insure alpha immunity.
Logic Block Diagram Pin Configurations
DIP/SOJ/SOIC
Top View
NC
1
A
4
A
5
A
6
A
A
A
A
I/O
I/O
I/O
GND
7
A
8
A
9
10
11
12
0
1
2
I/O
0
INPUT BUFFER
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
ROW DECODER
256 x 32 x 8
ARRAY
SENSE AMPS
I/O
I/O
I/O
I/O
I/O
1
2
3
4
5
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
and WE in-
1
and OE
1
V
CC
WE
CE
2
A
3
A
2
A
1
OE
A
0
CE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
C185–2
I/O
6
CE
1
CE
2
WE
OE
Selection Guide
COLUMN DECODER
[1]
0
9
10
A
A
A
A11A
POWER
DOWN
12
I/O
C185–1
7
7C185–15 7C185–20 7C185–25 7C185–35
Maximum Access Time (ns) 15 20 25 35
Maximum Operati ng Current (mA) 130 110 100 100
Maximum Standby Current (mA) 40/15 20/15 20/15 20/15
Note:
1. For military specifications, see the CY7C185A datasheet.
Cypress Semiconductor Corporation
• 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Au
ust 12, 1998
CY7C185
Maximum Ratings
(Abov e which the use ful lif e ma y be impai red. F or use r guidelines, not tested.)
Storage Temperature .............................. .. .–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage t o Ground Potential. ..............–0.5V to +7.0V
DC Voltage Applied to Output s
in High Z State
DC Input Voltage
Electrical Characteristics
[2]
............................................–0.5V to +7.0V
[2]
......................................... –0.5V to +7.0V
Over the Operating Range
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage .......... .......... .. .......... .. ........ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current............ .......... ........ .. .. ........ .. ........ >200 mA
Operating Range
Ambient
Range
Commercial 0°C to +70°C 5V ± 10%
Industrial –40°C to +85°C 5V ± 10%
Temperature
V
7C185–15 7C185–20
Parameter Description Te st Conditions Min. Max. Min. Max. Unit
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB1
I
SB2
Notes:
2. Minimum voltage is equal to –3.0V for pulse durations less than 30 ns.
3. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 2.4 V
Output LOW Voltage VCC = Min., IOL = 8.0 mA 0.4 0.4 V
Input HIGH Voltage 2.2 VCC +
0.3V
Input LOW Voltage
Input Load Current GND ≤ VI ≤ V
Output Leakage
Current
Output Short
Circuit Current
VCC Operating
Supply Current
Automatic
Power-Down Current
Automatic
Power-Down Current
[2]
CC
GND ≤ V
Output Disabled
[3]
VCC = Max.,
V
OUT
V
CC
I
OUT
Max. VCC, CE1 ≥ VIH or CE
Min. Duty Cycle=100%
≤ V
I
= GND
= Max.,
= 0 mA
CC
,
2 ≤ VIL
Max. VCC, CE1 ≥ VCC – 0.3V,
≤ 0.3V
or CE
2
V
≥ VCC – 0.3V or VIN ≤ 0.3V
IN
–0.5 0.8 –0.5 0.8 V
–5 +5 –5 +5
–5 +5 –5 +5
–300 –300 mA
130 110 mA
40 20
15 15
2.2 VCC +
0.3V
CC
V
µA
µA
mA
mA
2
CY7C185
Electrical Characteristics
Over the Operati ng Range (continue d)
7C185–25 7C185-35
Parameter Description Test Conditions Min. Max. Min. Max. Unit
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
OS
I
CC
I
SB1
I
SB2
Capacitance
Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 2.4 V
Output LOW Voltage VCC = Min., IOL = 8.0 mA 0.4 0.4 V
Input HIGH Voltage 2.2 VCC +
0.3V
[3]
[2]
CC
GND ≤ V
Output Disabled
I
≤ V
CC
VCC = Max.,
V
= GND
OUT
V
= Max.,
CC
I
= 0 mA
OUT
Max. VCC, CE1 ≥ VIH or CE
Min. Duty Cycle =100%
Max. VCC, CE1 ≥ VCC – 0.3V
≤ 0.3V
or CE
2
V
≥ VCC – 0.3V or VIN ≤ 0.3V
IN
–0.5 0.8 –0.5 0.8 V
–5 +5 –5 +5
,
–5 +5 –5 +5
–300 –300 mA
100 100 mA
2 ≤ VIL
20 20 mA
15 15 mA
Input LOW Voltage
Input Load Current GND ≤ VI ≤ V
Output Leakage
Current
Output Short
Circuit Current
VCC Operating
Supply Current
Automatic
Po wer-Down Current
Automatic
Po wer-Down Current
[4]
2.2 VCC +
0.3V
Parameter Desc ription Test Conditions Max. Unit
C
IN
C
OUT
Note:
4. Tested initially and after any design or process changes that may affect these parameters.
Input Capacitance TA = 25°C, f = 1 MHz,
V
= 5.0V
Output Capacitance 7 pF
CC
7 pF
V
µA
µA
AC Test Loads and Waveforms
R1 481
5V
OUTPUT
30pF
INCLUDING
JIG AND
SCOPE
Equivalent to: THÉVENIN EQUIVALENT
(a) (b)
OUTPUT 1.73V
Ω
R2
255
Ω
167
OUTPUT
Ω
5V
5
pF
INCLUDING
JIGAND
SCOPE
R1 481
Ω
R2
255
C185–4
3.0V
≤
10%
5ns
Ω
GND
ALL INPUT PULSES
90%
90%
10%
≤
ns
5
C185–5
3
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