CYPRESS CY7C182 User Manual
查询CY7C182-25PC供应商
CY7C182
8Kx9 Static RAM
Features
• High speed
= 25 ns
—t
AA
• x9 organizat ion is i deal f o r cache m emory appli cation s
• CMOS for optimum speed/power
• Low active power
—770 mW
• Low st andby p ow er
—195 mW
• TTL-compatible inputs and outputs
• Automat ic power-down when desel ected
• Easy memory expansion with CE
, CE2, OE options
1
Functional Description
The CY7C182 is a high-speed CMOS static RAM organized
as 8,192 by 9 bit s and it is man ufact ured using Cypr ess’ s highperformance CMO S technolog y . Access times as f ast as 25 ns
are available with maximum power consumption of only 770
mW.
Logic Block Diagram
The CY7C182, which is oriented toward cache mem ory appl ications, features fully static operation requiring no external
clocks or timing strobes. The automatic power-down feature
reduces the power consumption by more than 70% when the
circuit is deselected. Easy memory expansion is provided by
an active-LOW Chip Enable (CE
able (CE
state drivers.
), an active-LOW Output Enable (OE), and three-
2
An active-LOW Write Enable signal (WE
ing/reading operation of the memory. When CE
), an active HIGH Chip En-
1
) controls the writ-
and WE in-
1
puts are both LOW, data on the nine data input/output pins
(I/O
through I/O8) is written into the memory location ad-
0
dressed by the address present on the address pins (A
through A12). Reading the d evice is a ccompli shed by sel ecting
the devic e an d enab ling the output s , (CE
and CE
active HIGH), while (WE) remains inactive or HIGH.
2
and OE active L OW
1
Under these co nditions , the contents of the location addressed
by the inf ormation on addre ss pins is present on th e nine data
input/output pins.
The input/out put pins rem ain in a high- impedance s tate unless
the chip is selected, outputs are enabled, and write enable
(WE
) is HIGH.
A die coat is used to insure alpha immunity.
PinConfiguration
DIP/SOJ
Top View
0
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
CE
A
3
A
2
A
1
OE
A
0
CE
I/O
I/O
I/O
I/O
I/O
C182–2
2
1
8
7
6
5
4
CE
CE
WE
OE
A
1
4
A
2
A
A
A
I/O
I/O
I/O
I/O
GND
5
A
3
6
A
4
7
A
5
8
A
6
9
7
10
8
11
9
12
10
0
11
1
12
2
13
3
14
I/O
0
INPUT BUFFER
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
1
2
ROW DECODER
256 x 32 x 9
ARRAY
COLUMN
DECODER
0
9
10
A
A
A
A11A
SENSE AMPS
POWER
DOWN
12
C182–1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
2
3
4
5
6
7
8
Selectio n Gu ide
7C182-25 7C182-35 7C182-45
Maximum Access Time (ns) 25 35 45
Maximum Operating Curr ent (mA) 140 140 140
Maximum Standby Current (mA) 35 35 35
Cypress Semiconductor Corporation
• 3901 North First Street • San Jose • CA 95134 • 408-943-2600
October 4, 1999
CY7C182
Maximum Ratings
(Abov e which the useful life m ay be impaired. For user guidelines, not tested.)
Storage Temperature .....................................−65
Ambient Temperature with
Po wer Applied..................................................−55
[1]
Supply Voltage to Ground Potential
DC Voltage Applied to Outputs
in High Z State
DC Input Voltage
[1]
.................................................−0.5V to +7.0V
[1]
..............................................−0.5V to +7.0V
Electrical Characteristics
..............−0.5V to +7.0V
Over the Operati ng Range
°
C to +150°C
°
C to +125°C
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage .......... ......................... ....... >2001V
(per MIL-STD-883, Method 3015.2)
Latch-Up Current............. ........................ .. ............. >200 mA
Operating Range
Range
Commercial 0°C to + 70°C 5V ± 10%
Parameter Description Test Conditions
V
V
V
V
I
I
I
I
OH
OL
IH
IL
IX
OZ
OS
CC
Output H IGH Voltage VCC Min., IOH = −4.0 mA. 2.4 V
Output LOW Voltage VCC Min., IOL = 8.0 mA 0.4 V
Input HIG H Voltage 2.2 V
Input LOW Voltage
[1]
Input Load Current GND < VIN < VCC,
Output Leakage Current V
Output Short Circuit
[2]
Current
VCC Operating Circuit
Current
Auto matic Power-Down
Current — TTL Inputs
Auto matic Power-Down
Current — CMOS Inputs
GND < V
Output Disabled
= Max., V
CC
V
= Max., V
CC
VCC Max., Output Current = 0 mA,
f = Max., V
Max VCC, CE1 > VIH, CE2 < VIL,
V
> VIH or VIN < VIL, f = f
IN
Max VCC, CE1 > VCC − 0.3V, CE2 < 0.3V,
V
> VCC − 0.3V or VIN < 0.3V, f = 0
IN
< VCC,
OUT
= GND
OUT
= GND
OUT
= VCC or GND
IN
MAX
Ambient
Temperature
7C182-25, 35, 45
Min. Max. Unit
−0.5
−10
−10
V
CC
CC
0.8 V
+10
+10
−300
mA
140 mA
35 mA
20 mA
V
µA
µA
Capacitance
[3]
Parameter Description Test Conditions Max. Unit
C
OUT
C
IN
Note:
1. V
(min.) = −3.0V for pulse durations of less than 20 ns.
IL
2. Duration of the short circuit should not exceed 30 seconds. Not more than one output should be shorted at one time.
3. Tested initially and after any design or process changes that may affect these parameters.
Output Capacitance TA = 25°C, f = 1 MHz,
V
= 5.0V
Input Capacitance 10 pF
CC
AC Test Loads and Waveforms
R1 481
5V
OUTPUT
INCLUDING
30pF
JIG AND
SCOPE
Ω
R2
255
OUTPUT
Ω
5V
INCLUDING
JIG AND
(a) (b)
Equivalent to: THÉ VENIN EQUIVALENT
167
OUTPUT 1.73V
Ω
SCOPE
5pF
R1 481
Ω
R2
255
C182–3
3.0V
Ω
GND
10%
<5ns
2
10 pF
ALL INPUT PULSES
90%
90%
10%
<5ns
C182–4
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