Cypress CY7C1019D User Manual
CY7C1019D
1-Mbit (128K x 8) Static RAM
Features
• Pin- and function-compatible with CY7C1019B
• High speed
= 10 ns
—t
AA
• Low active power
= 80 mA @ 10 ns
—I
CC
• Low CMOS standby power
—I
= 3 mA
SB2
• 2.0V Data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Center power/ground pinout
• Easy memory expansion with CE
and OE options
• Functionally equivalent to CY7C1019B
• Available in Pb-free 32-pin 400-Mil wide Molded SOJ and
32-pin TSOP II packages
Logic Block Diagram
Functional Description
[1]
The CY7C1019D is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE
active LOW Output Enable (OE
), and tri-state drivers. This
), an
device has an automatic power-down feature that significantly
reduces power consumption when deselected. The eight input
and output pins (IO
through IO7) are placed in a
0
high-impedance state when:
• Deselected (CE HIGH)
• Outputs are disabled (OE
• When the write operation is active (CE
Write to the device by taking Chip Enable (CE
Enable (WE
) inputs LOW. Data on the eight IO pins (IO
HIGH)
LOW, an d WE LOW).
) and Write
through IO7) is then written into the location specified on the
address pins (A
through A16).
0
Read from the device by taking Chi p En ab l e (CE) and Output
Enable (OE
) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins appears on the IO pins.
0
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
7
8
ROW DECODER
A
A
CE
WE
OE
Note
1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.
128K x 8
ARRAY
COLUMN DECODER
9
12
10
A
A
14
11
A
A13A
A
A15A
SENSE AMPS
POWER
DOWN
16
IO
0
IO
1
IO
2
IO
3
IO
4
IO
5
IO
6
IO
7
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05464 Rev. *E Revised February 22, 2007
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Pin Configuration
CY7C1019D
SOJ/TSOPII
Top View
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
A
A
A
OE
IO
IO
V
V
IO
IO
A
A
A
A
A
16
15
14
13
7
6
SS
CC
5
4
12
11
10
9
8
IO
IO
V
V
IO
IO
WE
A
A
A
A
CE
CC
SS
A
A
A
A
1
0
1
2
3
2
4
3
5
6
0
7
1
8
9
10
2
3
11
12
4
13
5
14
6
15
16
7
Selection Guide
–10 (Industrial) Unit
Maximum Access Time 10 ns
Maximum Operating Current 80 mA
Maximum Standby Current 3 mA
Document #: 38-05464 Rev. *E Page 2 of 11
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CY7C1019D
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of
the device. These user guidelines are not tested.
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on V
DC Voltage Applied to Outputs
in High-Z State
DC Input Voltage
to Relative GND
CC
[2]
...................................–0.5V to VCC + 0.5V
[2]
................................–0.5V to VCC + 0.5V
[2]
... –0.5V to +6.0V
Current into Outputs (LOW) ................................... ..... 20 mA
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current ............................. ... ... .................> 200 mA
Operating Range
Range
Industrial –40°C to +85°C 5V ± 0.5V 10 ns
Electrical Characteristics (Over the Operating Range)
Parameter Description Test Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Output HIGH Voltage IOH = –4.0 mA 2.4 V
Output LOW Voltage IOL = 8.0 mA 0.4 V
Input HIGH Voltage 2.2 V
Input LOW Voltage
Input Leakage Current GND < VI < V
[2]
CC
Output Leakage Current GND < VI < VCC, Output Disabled –1 +1 µA
VCC Operating Supply Current VCC = Max,
I
OUT
f = f
max
= 0 mA,
= 1/t
RC
Ambient
Temperature
V
CC
–10 (Industrial)
Min Max
CC
–0.5 0.8 V
–1 +1 µA
100 MHz 80 mA
83 MHz 72 mA
66 MHz 58 mA
Speed
Unit
+ 0.5 V
I
SB1
I
SB2
Note
2. V
(min) = –2.0V and VIH(max) = VCC + 1V for pulse durations of less than 5 ns.
IL
Automatic CE Power-Down
Current—TTL Inputs
Automatic CE Power-Down
Current—CMOS Inputs
Max VCC, CE > V
VIN > VIH or VIN < VIL, f = f
IH
max
Max VCC, CE > VCC – 0.3V,
V
> VCC – 0.3V, or VIN < 0.3V, f = 0
IN
40 MHz 37 mA
10 mA
3mA
Document #: 38-05464 Rev. *E Page 3 of 11
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CY7C1019D
Capacitance
[3]
Parameter Description Test Conditions Max Unit
C
IN
C
OUT
Thermal Resistance
Parameter Description T e st Con dit ions
Θ
JA
Θ
JC
AC Test Loads and Waveforms
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
Input Capacitance TA = 25°C, f = 1 MHz, VCC = 5.0V 6 pF
Output Capacita nce 8 pF
[3]
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
Still Air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
400-Mil
Wide SOJ
56.29 62.22 °C/W
38.14 21.43 °C/W
TSOP II Unit
(Junction to Case)
[4]
ALL INPUT PULSES
90%
10%
(b)
90%
10%
Fall Time: ≤ 3 ns
OUTPUT
Z = 50
Ω
50Ω
1.5V
30 pF*
3.0V
GND
Rise Time: ≤ 3 ns
(a)
High-Z characteristics:
5V
OUTPUT
INCLUDING
JIG AND
SCOPE
5 pF
R1 480Ω
R2
255Ω
(c)
Notes
3. Tested initially and after any design or process changes that may affect these parameters.
4. AC characteristics (except High-Z) are tested using the load conditions shown in Figure (a). High-Z characteristics are test ed for all speeds using the test load
shown in Figure (c).
Document #: 38-05464 Rev. *E Page 4 of 11
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