Cypress CY62167DV18 User Manual
CY62167DV18 MoBL
®
16-Mbit (1M x 16) Static RAM
Features
• Very high speed: 55 ns
• Wide voltage range: 1.65V–1.95V
• Ultra low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 15 mA @ f = f
max
• Ultra low standby power
• Easy memory expansion with CE
, CE2, and OE features
1
• Automatic power down when deselected
• CMOS for optimum speed and power
• Available in Pb-free 48-ball VFBGA package
Functional Description
[1]
The CY62167DV18 is a high performance CMOS static RAM
organized as 1M words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life™ (MoBL
®
) in
portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption by 99% when addresses are not
toggling. Placing the device into standby mode reduces power
Logic Block Diagram
consumption by more than 99% when deselected (CE
or CE
LOW or both BHE and BLE are HIGH). The input and
2
output pins (IO
state when:
• Deselected (CE
• Outputs are disabled (OE
through IO15) are placed in a high impedance
0
HIGH or CE2 LOW)
1
HIGH)
HIGH
1
• Both Byte High Enable (BHE) and Byte Low Enable (BLE)
are disabled (BHE
• Write operation is active (CE
LOW)
To write to the device, take Chip Enables (CE
HIGH) and Write Enable (WE) input LOW. If BLE is LOW, then
data from IO pins (IO
specified on the address pins (A
then data from IO pins (IO
location specified on the address pins (A
To read from the device, take Chip Enables (CE
CE
HIGH) and OE LOW while forcing the WE HIGH. If BLE
2
is LOW, then data from the memory location specified by the
address pins appear on IO
from memory appears on IO
page 9 for a complete description of read and write modes.
, BLE HIGH)
LOW, CE2 HIGH and WE
1
LOW and CE
1
through IO7) is written into the location
0
through A19). If BHE is LOW
0
through IO15) is written into the
8
to IO7. If BHE is LOW, then data
0
to IO15. See the “Truth Table” on
8
through A19).
0
LOW and
1
2
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
A
A
A
A
A
A
6
5
4
3
2
1
0
ROW DECODER
1M × 16
RAM Array
SENSE AMPS
IO
–IO
0
IO8–IO
7
15
COLUMN DECODER
BYTE
BHE
11
A
A12A13A14A
15
16
17
18
19
A
A
A
A
Power Down
Circuit
Note
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at http://www.cypress.com.
BHE
BLE
CE
CE
2
1
WE
OE
BLE
CE
CE
2
1
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05326 Rev. *C Revised April 25, 2007
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CY62167DV18 MoBL
Product Portfolio
Power Dissipation
V
Product
CC
Min Typ
[2]
Max Typ
Speed
(ns)
Range (V)
CY62167DV18LL 1.65 1.8 1.95 55 1.5 5 15 30 2.5 20
Operating I
CC
(mA)
f = 1MHz f = f
[2]
Max Typ
[2]
max
Max Typ
Standby I
[2]
SB2
Max
®
(µA)
Pin Configuration
[3]
BLE
IO
IO
V
V
CC
IO
IO
A
SS
18
OE
BHE
8
IO
10
9
IO
11
IO
12
IO
13
14
A
15
19
A
8
48-Ball VFBGA
Top Vi e w
41
326
A
0
A
3
A
5
A
17
DNU
A
14
A
12
A
9
5
A
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
CE
IO
IO
IO
IO
WE
A
CE
2
IO
1
IO
1
V
3
V
4
IO
5
IO
DNU
11
CC
SS
A
2
B
0
C
2
D
E
F
6
G
7
H
Notes
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
3. DNU pins must be left floating or tied to V
to ensure proper operation.
SS
CC
= V
CC(typ)
, TA = 25°C.
Document #: 38-05326 Rev. *C Page 2 of 11
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CY62167DV18 MoBL
®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of
the device. These user guidelines are not tested.
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential. –0.2V to V
DC Voltage Applied to Outputs
in High-Z State
[4, 5]
........................... –0.2V to V
CCmax
CCmax
+ 0.2V
+ 0.2V
DC Input Voltage
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch up Current.....................................................> 200 mA
Operating Range
Range
Industrial –40°C to +85°C 1.65V to 1.95V
DC Electrical Characteristics (Over the Operating Range)
Parameter Description Test Conditions
V
V
V
V
I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH
OL
IH
IL
Output HIGH Voltage IOH = −0.1 mA 1.4 V
Output LOW Voltage IOL = 0.1 mA 0.2 V
Input HIGH Voltage 1.4 VCC + 0.2 V
Input LOW Voltage –0.2 0.4 V
Input Leakage Current GND < VI < V
CC
Output Leakage Current GND < VO < VCC, Output Disabled –1 +1 µA
VCC Operating Supply Current f = f
f = 1 MHz 1.5 5
Automatic CE Power down
Current − CMOS Inputs
CE1 > VCC − 0.2V, CE2 < 0.2V,
V
f = f
f = 0 (OE
Automatic CE Power down
Current − CMOS Inputs
CE1 > VCC − 0.2V, CE2 < 0.2V,
V
f = 0, V
= 1/t
MAX
> VCC − 0.2V, VIN < 0.2V,
IN
MAX
RCVCC
(Address and Data Only),
= 1.95V, I
CMOS level
, WE, BHE and BLE)
> VCC − 0.2V or VIN < 0.2V,
IN
=1.95V
CC
[4, 5]
........................–0.2V to V
Ambient
Tempe rature
–1 +1 µA
= 0 mA,
OUT
+ 0.2V
CCmax
[6]
V
CC
55 ns
[2]
Max
UnitMin Typ
15 30 mA
2.5 20 µA
2.5 20 µA
Capacitance
[7]
Parameter Description Test Conditions Max Unit
C
IN
C
OUT
Notes
4. V
IL(min)
5. V
IH(max)
6. Full device AC operation requires linear V
7. Tested initially and after any design or process changes that may affect these parameters.
Input Capacitance TA = 25°C, f = 1 MHz, VCC = V
Output Capacitance 8 pF
= –2.0V for pulse durations less than 20 ns.
= VCC + 0.75V for pulse durations less than 20 ns.
ramp from 0 to V
CC
and VCC must be stable at V
CC(min)
CC(typ)
CC(min)
for 500 µs.
6pF
Document #: 38-05326 Rev. *C Page 3 of 11
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CY62167DV18 MoBL
®
Thermal Resistance
[7]
Parameter Description Test Conditions VFBGA Unit
Θ
JA
Θ
JC
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Still Air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
55 °C/W
16 °C/W
AC Test Loads and Waveforms
V
CC
OUTPUT
INCLUDING
JIG AND
R1
VCC
30 pF
SCOPE
R2
Rise Time = 1 V/ns
Equivalent to: THE VENIN EQUIVALENT
GND
OUTPUT V
Parameters 1.8V Unit
R1 13500 Ω
R2 10800 Ω
R
TH
V
TH
6000 Ω
0.80 V
ALL INPUT PULSES
10%
R
TH
90%
90%
10%
Fall Time = 1 V/ns
Data Retention Characteristics (Over the Operating Range)
Parameter Description Conditions Min Typ
V
DR
I
CCDR
[7]
t
CDR
[8]
t
R
Data Retention Waveform
CE
1
BHE,BLE
Notes
8. Full device operation requires linear V
9. BHE
VCC for Data Retention 1.0 1.95 V
V
Data Retention Current
= 1.0V,
CC
V
> VCC – 0.2V or VIN < 0.2V
IN
CE
> VCC – 0.2V, CE2 < 0.2V,
1
Chip Deselect to Data Retention Time 0 ns
Operation Recovery Time t
[9]
RC
DATA RETENTION MODE
V
or
CC
VCC, min
t
CDR
VDR
>
1.0V
VCC, min
t
R
or
CE
2
ramp from V
.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling the chip enable signals or by disabling both BHE and BLE.
CC
DR
to V
> 100 µs or stable at V
CC(min)
CC(min)
> 100 µs.
[2]
Max Unit
10 µA
ns
Document #: 38-05326 Rev. *C Page 4 of 11
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