Cypress CY62158E User Manual

CY62158E MoBL
®
8-Mbit (1M x 8) Static RAM

Features

A
0
IO
0
IO
7
IO
1
IO
2
IO
3
IO
4
IO
5
IO
6
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
SENSE AMPS
POWER DOWN
WE
OE
A
13
A
14
A15A
16
ROW DECODER
COLUMN DECODER
1024K x 8
ARRAY
DATA IN DRIVERS
A
10
A
11
A
17
CE
1
CE
2
A
12
A18A
19
Logic Block Diagram
Very high speed: 45 nsWide voltage range: 4.5V – 5.5V
Ultra low active powerTypical active current:1.8 mA @ f = 1 MHzTypical active current: 18 mA @ f = f
Ultra low standby powerTypical standby current: 2 μA
Maximum standby current: 8 μA
Easy memory expansion with CE
Automatic power down when deselected
CMOS for optimum speed and power
Offered in Pb-free 44-Pin TSOP II package
max
, CE2 and OE features
1

Functional Description

The CY62158E MoBL® is a high performance CMOS static RAM organized as 1024K words by 8 bits. This device features advanced circuit design to provide ultra low active current. T his
is ideal for providing More Battery Life™ (MoBL
®
) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption. Placing the device into standby mode reduces power consumption significantly when deselected (CE CE
LOW).
2
To write to the device, take Chip Enables (CE HIGH) and Write Enable (WE) input LOW. Data on the eight IO pins (IO on the address pins (A
through IO7) is then written into the location specified
0
through A19).
0
To read from the device, take Chip Enables (CE HIGH) and OE LOW while forcing the WE HIGH. Under these
1
1
HIGH or
1
LOW and CE
LOW and CE
conditions, the contents of the memory location specified by the address pins appear on the IO pins.
The eight input and output pins (IO a high impedance state when the device is deselected (CE
through IO7) are placed in
0
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or a write operation is in progress (CE LOW). See the Truth Table on page 8 for a complete description
LOW and CE2 HIGH and WE
1
of read and write modes. For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.
2
2
1
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document #: 38-05684 Rev. *D Revised June 16, 2008
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CY62158E MoBL
®

Pin Configuration

1 2 3 4 5 6 7 8 9
11
14
31
32
36 35 34
33
37
40 39 38
12 13
41
44 43 42
16
15
29
30
A
5
18
17
20
19
23
28
25 24
22
21
27 26
A
6
A
7
A
4
A
3
A
2
A
1
A
0
A
17
A
18
A
10
A
11
A
12
A
13
A
15
A
16
A
14
OE CE
2
A
8
CE
1
WE
NC NC
IO
0
IO
1
IO
2
IO
3
NC NC
NC
NC
IO
4
IO
5
IO
6
IO
7
NC
NC
V
CC
V
CC
V
SS
V
SS
A
9
10
A
19
Notes
1. NC pins are not connected on the die.
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, TA = 25°C.

Product Portfolio

Figure 1. 44-Pin TSOP II (Top View)
[1]
Product VCC Range (V)
Speed
(ns)
f = 1 MHz f = f
Min Typ
[2]
Max Typ
[2]
CY62158ELL 4.5 5.0 5.5 45 1.8 3 18 25 2 8
Document #: 38-05684 Rev. *D Page 2 of 10
Operating I
Max Typ
Power Dissipation
(mA)
CC
max
[2]
Max Typ
Standby I
[2]
SB2
(μA)
Max
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CY62158E MoBL
®

Maximum Ratings

Notes
3. V
IL
(min) = –2.0V for pulse durations less than 20 ns.
4. V
IH
(max) = VCC + 0.75V for pulse durations less than 20 ns.
5. Full Device AC operation assumes a 100 μs ramp time from 0 to V
CC
(min) and 200 μs wait time after VCC stabilization.
6. Only chip enables (CE
1
and CE2), must be tied to CMOS levels to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
Exceeding the maximum ratings may impair the useful life of the device. These user guidelines are not tested.
Storage Temperature.................................. –65°C to +150°C
Ambient Temperature with
Power Applied ............................................–55°C to +125°C
Supply Voltage to Ground Potential–0.5V to V DC Voltage Applied to Outputs
in High-Z State
[3, 4]
........................–0.5V to V
CC(max)
CC(max)
+ 0.5V
+ 0.5V
DC Input Voltage
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage............................................>2001V
(MIL-STD-883, Method 3015)
Latch up Current......................................................>200 mA

Operating Range

CY62158ELL Industrial –40°C to +85°C 4.5V – 5.5V

Electrical Characteristics

Over the Operating Range
Parameter Description Test Conditions
V V V V I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH OL IH IIL
[6]
Output HIGH Voltage IOH = –1 mA 2.4 V Output LOW Voltage IOL = 2.1 mA 0.4 V Input HIGH Voltage V Input LOW Voltage V Input Leakage Current GND < VI < V
= 4.5V to 5.5V 2.2 V
CC
= 4.5V to 5.5V –0.5 0.8 V
CC
CC
Output Leakage Current GND < VO < VCC, Output Disabled –1 +1 μA VCC Operating Supply
Current
Automatic CE Power down Current — CMOS Inputs
Automatic CE Power-down Current — CMOS Inputs
f = f f = 1 MHz 1.8 3 mA
MAX
= 1/t
RC
VCC = V I
OUT
CMOS levels
CE1 > VCC− 0.2V, CE2 < 0.2V V
> VCC – 0.2V, VIN < 0.2V)
IN
f = f f = 0 (OE
(Address and Data Only),
MAX
, and WE), V
CC
= V
CE1 > VCC – 0.2V or CE2 < 0.2V,
> VCC – 0.2V or VIN < 0.2V,
V
IN
f = 0, V
CC
= V
CCmax
[3, 4]
.....................–0.5V to V
Device Range
CCmax
= 0 mA
CCmax
+ 0.5V
CC(max)
Ambient
Temperature
[5]
V
CC
-45
[2]
Max
CC
UnitMin Typ
+ 0.5V V
–1 +1 μA
18 25 mA
28μA
28μA

Capacitance

Tested initially and after any design or process changes that may affect these parameters.
Parameter Description Test Conditions Max Unit
C
IN
C
OUT
Input Capacitance TA = 25°C, f = 1 MHz, Output Capacitance 10 pF

Thermal Resistance

Tested initially and after any design or process changes that may affect these parameters.
Parameter Description Test Conditions TSOP II Unit
Θ
Θ
Document #: 38-05684 Rev. *D Page 3 of 10
Thermal Resistance
JA
(Junction to Ambient) Thermal Resistance
JC
(Junction to Case)
= V
V
CC
CC(typ)
Still Air, soldered on a 3 × 4.5 inch, two-layer printed circuit board
10 pF
75.13 °C/W
8.95 °C/W
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