Cypress CY62157EV18 User Manual
CY62157EV18 MoBL
®
8-Mbit (512K x 16) Static RAM
Features
• Very high speed: 55 ns
• Wide voltage range: 1.65V–2.25V
• Pin Compatible with CY62157DV18 and CY62157DV20
• Ultra low standby power
— Typical Standby current: 2 µA
— Maximum Standby current: 8 µA
• Ultra low active power
— Typical active current: 1.8 mA @ f = 1 MHz
• Easy memory expansion with CE
• Automatic power down when deselected
• CMOS for optimum speed and power
• Available in Pb-free 48-ball VFBGA package
Functional Description
The CY62157EV18 is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life™ (MoBL
portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption when addresses are not toggling.
The device can also be put into standby mode when
, CE2 and OE features
1
[1]
®
) in
deselected (CE
HIGH). The input and output pins (IO
HIGH or CE2 LOW or both BHE and BLE are
1
through IO15) are
0
placed in a high impedance state when:
• Deselected (CE1 HIGH or CE2 LOW)
• Outputs are disabled (OE
HIGH)
• Both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH) or
• Write operation is active (CE
LOW, CE2 HIGH and WE
1
LOW).
Write to the device by taking Chip Enables (CE
LOW and CE
1
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE
) is LOW, then data from IO pins (IO0 through IO7), is
written into the location specified on the address pins (A
through A18). If Byte High Enable (BHE) is LOW, then data
from IO pins (IO8 through IO15) is written into the location
specified on the address pins (A
Read from the device by taking Chip Enables (CE
CE
HIGH) and Output Enable (OE) LOW while forcing the
2
through A18).
0
LOW and
1
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins appear on IO
then data from memory appears on IO
to IO7. If Byte High Enable (BHE) is LOW,
0
to IO15. See the “Truth
8
Table” on page 9 for a complete description of read and write
modes.
2
0
Product Portfolio
Power Dissipation
Product
Range (V)
V
CC
Speed
(ns)
Operating I
f = 1MHz
Min
Typ
[2]
Max
Typ
[2]
Max
CY62157EV18 1.65 1.8 2.25 55 1.8 3 18 25 2 8
Notes
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” located at http://www.cypress.com.
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05490 Rev. *D Revised March 30, 2007
CC
Typ
, (mA)
f = f
[2]
CC
= V
max
Max
CC(typ)
Standby, I
Typ
, TA = 25°C.
(µA)
SB2
[2]
Max
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Logic Block Diagram
POWER DOWN
CIRCUIT
CY62157EV18 MoBL
®
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
512K x 16
RAM Array
IO
–IO
0
7
SENSE AMPS
IO8–IO
15
COLUMN DECODER
BHE
11A12A13
A
14
A
BHE
BLE
15
A
18
16
17
A
A
A
CE
2
CE
1
WE
OE
BLE
CE
CE
2
1
Pin Configuration
[3]
48-ball VFBGA
Top View
41
BLE
IO
IO
V
SS
V
CC
IO
IO
A
326
A
OE
BHE
8
IO
9
IO
IO
IO
14
NC
15
18
0
A
3
A
5
10
A
11
17
NC
12
A
14
13
A
12
A
A
9
8
5
A
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
CE
IO
IO
IO
IO
WE
A
CE
2
IO
1
IO
1
V
3
V
4
IO
5
IO
NC
11
CC
SS
A
2
B
0
C
2
D
E
F
6
G
7
H
Note
3. NC pins are not connected on the die.
Document #: 38-05490 Rev. *D Page 2 of 12
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CY62157EV18 MoBL
®
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ................................–65°C to + 150°C
Ambient Temperature with
Power Applied ...........................................–55°C to + 125°C
Supply Voltage to Ground
Potential...............................–0.2V to 2.45V (V
CCmax
+ 0.2V)
DC Input Voltage
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage ......................................... > 2001V
(in accordance with MIL-STD-883, Method 3015)
Latch-up Current ................................................... > 200 mA
Operating Range
DC Voltage Applied to Outputs
in High-Z State
[4, 5]
..............–0.2V to 2.45V (V
CCmax
+ 0.2V)
CY62157EV18LL Industrial –40°C to +85°C 1.65V to 2.25V
Electrical Characteristics (Over the Operating Range)
Parameter Description Test Conditions
V
V
V
V
I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH
OL
IH
IL
[7]
Output HIGH Voltage IOH = –0.1 mA V
Output LOW Voltage IOL = 0.1 mA V
Input HIGH Voltage V
Input LOW Voltage V
Input Leakage
= 1.65V to 2.25V 1.4 V
CC
= 1.65V to 2.25V –0.2 0.4 V
CC
GND < VI < V
CC
Current
Output Leakage
GND < VO < VCC, Output Disabled –1 +1 µA
Current
VCC Operating Supply
Current
Automatic CEPower Down
Current–CMOS Inputs
Automatic CE Power Down
Current–CMOS Inputs
f = f
= 1/t
max
RC
f = 1 MHz 1.8 3 mA
CE1 > VCC−0.2V or CE2 < 0.2V
> V
V
IN
f = f
max
f = 0 (OE
– 0.2V, V
CC
(Address and Data Only),
, WE, BHE and BLE),
< 0.2V)
IN
CE1 > VCC – 0.2V or CE2 < 0.2V,
> VCC – 0.2V or VIN < 0.2V,
V
IN
f = 0, V
CC
= V
CC(max)
.
[4, 5]
......... –0.2V to 2.45V (V
Device Range
Ambient
Tem per atu re
55 ns
Min
= 1.65V 1.4 V
CC
= 1.65V 0.2 V
CC
Typ
[2]
Max
CC
–1 +1 µA
VCC = V
I
= 0 mA
OUT
CC(max)
18 25 mA
CMOS levels
28µA
= V
V
CC
CC(max)
.
28µA
+ 0.2V)
CCmax
[6]
V
CC
Unit
+ 0.2V V
Capacitance
[8]
Parameter Description Test Conditions Max Unit
C
C
IN
OUT
Input Capacitance TA = 25°C, f = 1 MHz, VCC = V
CC(typ)
10 pF
Output Capacitance 10 pF
Notes
4. V
5. V
6. Full Device AC operation assumes a 100 µs ramp time from 0 to V
7. Only chip enable (CE
8. Tested initially and after any design or process changes that may affect these parameters.
= –2.0V for pulse durations less than 20 ns.
IL(min)
= VCC + 0.5V for pulse durations less than 20 ns.
IH(max)
) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the I
(min) and 200 µs wait time after VCC stabilization.
CC
spec. Other inputs can be left floating.
SB2
Document #: 38-05490 Rev. *D Page 3 of 12
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CY62157EV18 MoBL
®
Thermal Resistance
[8]
Parameter Description Test Conditions BGA Unit
Θ
JA
Θ
JC
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Still air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
72 °C/W
8.86 °C/W
AC Test Loads and Waveforms
V
CC
OUTPUT
INCLUDING
R1
3V
10%
30 pF
R2
Rise Time = 1 V/ns
GND
JIG AND
SCOPE
Equivalent to: THEVENIN EQUIVALENT
R
TH
OUTPUT V
Parameters Value Unit
R1 13500 Ω
R2 10800 Ω
R
TH
V
TH
6000 Ω
0.80 V
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Data Retention Characteristics (Over the Operating Range)
Parameter Description Conditions Min
V
DR
I
CCDR
[8]
t
CDR
[9]
t
R
Data Retention Waveform
BHE.BLE
Notes
9. Full device operation requires linear V
10. BHE
VCC for Data Retention 1.0 V
Data Retention Current VCC= VDR, CE1 > VCC – 0.2V,
< 0.2V,VIN > VCC – 0.2V or VIN < 0.2V
CE
2
Chip Deselect to Data Retention Time 0 ns
Operation Recovery Time t
[10]
DATA RETENTION MODE
V
V
CC
CE1 or
or
CE
2
.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling chip enable signals or by disabling both BHE and BLE.
CC
CC(min)
t
CDR
ramp from V
DR
to V
> 100 µs or stable at V
CC(min)
VDR
>
1.0V
CC(min)
> 100 µs.
V
CC(min)
[2]
Typ
Max Unit
13µA
RC
t
R
ns
Document #: 38-05490 Rev. *D Page 4 of 12
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