Cypress CY62157E User Manual
CY62157E MoBL
®
8-Mbit (512K x 16) Static RAM
Features
• Very high speed: 45 ns
• Wide voltage range: 4.5V–5.5V
• Ultra-low standby power
—Typical Standby current: 2 µA
—Maximum Standby current: 8 µA (Industrial)
• Ultra-low active power
— Typical active current: 1.8 mA @ f = 1 MHz
• Ultra-low standby power
• Easy memory expansion with CE
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free 44-pin TSOP II and 48-ball VFBGA
package
Functional Description
[1]
The CY62157E is a high-performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL
portable applications such as cellular telephones. The device
, CE2 and OE features
1
®
) in
also has an automatic power-down feature that significantly
reduces power consumption when addresses are not toggling.
The device can also be put into standby mode when
deselected (CE
HIGH). The input/output pins (IO
a high-impedance state when: deselected (CE
LOW), outputs are disabled (OE HIGH), both Byte High
Enable and Byte Low Enable are disabled (BHE
or during a write operation (CE
LOW).
HIGH or CE2 LOW or both BHE and BLE are
1
through IO15) are placed in
0
HIGH or CE
1
, BLE HIGH),
LOW, CE2 HIGH and WE
1
Writing to the device is accomplished by taking Chip Enable
LOW and CE2 HIGH) and Write Enable (WE) input LOW.
(CE
1
If Byte Low Enable (BLE
) is LOW, then data from IO pins (IO
through IO7), is written into the location specified on the
address pins (A
LOW, then data from IO pins (IO
the location specified on the address pins (A
through A18). If Byte High Enable (BHE) is
0
through IO15) is written into
8
through A18).
0
Reading from the device is accomplished by taking Chip
Enable (CE
LOW while forcing the Write Enable (WE
Enable (BLE
specified by the address pins will appear on IO
High Enable (BHE
on IO
8
for a complete description of read and write modes.
LOW and CE2 HIGH) and Output Enable (OE)
1
) HIGH. If Byte Low
) is LOW, then data from the memory location
to IO7. If Byte
) is LOW, then data from memory will appear
0
to IO15. See the truth table at the back of this data sheet
2
0
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
ROW DECODER
512K x 16
RAM Array
COLUMN DECODER
13
15
A11A12A
14
A
A
POWER-DOWN
CIRCUIT
A
IO
–IO
0
7
BHE
BLE
IO8–IO
15
BHE
WE
OE
BLE
CE
CE
2
1
SENSE AMPS
18
16
17
A
A
CE
CE
2
1
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05695 Rev. *C Revised November 21, 2006
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CY62157E MoBL
®
Pin Configuration
[2, 3]
A
A
A
A
A
CE
IO
IO
IO
IO
V
CC
V
SS
IO
IO
IO
IO
WE
A
A
A
A
A
18
17
16
15
14
4
3
2
1
0
0
1
2
3
4
5
6
7
TSOP II
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
5
A
6
A
7
OE
BHE
BLE
IO
15
IO
14
IO
13
IO
12
V
SS
V
CC
IO
11
IO
10
IO
9
IO
8
A
8
A
9
A
10
A
11
A
12
A
13
1
BLE
IO
IO
V
SS
V
CC
IO
IO
A
VFBGA
Top View
2
OE
BHE
8
IO
10
9
IO
11
NC
IO
12
IO
13
14
NC
15
A
8
18
4
3
A
0
A
3
A
5
A
17
A
14
A
12
A
9
5
6
A
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
CE
IO
IO
IO
IO
WE
A
CE
2
2
IO
1
IO
1
Vcc
3
Vss
4
IO
5
IO
NC
11
A
B
0
C
2
D
E
F
6
G
7
H
Product Portfolio
Power Dissipation
Operating I
[4]
Max Typ
Product Range
V
Range (V)
CC
Min T yp
[4]
Max Typ
Speed
(ns)
CY62157E-45 Ind’l 4.5 5.0 5.5 45 1.8 3 18 25 2 8
CY62157E-55
Notes:
2. NC pins are not connected on the die.
3. The 44-pin TSOP II package has only one chip enable (CE
4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
5. Automotive product information is Preliminary.
[5]
Auto 4.5 5.0 5.5 55 1.8 4 18 35 2 30
) pin.
CC
, (mA)
[4]
= V
CC
max
Max Typ
, TA = 25°C.
CC(typ)
Standby, I
(µA)f = 1MHz f = f
[4]
SB2
Max
Document #: 38-05695 Rev. *C Page 2 of 12
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CY62157E MoBL
®
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................–65°C to + 150°C
Ambient Temperature with
Power Applied ...........................................–55°C to + 125°C
Supply Voltage to Ground
Potential .......................................................... –0.5V to 6.0V
DC Voltage Applied to Outputs
in High Z State
[6, 7]
...........................................–0.5V to 6.0V
Electrical Characteristics (Over the Operating Range)
Parameter Description Test Conditions
V
V
V
V
I
I
I
OH
OL
IH
IL
IX
OZ
CC
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Voltage
Input LOW
Voltage
Input Leakage
Current
Output Leakage
Current
VCC Operating
Supply
Current
I
SB1
Automatic CE
Power-Down
Current —
CMOS Inputs
I
SB2
Automatic CE
Power-Down
Current —
CMOS Inputs
Capacitance
[9]
IOH = –1 mA V
IOL = 2.1 mA V
V
= 4.5V to 5.5V 2.2 V
CC
V
= 4.5V to 5.5V –0.5 0.8 –0.5 0.8 V
CC
GND < VI < V
= 4.5V 2.4 2.4 V
CC
= 4.5V 0.4 0.4 V
CC
CC
GND < VO < VCC, Output Disabled – 1 +1 –1 +1 µA
f = f
= 1/tRCVCC = V
max
f = 1 MHz 1.8 3
CE
> V
1
CC
V
>
V
IN
CC
f = f
f = 0 (OE
V
CE
V
f = 0, V
(Address and Data Only),
max
= 3.60V
CC
> VCC – 0.2V or CE2 < 0.2V,
1
> VCC – 0.2V or VIN < 0.2V,
IN
CC
I
CMOS levels
− 0.2V, CE2 < 0.2V,
– 0.2V, V
, BHE, BLE and WE),
= 3.60V
OUT
= 0 mA
< 0.2V,
IN
CCmax
DC Input Voltage
[6, 7]
........................................–0.5V to 6.0V
Output Current into Outputs (LOW) ............................20 mA
Static Discharge Voltage ..........................................> 2001 V
(per MIL-STD-883, Method 3015)
Latch-Up Current ...................................................> 200 mA
Operating Range
Device Range
Temperature V
CY62157E Industrial –40°C to +85°C 4.5V to 5.5V
Automotive –40°C to +125°C
Ambient
45 ns (Industrial)
[4]
Max Min Typ
CC
+ 0.5 2.2 V
55 ns (Automotive)
[4]
Max
+ 0.5 V
CC
–1 +1 –1 +1 µA
18 25
18 35
1.8 4
28
28
2 30 µA
2 30 µA
CC
[8]
UnitMin Typ
mA
Parameter Description Test Conditions Max Unit
C
IN
C
OUT
Notes:
6. V
IL(min)
7. V
IH(max)
8. Full device AC operation assumes a 100 µs ramp time from 0 to V
9. Tested initially and after any design or process ch anges that may affect these parameters.
Input Capacitance TA = 25°C, f = 1 MHz, VCC = V
CC(typ)
10 pF
Output Capacitance 10 pF
= –2.0V for pulse durations less than 20 ns for I < 30 mA.
= V
+ 0.75V for pulse durations less than 20 ns.
CC
(min) and 200 µs wait time after V
CC
stabilization.
CC
Document #: 38-05695 Rev. *C Page 3 of 12
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CY62157E MoBL
®
Thermal Resistance
[9]
Parameter Description Test Conditions TSOP II VFBGA Unit
Θ
JA
Θ
JC
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Still Air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
77 72 °C/W
13 8.86 °C/W
AC Test Loads and Waveforms
V
CC
OUTPUT
INCLUDING
30 pF
JIG AND
SCOPE
R1
R2
3V
GND
10%
Rise Time = 1 V/ns
Equivalent to: THEVENIN EQUIVALENT
OUTPUT V
ALL INPUT PULSES
90%
R
TH
90%
10%
Fall Time = 1 V/ns
Parameters Values Unit
R1 1800 Ω
R2 990 Ω
R
TH
V
TH
639 Ω
1.77 V
Data Retention Characteristics (Over the Operating Range)
Parameter Description Conditions Min Typ
V
DR
I
CCDR
[9]
t
CDR
[10]
t
R
Data Retention Waveform
BHE
VCC for Data Retention 2 V
Data Retention Current
Chip Deselect to Data
=2V, CE1> VCC – 0.2V,
V
CC
< 0.2V, VIN > VCC – 0.2V or VIN < 0.2V
CE
2
Industrial 8 µA
Automotive 30
0ns
Retention Time
Operation Recovery Time t
[11]
DATA RETENTION MODE
V
V
CC
CE1or
.BLE
CC(min)
t
CDR
VDR> 2 V
V
CC(min)
RC
t
R
[4]
Max Unit
ns
CE
2
Notes:
10.Full device operation requires linear V
.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
11. BHE
ramp from V
CC
DR
to V
> 100 µs or stable at V
CC(min)
CC(min)
> 100 µs.
Document #: 38-05695 Rev. *C Page 4 of 12
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