Cypress CY62157CV33, CY62157CV30 User Manual
CY62157CV30/33
512K x 16 Static RAM
Features
• Temperature Ranges
— Automotive-A: –40°C to 85°C
— Automot ive-E: –40°C to 125°C
• Voltage range:
— CY62157CV30: 2.7V–3.3V
— CY62157CV33: 3.0V–3.6V
• Ultra-low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 5.5 mA @ f = f
• Low standby powe r
• Easy memory expansion with CE
1
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 48-ball FBGA
package
Functional Description
[1]
The CY62157CV30/33 are high-performance CMOS static
RAMs organized as 512K words by 16 bits. These devices
feature advanced circuit design to provide ultra-low active
current. This is ideal for providing More Battery Life™
(MoBL™) in portable applications such as cellular telephones.
The devices also have an automatic power-down feature that
max
, CE2 and OE features
significantly reduces power consumption by 80% when
addresses are not toggling. The device can also be put in to
standby mode reducing power consumption by more than 99%
when deselected (CE
BHE
are HIGH). The input/output pins (I/O0 through I/O15) are
HIGH or CE2 LOW or both BLE and
1
placed in a high-impedance state when: deselected (CE
HIGH or CE2 LOW), outputs are disabled (OE HIGH), both
Byte High Enable and Byte Low Enable are disabled (BHE
BLE
HIGH), or during a write operation (CE1 LOW and CE
HIGH and WE LOW).
Writing to the device is accomplished by taking Chip Enable 1
) and Write Enable (WE) inputs LOW and Chip Enable 2
(CE
1
(CE
) HIGH. If Byte Low Enable (BLE) is LOW, then data from
2
I/O pins (I/O
specified on the address pins (A
Enable (BHE
I/O
) is written into the location specified on the address pins
15
through A18).
(A
0
through I/O7), is written into the location
0
) is LOW, then data from I/O pins (I/O8 through
through A18). If Byte High
0
Reading from the device is accomplished by taking Chip
Enable 1 (CE
Enable 2 (CE
HIGH. If Byte Low Enable (BLE
) and Output Enable (OE) LOW and Chip
1
) HIGH while forcing the Write Enable (WE)
2
) is LOW, then data from the
memory location specified by the address pins will appear on
I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then da ta from
memory will appear on I/O
back of this data sheet for a complete description of read and
to I/O15. See the truth table at the
8
write modes.
The CY62157CV30/33 are available in a 48-ball FBGA
package.
1
,
2
Logic Block Diagram
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
DATA IN DRIVERS
ROW DECODER
COLUMN DECODER
A11A12A13A14A
Power -down
Circuit
512K × 16
RAM Array
I/O
–I/O
0
7
SENSE AMPS
15
16
17
18
A
A
A
BHE
BLE
I/O8–I/O
BHE
WE
OE
BLE
15
CE
2
CE
1
CE
2
CE
1
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05014 Rev. *F Revised August 31, 2006
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CY62157CV30/33
Product Portfolio
Power Dissipation
Operating (ICC) mA
Range
V
Product Range
CC
Min. Typ.
[2]
Max. Typ.
[2]
Max. Typ.
max
[2]
Max. T y p.
CY62157CV30 Automotive-E 2.7V 3.0V 3.3V 1.5 3 7 15 8 70
CY62157CV33 Automotive-A 3.0V 3.3V 3.6V 1.5 3 5.5 12 10 30
Automotive-E 1.5 3 7 15 10 80
Pin Configurations
[2, 3, 4]
FBGA (Top View)
326541
CE
BLE
I/O
A
OE
BHE
8
0
A
3
A
A
1
A
CE
4
2
2
I/O
1
A
B
0
Standby (I
µAf = 1 MHz f = f
[2]
SB2
Max.
)
I/O
V
V
I/O
I/O
A
SS
CC
A
I/O
10
9
I/O
11
I/O
12
I/O
13
14
NC
15
A
8
18
5
A
17
DNU
A
14
A
12
A
9
A
6
A
7
A
16
A
15
A
13
A
10
I/O
I/O
I/O
I/O
WE
A
I/O
1
V
CC
3
V
SS
4
I/O
5
I/O
NC
11
C
2
D
E
F
6
G
7
H
Pin Definitions
Name Definition
Input A
Input/Output I/O0-I/O15. Data lines. Used as input or output lines depending on operation
Input/Control WE
Input/Control CE
Input/Control CE
Input/Control OE
Ground Vss. Ground for the device
Power Supply Vcc. Power supply for the device
. Address Inputs
0-A18
. Write Enable, Active LOW . When selected LOW, a WRITE is conducted. When selected HIGH, a READ is
conducted.
. Chip Enable 1, Active LOW.
1
. Chip Enable 2, Active HIGH.
2
. Output Enable, Active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins behave as
outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins
Notes:
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
3. NC pins are not connected on the die.
4. E3 (DNU) can be left as NC or V
to ensure proper application.
SS
CC
= V
CC(typ.)
, TA = 25°C.
Document #: 38-05014 Rev. *F Page 2 of 13
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CY62157CV30/33
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature................................. –65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential...–0.5V to V
DC Voltage Applied to Outputs
in High-Z State
DC Input Voltage
[5]
....................................–0.5V to VCC + 0.3V
[5]
.................................–0.5V to VCC + 0.3V
ccmax
+ 0.5V
Output Current into Outputs (LOW).............................20 mA
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions
V
V
V
V
I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH
OL
IH
IL
Output HIGH Voltage IOH = –1.0 mA VCC = 2.7V 2.4 V
Output LOW Voltage IOL = 2.1 mA VCC = 2.7V 0.4 V
Input HIGH Voltage 2.2 VCC + 0.3V V
Input LOW Voltage –0.3 0.8 V
Input Leakage
Current
Output Leakage
GND < VI < V
CC
GND < VO < VCC, Output Disabled –10 +10 µA
Current
VCC Operating
Supply
Current
Automatic CE
Power-Down
Current— CMOS
Inputs
Automatic CE
Power-Down
Current—CMOS
Inputs
f = f
MAX
= 1/t
RC
f = 1 MHz 1.5 3
CE1 > VCC – 0.2V or CE2 < 0.2V
V
> VCC – 0.2V or VIN < 0.2V,
IN
(Address and Data Only),
f = f
max
f=0 (OE
, WE, BHE and BLE)
CE1 > VCC – 0.2V or CE2 < 0.2V
V
> VCC – 0.2V or VIN < 0.2V,
IN
f = 0, V
CC
= 3.3V
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current ........................................... .. ... ... > 200 mA
Operating Range
Ambient
Device Range
Temperature
CY62157CV30 Automotive-E –40°C to +125°C 2.7V – 3.3V
CY62157CV33 Automotive-A –40°C to +85°C 3.0V – 3.6V
Automotive-E –40°C to +125°C
CY62157CV30-70
–10 +10 µA
VCC = 3.3V
= 0 mA
I
OUT
CMOS Levels
[6]
[TA]
[2]
Max.
V
CC
UnitMin. Typ.
715mA
870µA
870µA
Notes:
5. V
6. T
= –2.0V for pulse durations less than 20 ns.
IL(min.)
is the “Instant-On” case temperature.
A
Document #: 38-05014 Rev. *F Page 3 of 13
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CY62157CV30/33
Electrical Characteristics Over the Operating Range
CY62157CV33-70
[2]
Parameter Description T est Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH Voltage 2.2 VCC + 0.3V V
Input LOW Voltage –0. 3 0.8 V
Input Leakage
Current
Output Leakage
Current
VCC Operating
Supply
Current
IOH = –1.0 mA
V
= 3.0V
CC
2.4 V
IOL = 2.1 mA
V
= 3.0V
CC
GND < VI < V
CC
Auto-A –1 +1 µA
Auto-E –10 +10 µA
GND < VO < VCC, Output Disabled Auto-A –1 +1 µA
Auto-E –10 +10 µA
f = f
MAX
= 1/t
RC
VCC = 3.6V
= 0 mA
I
OUT
CMOS Levels
f = 1 MHz Auto-A/
Auto-A 5.5 12 mA
Auto-E 7 15
1.5 3
Auto-E
I
SB1
Automatic CE
Power-Down
Current—CMOS
Inputs
CE1 > VCC – 0.2V or
CE
< 0.2V
2
V
> VCC – 0.2V or
IN
< 0.2V,
V
IN
f = f
(Address and Data
max
Only),
Auto-A 10 30 µA
Auto-E 10 80 µA
f = 0 (OE,WE,BHE,and BLE)
I
SB2
Automatic CE
Power-Down
Current—CMOS
Inputs
Thermal Resistance
CE1 > VCC – 0.2V or
CE
< 0.2V
2
V
> VCC – 0.2V or
IN
< 0.2V,
V
IN
f = 0, V
[7]
CC
= 3.6V
Auto-A 10 30 µA
Auto-E 10 80 µA
Parameter Description Test Conditions FBGA Unit
Θ
JA
Θ
JC
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Still Air, soldered on a 3 x 4.5 inch, two-layer printed
circuit board
Max.
0.4 V
55 °C/W
16 °C/W
UnitMin. Typ.
Note:
7. Tested initially and after any design or process ch anges that may affect these parameters.
Document #: 38-05014 Rev. *F Page 4 of 13
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