Cypress CY62148BN User Manual
CY62148BN MoBL
®
4-Mbit (512K x 8) Static RAM
Features
• High Speed
—70 ns
• 4.5V–5.5V operation
• Low active power
— Typical active current: 2.5 mA @ f = 1 MHz
— Typical active current:12.5 mA @ f = f
max
(70 ns)
• Low standby curr en t
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
and OE features
• CMOS for optimum speed/power
• Available in standard lead-free and non-lead-free
32-lead (450-mil) SOIC, 32-lead TSOP II and 32-lead
Reverse TSOP II packages
Logic Block Diagram
Functional Description
The CY62148BN is a high-performance CMOS static RAM
organized as 512K words by 8 bits. Easy memory expansion
is provided by an active LOW Chip Enable (CE), an active
LOW Output Enable (OE
has an automatic power-down feature that reduces power
consumption by more than 99% when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE
) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
through I/O7) is then written into the location
0
Reading from the device is accomplished by taking Chip
Enable (CE
Enable (WE
) and Output Enable (OE) LOW while forcing Write
) HIGH for read. Under these conditions, the
contents of the memory location specified by the address pins
will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE
LOW, and WE LOW).
), and three-state drivers. This device
through A18).
0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
WE
OE
INPUT BUFFER
A
0
A
1
A
4
A
5
A
6
A
7
A
12
A
14
A
16
A
17
ROW DECODER
3
2
A
A
512 xK8
ARRAY
COLUMN
DECODER
15
18
13
A
A
ACEA
SENSE AMPS
POWER
DOWN
8
9
11
10
A
A
A
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-06517 Rev. *A Revised August 2, 2006
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Pin Configuration
CY62148BN MoBL
®
A
A
A
A
I/O
I/O
I/O
GND
17
16
14
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
0
1
2
Top View
SOIC
TSOP II
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
A
A
WE
A
A
A
A
OE
A
CE
I/O
I/O
I/O
I/O
I/O
I/O
CC
18
9
10
GND
15
13
8
11
7
6
5
4
3
A
A
A
I/O
I/O
I/O
A
2
1
0
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
12
14
16
17
Top View
Reverse
TSOP II
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I/O
I/O
I/O
I/O
I/O
CE
A
OE
A
A
A
A
WE
A
A
V
3
4
5
6
7
10
11
9
8
13
18
15
cc
Product Portfolio
Power Dissipation
Product
VCC Range
Speed Temp.
Operating, I
f = f
[1]
CC
max
Max.
CY62148BNLL 4.5 V 5.0V 5.5V 70 ns Com’l 12.5 mA 20 mA 4 µA 20 µA
Ind’l
Note:
1. Typical values are measured at V
= 5V, TA = 25°C, and are included for reference only and are not tested or guaranteed.
CC
Standby (I
[1]
Typ.
SB2
Max.Min. Typ. Max. Typ.
)
Document #: 001-06517 Rev. *A Page 2 of 10
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CY62148BN MoBL
®
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on V
DC Voltage Applied to Outputs
in High Z State
[2]
DC Input Voltage
to Relative GND........–0.5V to +7.0V
CC
.....................................–0.5V to VCC +0.5V
[2]
..................................–0.5V to VCC +0.5V
Current into Outputs (LOW).........................................20 mA
Static Discharge Voltage............. ... ... ............................2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.....................................................>200 mA
Operating Range
Commercial 0°C to +70°C 4.5V–5.5V
Industrial –40°C to +85°C
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions
V
V
V
V
I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH
OL
IH
IL
Output HIGH Voltage VCC = Min., IOH = – 1 mA 2.4 V
Output LOW Voltage VCC = Min., IOL = 2.1 mA 0.4 V
Input HIGH Voltage 2.2 VCC+0.3 V
Input LOW Voltage –0.3 0.8 V
Input Leakage Current GND ≤ VI ≤ V
CC
Output Leakage Current GND ≤ VI ≤ VCC, Output Disabled –1 +1 µA
VCC Operating
Supply Current
Automatic CE
Power-Down Current
—T TL Inputs
Automatic CE
Power-Down Current
—C MOS Inputs
f = f
f = 1 MHz 2.5 mA
Max. VCC,CE ≤ V
VIN ≤ VIH or VIN ≤ VIL,
f = f
Max. VCC,
CE
V
or V
= 1/t
MAX
MAX
≤ VCC – 0.3V,
≤ VCC – 0.3V,
IN
≤ 0.3V, f =0
IN
RC
IH
Com’l/Ind’l
I
V
Com’l/
Ind’l
Com’l/
Ind’l
OUT
CC
Range
=0 mA
= Max.,
Ambient
Temperature
[3]
V
CC
CY62148BN-70
[1]
Max.
UnitMin. Typ.
–1 +1 µA
12.5 20 mA
1.5 mA
4 20 µA
Capacitance
[4]
Parameter Description Test Conditions Max. Unit
C
C
IN
OUT
Input Capacitance TA = 25°C, f = 1 MHz,
= 5.0V
V
Output Capacitance 8 pF
CC
6 pF
AC Test Loads and Waveforms
5 pF
R1 1800Ω
(b)
ALL INPUT PULSES
3.0V
R2
990Ω
Equivalent to: THEVENIN EQUIVALENT
GND
OUTPUT
≤ 3 ns ≤ 3ns
639Ω
90%
10%
1.77V
90%
10%
R1 1800Ω
5V
OUTPUT
100 pF
INCLUDING
JIG AND
SCOPE
Notes:
(min.) = –2.0V for pulse durations of less than 20 ns.
2. V
IL
is the “Instant On” case temperature
3. T
A
4. Tested initially and after any design or process ch anges that may affect these parameters.
(a)
R2
990Ω
5V
OUTPUT
INCLUDING
JIG AND
SCOPE
Document #: 001-06517 Rev. *A Page 3 of 10
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