Cypress CY62147DV18 User Manual
CY62147DV18
MoBL2™
4-Mb (256K x 16) Static RAM
Features
• Very high speed: 55 ns and 70 ns
• Wide voltage range: 1.65V – 2.25V
• Pin-compatible with CY62147CV18
• Ultra-low active power
— Typical active current: 1 mA @ f = 1 MHz
— Typical active current: 6 mA @ f = f
max
• Ultra low standby power
• Easy memory expansion with CE, and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Packages offered 48-ball BGA
Functional Description
[1]
The CY62147DV18 is a high-performance CMOS static RAM
organized as 256K words by 16 bits. This device features ad
vanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Life™ (MoBL™) in portable
applications such as cellular telephones. The device also has
an automatic power-down feature that significantly reduces
power consumption. The device can also be put into standby
Logic Block Diagram
mode reducing power consumption by more than 99% when
deselected (
input/output pins (I/O
pedance state when: deselected (CE HIGH), outputs are dis-
CE HIGH or both BLE and BHE are HIGH). The
through I/O15) are placed in a high-im-
0
abled (OE HIGH), both Byte High Enable and Byte Low Enable
are disabled (
BHE, BLE HIGH), or during a write operation (CE
LOW and WE LOW).
Writing to the device is accomplished by asserting Chip En-
able (CE) and Write Enable (WE) inputs LOW. If Byte Low
Enable (
I/O
(A
from I/O pins (I/O
specified on the address pins (A
BLE) is LOW, then data from I/O pins (I/O0 through
), is written into the location specified on the address pins
7
through A17). If Byte High Enable (BHE) is LOW, then data
0
through I/O15) is written into the location
8
through A17).
0
Reading from the device is accomplished by asserting Chip
Enable (
Write Enable (
CE) and Output Enable (OE) LOW while forcing the
WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
-
LOW, then data from memory will appear on I/O
the truth table for a complete description of read and write
to I/O7. If Byte High Enable (BHE) is
0
to I/O15. See
8
modes.
The CY62147DV18 is available in a 48-ball FBGA package.
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Power-Down
Circuit
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
DATA IN DRIVERS
ROW DECODER
COLUMN DECODER
11
A
A12A
256K x 16
RAM Array
13
14
A
I/O
– I/O
0
7
SENSE AMPS
16
15
17
A
A
A
I/O8 – I/O
BHE
WE
CE
OE
BLE
15
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-05343 Rev. *B Revised February 26, 2004
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CY62147DV18
MoBL2™
Pin Configuration
[2, 3, 4]
FBGA (Top View)
1
2
OE
BLE
I/O
BHE
8
I/O
I/O
V
V
I/O
I/O
NC
Notes:
2. NC pins are not internally connected on the die.
3. DNU pins have to be left floating or tied to Vss to ensure proper application.
4. Pins H1, G2, and H6 in the BGA package are address expansion pins for 8 Mb, 16 Mb, and 32 Mb, respectively.
SS
CC
10
9
I/O
11
DNU
I/O
12
I/O
13
14
NC
15
A
8
4
3
A
0
A
3
A
5
A
17
A
14
A
12
A
9
5
6
A
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
CE
I/O
I/O
I/O
I/O
WE
A
NC
2
I/O
I/O
1
Vcc
3
Vss
4
I/O
5
I/O
NC
11
A
B
0
C
2
D
E
F
6
G
7
H
Document #: 38-05343 Rev. *B Page 2 of 11
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CY62147DV18
MoBL2™
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................–65°C to + 150°C
Ambient Temperature with
Power Applied............................................–55°C to + 125°C
Supply Voltage to Ground
Potential......................................–0.2V to + V
DC Voltage Applied to Outputs
in High Z State
DC Input Voltage
[5,6]
..........................–0.2V to V
[5,6]
.....................–0.2V to V
CC(MAX)
CC(MAX)
CC (MAX)
+ 0.2V
+ 0.2V
+ 0.2V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.....................................................> 200 mA
Operating Range
Ambient
Device Range
CY62147DV18L Industrial –40°C to +85°C 1.65V to 2.25V
CY62147DV18LL
Temperature
(TA) V
CC
Product Portfolio
Power Dissipation
Operating ICC (mA)
Product
VCC Range (V)
Min. Typ.
[7]
Speed
Max. Typ .
(ns)
[7]
Max. Typ.
max
[7]
Max. Typ.
Standby I
[7]
SB2
Max.
CY62147DV18L 1.65 1.8 2.25 55 1.0 2.0 6 15 0.5 18
CY62147DV18LL 10 12
CY62147DV18L 1.65 1.8 2.25 70 1.0 2.0 6 15 0.5 18
CY62147DV18LL 10 12
Electrical Characteristics Over the Operating Range
CY62147DV18-55 CY62147DV18-70
Parameter Description Test Conditions
V
V
V
V
I
I
I
OH
OL
IH
IL
IX
OZ
CC
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Voltage
Input LOW
Voltage
Input Leakage
Current
Output Leakage
Current
VCC Operating
Supply Current
IOH = –0.1 mA V
IOL = 0.1 mA V
V
=1.65V to 2.25V 1.4 V
CC
V
=1.65V to 2.25V –0.2 0.4 –0.2 0.4 V
CC
GND < VI < V
CC
= 1.65V 1.4 1.4 V
CC
= 1.65V 0.2 0.2 V
CC
GND < VO < VCC, Output Disabled –1 +1 –1 +1 µA
f = f
f = 1 MHz V
MAX
= 1/t
RC
V
CC(max)
I
= 0 mA
OUT
CMOS levels
V
CC(max)
I
= 0 mA
OUT
CMOS levels
CC(max)
–1 +1 –1 +1 µA
= 1.95V
L 6 12 6 12 mA
LL 8 8
= 2.25V
L 6 15 6 15 mA
LL 10 10
= 1.95V L 1 1.5 1 1.5 mA
[7]
Max. Min. Ty p.
+ 0.2V 1.4 V
CC
LL
V
= 2.25V L 1 2 1 2 mA
CC(max)
LL
Notes:
5. V
6. V
7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = V
= –2.0V for pulse durations less than 20 ns.
IL(min.)
IH(max)=VCC
+0.75V for pulse durations less than 20ns.
CC(typ.)
[7]
, TA = 25°C.
Max.
+ 0.2V V
CC
[7]
(µA)f = 1MHz f = f
UnitMin. Ty p.
Document #: 38-05343 Rev. *B Page 3 of 11
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CY62147DV18
MoBL2™
Electrical Characteristics Over the Operating Range (continued)
CY62147DV18-55 CY62147DV18-70
[7]
Parameter Description Test Conditions
I
SB1
Automatic CE
Power-Down
Current —
CMOS Inputs
CE > VCC−0.2V,
VIN>VCC–0.2V,
V
<0.2V); f = f
IN
(Address and Data
Only), f = 0 (
MAX
OE,
V
CC(max)
V
CC(max)
WE, BHE and BLE)
I
SB2
Automatic CE
Power-down
Current —
CMOS Inputs
CE > VCC – 0.2V,
VIN > VCC – 0.2V or
V
< 0.2V, f = 0
IN
V
CC(max)
V
CC(max)
=1.95V L 0.5 12 0.5 12 µA
LL 8 8
=2.25V L 0.5 18 0.5 18
LL 12 12
=1.95V L 0.5 12 0.5 12 µA
LL 8 8
=2.25V L 0.5 18 0.5 18
Max. Min. Typ.
LL 12 12
Capacitance for all Packages
[8]
Parameter Description Test Conditions Max. Unit
C
C
IN
OUT
Input Capacitance TA = 25°C, f = 1 MHz,
VCC = V
Output Capacitance 10 pF
CC(typ)
10 pF
Thermal Resistance
Parameter Description Test Conditions BGA Unit
Θ
JA
Θ
JC
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
[8]
[8]
Still Air, soldered on a 3 × 4.5 inch, four-layer printed circuit
board
[7]
Max.
75 °C/W
10 °C/W
UnitMin. Typ.
AC Test Loads and Waveforms
R1
CC
OUTPUT
INCLUDING
JIG AND
30 pF
R2
VCC V
GND
10%
Rise Time = 1 V/ns
Equivalent to: THÉ VENIN EQUIVALENT
SCOPE
Parameters 1.80V Unit
R1 13500 Ω
R2 10800 Ω
R
TH
V
TH
6000 Ω
0.80 V
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
R
TH
OUTPUT V
Data Retention Characteristics (Over the Operating Range)
Parameter Description Conditions Min. Typ.
V
DR
I
CCDR
[8]
t
CDR
t
R
Notes:
8. Tested initially and after any design or process changes that may affect these parameters.
VCC for Data Retention 1.0 V
Data Retention Current VCC= 1.0V CE > VCC – 0.2V,
VIN > VCC – 0.2V or VIN < 0.2V
L 6 µA
LL 4
Chip Deselect to Data Retention Time 0 ns
Operation Recovery Time t
RC
[7]
Max. Unit
ns
Document #: 38-05343 Rev. *B Page 4 of 11
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