Cypress CY62146ESL User Manual
CY62146ESL MoBL
®
4-Mbit (256K x 16) Static RAM
Features
256K x 16
RAM Array
IO
0
–IO
7
ROW DECODER
A
8
A
7
A
6
A
5
A
2
COLUMN DECODER
A
11
A12A
13
A
14
A
15
SENSE AMPS
DATA IN DRIVERS
OE
A
4
A
3
IO8–IO
15
CE
WE
BHE
A
16
A
0
A
1
A
9
A
10
BLE
A
17
■ Very high speed: 45 ns
■ Wide voltage range: 2.2V–3.6V
■ Ultra low standby power
❐ Typical Standby current: 1 μA
❐ Maximum Standby current: 7 μA
■ Ultra low active power
❐ Typical active current: 2 mA at f = 1 MHz
■ Easy memory expansion with CE and OE features
■ Automatic power down when deselected
■ CMOS for optimum speed and power
■ Available in Pb-free 44-pin TSOP II package
and 4.5V–5.5V
Functional Description
The CY62146ESL is a high performance CMOS static RAM
organized as 256K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
®
) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that reduces power consumption
when addresses are not toggling. Placing the device into standby
Logic Block Diagram
mode reduces power consumption by more than 99% when
deselected (CE
) are placed in a high impedance state when:
IO
15
■ Deselected (CE HIGH)
■ Outputs are disabled (OE HIGH)
■ Both Byte High Enable and Byte Low Enable are disabled
(BHE
, BLE HIGH)
■ Write operation is active (CE LOW and WE LOW)
To write to the device, take Chip Enable (CE
(WE
) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
specified on the address pins (A
Enable (BHE
HIGH). The input and output pins (IO0 through
) and Write Enable
through IO7) is written into the location
0
) is LOW, then data from IO pins (IO8 through IO15)
through A17). If Byte High
0
is written into the location specified on the address pins (A
through A17).
To read from the device, take Chip Enable (CE
Enable (OE
Byte Low Enable (BLE
) LOW while forcing the Write Enable (WE) HIGH. If
) is LOW, then data from the memory
location specified by the address pins appea rs on IO
Byte High Enable (BHE
appears on IO
complete description of read and write modes.
to IO15. See the “Truth Table” on page 10 for a
8
) is LOW, then data from memory
) and Output
to IO7. If
0
For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.
0
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-43142 Rev. ** Revised January 04, 2008
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CY62146ESL MoBL
®
Pin Configuration
1
2
3
4
5
6
7
8
9
11
14
31
32
36
35
34
33
37
40
39
38
12
13
41
44
43
42
16
15
29
30
A
5
18
17
20
19
27
28
25
26
22
21
23
24
A
6
A
7
A
4
A
3
A
2
A
1
A
0
A
15
A
16
A
8
A
9
A
10
A
11
A
13
A
14
A
12
OE
BHE
BLE
CE
WE
IO
0
IO
1
IO
2
IO
3
IO
4
IO
5
IO
6
IO
7
IO
8
IO
9
IO
10
IO
11
IO
12
IO
13
IO
14
IO
15
V
CC
V
CC
V
SS
V
SS
NC
10
A
17
Notes
1. NC pins are not connected on the die.
2. Datasheet specifications are not guaranteed for V
CC
in the range of 3.6V to 4.5V.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= 3V, and VCC = 5V, TA = 25°C.
Figure 1. 44-Pin TSOP II (Top View)
[1]
Product Portfolio
Product Range VCC Range (V)
[2]
CY62146ESL Industrial 2.2V–3.6V and 4.5V–5.5V 45 2 2.5 15 20 1 7
Document #: 001-43142 Rev. ** Page 2 of 12
Speed
(ns)
Typ
Power Dissipation
Operating ICC, (mA)
f = 1MHz f = f
[3]
Max Typ
max
[3]
Max Typ
Standby, I
(μA)
[3]
SB2
Max
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CY62146ESL MoBL
®
Maximum Ratings
Notes
4. V
IL
(min) = –2.0V for pulse durations less than 20 ns.
5. V
IH
(max) = VCC + 0.75V for pulse durations less than 20 ns.
6. Full Device AC operation assumes a 100 μs ramp time from 0 to V
CC
(min) and 200 μs wait time after VCC stabilization.
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature.................................. –65°C to +150°C
Ambient Temperature with
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage............................................>2001V
(MIL-STD-883, Method 3015)
Latch up Current............................................... .......>200 mA
Operating Range
Power Applied ............................................–55°C to +125°C
Supply Voltage to Ground Potential..................–0.5V to 6.0V
DC Voltage Applied to Outputs
in High-Z State
DC Input Voltage
[4, 5]
...........................................–0.5V to 6.0V
[4, 5]
........................................–0.5V to 6.0V
Electrical Characteristics
Over the Operating Range
Parameter Description Test Conditions
V
V
V
V
I
IX
I
OZ
I
CC
I
SB1
I
SB2
OH
OL
IH
IL
Output HIGH Voltage 2.2 < VCC < 2.7 IOH = –0.1 mA 2.0 V
2.7 <
VCC < 3.6 IOH = –1.0 mA 2.4
4.5 <
VCC < 5.5 IOH = –1.0 mA 2.4
Output LOW Voltage 2.2 < VCC < 2.7 IOL = 0.1 mA 0.4 V
2.7 <
VCC < 3.6 IOL = 2.1mA 0.4
4.5 <
VCC < 5.5 IOL = 2.1mA 0.4
Input HIGH Voltage 2.2 < VCC < 2.7 1.8 V
2.7 <
VCC < 3.6 2.2 V
4.5 <
VCC < 5.5 2.2 V
Input LOW Voltage 2.2 < VCC < 2.7 –0.3 0.6 V
2.7 <
VCC < 3.6 –0.3 0.8
4.5 <
VCC < 5.5 –0.5 0.8
Input Leakage Current GND < VI < V
CC
Output Leakage Current GND < VO < VCC, Output Disabled –1 +1 μA
VCC Operating Supply
Current
Automatic CE Power
down Current — CMOS
Inputs
Automatic CE Power
down Current — CMOS
f = f
= 1/t
max
RC
f = 1 MHz 2 2.5
CE
> V
− 0.2V, V
CC
f = f
f = 0 (OE
CE
f = 0, V
(Address and Data Only),
max
, BHE, BLE and WE),
> VCC – 0.2V, VIN > VCC – 0.2V or VIN < 0.2V,
=
CC
V
CC(max)
IN
>
V
VCC = V
I
OUT
– 0.2V or V
CC
Inputs
Device Range
Ambient
Temperature
[6]
V
CC
CY62146ESL Industrial –40°C to +85°C 2.2V–3.6V,
and
4.5V–5.5V
45 ns
[3]
Max
+ 0.3 V
CC
+ 0.3
CC
+ 0.5
CC
UnitMin Typ
–1 +1 μA
CCmax
15 20 mA
= 0 mA, CMOS levels
< 0.2V,
IN
= V
V
CC
CC(max)
17μA
17μA
Document #: 001-43142 Rev. ** Page 3 of 12
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CY62146ESL MoBL
®
Capacitance
VCC
V
CC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
Rise Time = 1 V/ns
Fall Time = 1 V/ns
OUTPUT V
Equivalent to: THÉ VENIN EQUIVALENT
ALL INPUT PULSES
R
TH
R1
TH
Tested initially and after any design or process changes that may affect these parameters.
Parameter Description Test Conditions Max Unit
C
C
IN
OUT
Input Capacitance TA = 25°C, f = 1 MHz,
= V
V
CC
Output Capacitance 10 pF
CC(typ)
10 pF
Thermal Resistance
Tested initially and after any design or process changes that may affect these parameters.
Parameter Description Test Conditions TSOP II Unit
Θ
Θ
Thermal Resistance
JA
(Junction to Ambient)
Thermal Resistance
JC
(Junction to Case)
Still Air, soldered on a 3 × 4.5 inch, two-layer
printed circuit board
77 °C/W
13 °C/W
AC Test Loads and Waveforms
Parameters 2.5V 3.0V 5.0V Unit
R1 16667 1103 1800 Ω
R2 15385 1554 990 Ω
R
V
TH
TH
8000 645 639 Ω
1.20 1.75 1.77 V
Document #: 001-43142 Rev. ** Page 4 of 12
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