Cypress CY62138EV30 User Manual
CY62138EV30
MoBL
®
2-Mbit (256K x 8) MoBL® Static RAM
Features
• Very high speed: 45 ns
— Wide voltage range: 2.20V – 3.60V
• Pin-compatible with CY62138CV30
• Ultra-low standby power
— Typical standby current: 1 µA
— Maximum standby current: 7 µA
• Ultra-low active power
— Typical active current: 2 mA @ f = 1 MHz
• Easy memory expansion with CE
and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Offered in Pb-free 36-ball BGA package
Logic Block Diagram
Functional Description
[1]
The CY62138EV30 is a high-performance CMOS static RAM
organized as 256K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL
®
) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption. The device can be put into
standby mode reducing power consumption when deselected
(CE
HIGH).
Writing to the device is accomplished by taking Chip Enable
(CE
) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
through I/O7) is then written into the location
0
through A18).
0
Reading from the device is accomplished by taking Chip
Enable (CE
Enable (WE
) and Output Enable (OE) LOW while forcing Write
) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE
LOW and WE LOW).
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
Data in Drivers
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
ROW DECODER
A
9
A
10
A
11
CE
WE
OE
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
256K x 8
ARRAY
COLUMN
DECODER
13
12
A
A
SENSE AMPS
POWER
DOWN
14
16
17
15
A
A
A
A
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05577 Rev. *A Revised February 14, 2006
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CY62138EV30
MoBL
®
Pin Configuration
[2]
FBGA
Top View
A
A
I/O
I/O
V
V
I/O
I/O
A
0
SS
CC
9
A
1
WE
A
4
2
OE
A
NC
NC
10
5
6
7
CE
A
3
A
4
A
5
A
17
A
16
A
12
11
A
NC
A
6
A
I/O
7
I/O
V
V
I/O
I/O
A
15
A
A
13
A
8
B
0
C
1
D
cc
E
ss
F
2
G
3
H
14
Product Portfolio
Power Dissipation
Product
V
Range (V)
CC
Min. Typ.
[3]
Max. Typ.
Speed
(ns)
Operating I
[3]
Max. Typ.
CY62138EV30LL 2.2 3.0 3.6 45 2 2.5 15 20 1 7
Notes:
2. NC pins are not connected on the die.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
(mA)
[3]
max
Max. Typ.
= V
CC
CC(typ.)
Standby I
[3]
, TA = 25°C.
SB2
(µA)f = 1 MHz f = f
Max.
Document #: 38-05577 Rev. *A Page 2 of 9
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CY62138EV30
MoBL
®
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature..................................–65°C to +150°C
Ambient Temperature with
Power Applied...............................................55°C to +125°C
Supply Voltage to Ground
Potential........................................ –0.3V to V
DC Voltage Applied to Outputs
in High-Z State
[4,5]
.........................–0.3V to V
CC(MAX)
CC(MAX)
+ 0.3V
+ 0.3V
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1
I
SB2
Capacitance for all p ackages
C
IN
C
OUT
Notes:
4. V
IL(min.)
5. V
IH(max)
6. Full device AC operation assumes a 100 µs ramp time from 0 to V
Output HIGH Voltage IOH = –0.1 mAV
I
= –1.0 mAV
OH
Output LOW Voltage IOL = 0.1 mA V
IOL = 2.1 mA V
Input HIGH Voltage V
= 2.2V to 2.7V 1.8 V
CC
= 2.20V 2.0 V
CC
= 2.70V 2.4 V
CC
= 2.20V 0.4 V
CC
= 2.70V 0.4 V
CC
VCC= 2.7V to 3.6V 2.2 V
Input LOW Voltage V
Input Leakage
Current
Output Leakage
Current
VCC Operating
Supply Current
Automatic CE
Power-down
Current — CMOS
Inputs
Automatic CE
Power-down
Current — CMOS
Inputs
[7]
= 2.2V to 2.7V –0.3 0.6 V
CC
V
= 2.7V to 3.6V –0.3 0.8 V
CC
GND < VI < V
CC
GND < VO < VCC,
Output Disabled
f = f
1/t
f = 1 MHz 2 2.5 mA
CE > V
V
Data Only), f = 0 (OE
V
=
MAX
RC
CC
< 0.2V), f = f
IN
= 3.60V
CC
VCC = V
I
OUT
CMOS levels
– 0.2V, V
MAX
= 0 mA
> V
IN
(Address and
, and WE),
CE > VCC – 0.2V,
V
> VCC – 0.2V or VIN < 0.2V,
IN
f = 0, V
= 3.60V
CC
Parameter Description Test Conditions Max. Unit
Input Capacitance TA = 25°C, f = 1 MHz,
Output Capacitance 10 pF
= –2.0V for pulse durations less than 20 ns.
= VCC+0.75V for pulse durations less than 20 ns.
V
(min.) and 200 µs wait time after V
CC
DC Input Voltage
[4,5]
......................–0.3V to V
CC(MAX)
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.....................................................> 200 mA
Ambient
Product Range
Temperature V
CY62138EV30LL Industrial –40°C to +85°C 2.2V to
CY62138EV30-45
[3]
Max.
+ 0.3V V
CC
+ 0.3V V
CC
–1 +1 µA
–1 +1 µA
CCmax
CC
– 0.2V,
15 20 mA
17µA
17µA
10 pF
= V
CC
CC(typ.)
stabilization.
CC
+ 0.3V
[6]
CC
3.6V
UnitMin. Typ.
Document #: 38-05577 Rev. *A Page 3 of 9
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