CYPRESS CY62138CV25, CY62138CV30, CY62138CV33, CY62138CV User Manual

查询CY62138CV25供应商
Features
Very high speed: 55 ns and 70 ns
CY62138CV30: 2.7V3.3VCY62138CV33: 3.0V3.6VCY62138CV: 2.7V3.6V
Pin-compatible with CY62138V
Ultra low active powerTypical active current: 1.5 mA @ f = 1 MHzTypical active current: 5.5 mA @ f = f
speed)
Low standby power
Easy memory expansion with CE
features
, CE2, and OE
1
Automatic power-down when deselected
CMOS for optimum speed/power
Packages offered in a 36-ball FBGA
Functional Description
[1]
The CY62138CV25/30/33 and CY62138CV are high-perfor­mance CMOS stati c RAMs org anize d as 256K word s by eig ht
max
(70-ns
CY62138CV25/30/33 MoBL
CY62138CV MoBL
® ®
2M (256K x 8) Static RAM
bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for provi ding More Batter y
(MoBL®) in portable applications. The device also has
Life an automatic power-down feature that significantly reduces power consumption by 80% when addr esses are not toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected (CE
LOW).
or CE
2
Writing to the device is accomplished by taking Chip Enable 1
) and Write Enable (WE) inputs LOW and Chip Enable 2
(CE
1
(CE2) HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the loc ation spe cified on the address pin s (A through A17).
Reading from the device is accomplished by taking Chip Enable 1 (CE Write Enable (WE) and Chip Enable 2 (CE2) HIGH. Under
) and Output Enable (O E) LOW while forcing
1
these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O high-impedance state when the device is deselected (CE
through I/O7) are placed in a
0
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE See the truth table at the b ack of this data shee t for a complete
LOW, CE2 HIGH and WE LOW).
1
description of read and write modes.
HIGH
1
0
1
Logic Block Diagram
I/O I/O I/O I/O I/O I/O I/O I/O
0
1
2
3
4
5
6
7
ROW DECODER
Data in Drivers
256K x 8
ARRAY
COLUMN
DECODER
15
13
12
14
A
A
A
A
SENSE AMPS
POWER
DOWN
16
17
A
A
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
CE
1
CE
2
Note:
1. For best practice recommendations, please refer to the Cypress applic a tion note System Design Guidelines on http://www.cypress.com.
WE
OE
Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600 Document #: 38-05200 Rev. *D Revised September 20, 2002
CY62138CV25/30/33 MoBL
CY62138CV MoBL
® ®
Pin
Configuration
[2, 3]
A
I/O
I/O
V
V
I/O
I/O
A
FBGA (Top View)
1
2
A
1
0
A
4
2
5
SS
CC
6
OE
7
A
10
9
3
CE
WE A
DNU
NC
CE
A
11
Maximum Ratings
(Above which the useful life may be impaired. For user guide­lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied ..............................................55°C to +125°C
Supply Voltage to Ground Potential ... –0.5V V DC Voltage Applied to Outputs
in High-Z State DC Input Voltage
[4]
.....................................0.5V to VCC + 0.3V
[4]
.................................–0.5V to VCC + 0.3V
Output Current into Outputs (LOW) ............................ 20 mA
CCMAX
+ 0.5V
4
5
6
A
A
3
2
A
4
A
5
A
17
A
1
16
A
12
A
6
I/O
7
I/O
V
CC
V
SS
I/O
I/O
A
15
A
A
13
A
8
B
0
C
1
D
E
F
2
G
3
H
14
Stat ic Disc ha rge Voltage................................. ...... ....> 2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current ...................................................> 200 mA
Operating Range
Product Range
CY62138CV25 Industrial –40°C to +85°C 2.2V to 2.7V CY62138CV30 2.7V to 3.3V CY62138CV33 3.0V to 3.6V CY62138CV 2.7V to 3.6V
Ambient
Te mpe r ature T
A
V
CC
Product Portfolio
Power Dissipation
Operating, ICC (mA) Standby, I
Product
VCC Range (V)
[5]
Speed
Max. Typ.
(ns)
f = 1 MHz f = f
[5]
Max. Typ.
[5]
max
Max.
Typ.
[5]
CY62138CV25LL 2.2 2.5 2.7 55 1.5 3 7 15 2 10
70 1.5 3 5.5 12
CY62138CV30LL 2.7 3.0 3.3 55 1.5 3 7 15 2 10
70 1.5 3 5.5 12
CY62138CV33LL 3.0 3.3 3.6 55 1.5 3 7 15 5 15
70 1.5 3 5.5 12
CY62138CVLL 2.7 3.3 3.6 70 1.5 3 5.5 12 5 15
Notes:
2. NC pins are not connected to the die.
3. C3 (DNU) can be left as NC or V
4. V
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
= –2.0V for pulse durations less than 20 ns.
IL(min.)
to ensure proper application.
SS
= V
CC
CC(typ.)
, TA = 25°C.
Document #: 38-05200 Rev. *D Page 2 of 12
SB2
Max.Min. Typ.
(µA)
Electrical Characteristics Ov er the Op erat ing Range
Parameter Description Test Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1
I
SB2
Parameter Description Test Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1
I
SB2
Output HIGH Voltage IOH = –0.1 mA VCC = 2.2V 2.0 2.0 V Output LOW Voltage IOL = 0.1 mA VCC = 2.2V 0.4 0.4 V Input HIGH Voltage 1.8 V
Input LOW Voltage –0.3 0.6 –0.3 0.6 V Input Leakage Current GND < VI < V Output Leakage
GND < VO < VCC, Output Disabled –1 +1 –1 +1 µA
CC
Current VCC Operating Supply
Current
Automatic CE Power-down Current CMOS Inputs
Automatic CE Power-down Current CMOS Inputs
f = f f = 1 MHz 1.5 3 1.5 3
MAX
= 1/t
RC
VCC = 2.7V I
OUT
CMOS Levels
CE1 > VCC – 0.2V or CE2 < 0.2V V
> VCC – 0.2V or VIN < 0.2V, f =
IN
f
(Address and Data Only), f = 0
max
(OE
, WE)
CE1 > VCC – 0.2V or CE2 < 0.2V
> VCC − 0.2V or VIN < 0.2V , f = 0, V
V
IN
= 2.7V
Output HIGH Voltage IOH = –1.0 mA VCC = 2.7V 2.4 2.4 V Output LOW Voltage IOL = 2.1 mA VCC = 2.7V 0.4 0.4 V Input HIGH Voltage 2.2 V
Input LOW Voltage –0.3 0.8 –0.3 0.8 V Input Leakage Current GND < VI < V Output Leakage
GND < VO < VCC, Output Disabled –1 +1 –1 +1 µA
CC
Current VCC Operating Supply
Current
Automatic CE Power-down Current CMOS Inputs
Automatic CE Power-down Current CMOS Inputs
f = f f = 1 MHz 1.5 3 1.5 3
MAX
= 1/t
RC
VCC = 3.3V I
OUT
CMOS Levels
CE1 > VCC – 0.2V or CE2 < 0.2V V
> VCC – 0.2V or VIN < 0.2V, f =
IN
f
(Address and Data Only), f = 0
max
(OE
, WE)
CE1 > VCC – 0.2V or CE2 < 0.2V, VIN
VCC − 0.2V or VIN < 0.2V , f = 0,
> VCC=3.3V
= 0 mA
= 0 mA
CY62138CV25/30/33 MoBL
CY62138CV MoBL
CY62138CV25-55 CY62138CV25-70
[5]
Max. Min. Typ.
+
1.8 V
CC
0.3V
–1 +1 –1 +1 µA
7 15 5.5 12 mA
2 10 2 10 µA
CC
CY62138CV30-55 CY62138CV30-70
[5]
Max. Min. Typ.
+
2.2 V
CC
0.3V
–1 +1 –1 +1 µA
7 15 5.5 12 mA
2 10 2 10 µA
[5]
[5]
Max.
CC
0.3V
Max.
CC
0.3V
® ®
UnitMin. Typ.
+
V
UnitMin. Typ.
+
V
Document #: 38-05200 Rev. *D Page 3 of 12
CY62138CV25/30/33 MoBL
CY62138CV MoBL
Electrical Characteristics Ov er the Op erat ing Range
CY62138CV33-55
Parameter Description Test Conditions
V
OH
Output HIGH Voltage IOH = –1.0 mA VCC = 3.0V 2.4 2.4 V
[5]
Max. Min. Typ.
VCC = 2.7V 2.4 V
V
OL
Output LOW Voltage IOL = 2.1 mA VCC = 3.0V 0.4 0.4 V
VCC = 2.7V 0.4 V
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1
I
SB2
Capacitance
Input HIGH Voltage 2.2 V
0.3V Input LOW Voltage –0.3 0.8 –0.3 0.8 V Input Leakage Current GND < VI < V Output Leakage
GND < VO < VCC, Output Disabled –1 +1 –1 +1 µA
CC
–1 +1 –1 +1 µA
Current VCC Operating Supply
Current
Automatic CE Power-down Current CMOS Inputs
Automatic CE Power-down Current CMOS Inputs
[6]
f = f f = 1 MHz 1.5 3 1.5 3
CE1 > VCC – 0.2V or CE2 < 0.2V V f = f f = 0 (OE
= 1/t
MAX
> VCC – 0.2V or VIN < 0.2V,
IN
max
RC
(Address and Data Only),
VCC = 3.6V
= 0 mA
I
OUT
CMOS Levels
,WE)
7 15 5.5 12 mA
5 15 5 15 µA
CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC − 0.2V or VIN < 0.2V,
CC
= 3.6V
f = 0, V
Parameter Description T est Conditions Max. Unit
C
IN
C
OUT
Thermal Resistance
Input Capacitance TA = 25°C, f = 1 MHz, VCC = V
CC(typ.)
Output Capaci tance 8 pF
Parameter Description T est Condit ions BGA Unit
Θ
JA
Θ
JC
Thermal Resistance (Junction to Ambient)
Thermal Resistance (Junction to Case)
[6]
Still A ir, soldered on a 3 x 4.5 inch, two-l aye r pri nte d circuit board
[6]
CY62138CV33-70
CY62138CV-70
+
2.2 V
CC
6 pF
[5]
Max.
CC
0.3V
55 °C/W
16 °C/W
® ®
UnitMin. Typ.
+
V
AC Test Loads and Waveforms
30 pF
SCOPE
R1
VCC Typ
R2
Equivalent to: THÉ VENIN EQUIVALENT
OUTPUT V
GND
Rise Time: 1 V/ns
10%
R
TH
ALL INPUT PULSES
90%
TH
90%
10%
Fall time: 1 V/ns
V
CC
OUTPUT
INCLUDING
JIG AND
Note:
6. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05200 Rev. *D Page 4 of 12
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