Cypress CY62128B User Manual
MoBL
®
1-Mbit (128K x 8) Static RAM
CY62128B
Features
• Temperature Ranges
—Commercial: 0°C to 70°C
—Industrial: –40°C to 85°C
—Automotive: –40°C to 125°C
• 4.5V–5.5V operation
• CMOS for optimum speed/power
• Low active power
(70 ns, LL version, Commercial, Industrial)
—82.5 mW (max.) (15 mA)
• Low standby power
(70 ns, LL version, Commercial, Industrial)
—110 µW (max.) (15 µA)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
, CE2, and OE options
1
Functional Description
[1]
The CY62128B is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE1),
an active HIGH Chip Enable (CE
Enable (OE
), and three-state drivers. This device has an
), an active LOW Output
2
automatic power-down feature that reduces power
consumption by more than 75% when deselected.
Writing to the device is accomplished by taking Chip Enable
One (CE
Enable Tw o (CE
through I/O7) is then written into the location specified on the
address pins (A
) and Write Enable (WE) inputs LOW and Chip
1
) input HIGH. Data on the eight I/O pins (I/O
2
through A16).
0
Reading from the device is accomplished by taking Chip
Enable One (CE
Write Enable (WE
) and Output Enable (OE) LOW while forcing
1
) and Chip Enable Two (CE2) HIGH. Under
these conditions, the contents of the memory location
specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
through I/O7) are placed in a
0
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE
LOW, CE2 HIGH, and WE LOW).
1
The CY62128B is available in a standard 450-mil-wide SOIC,
32-pin TSOP type I and STSOP packages.
0
1
Logic Block Diagram
I/O
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
CE
1
CE
2
WE
OE
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
512x256x8
ROW DECODER
ARRAY
COLUMN
DECODER
10
9
A
A
SENSE AMPS
POWER
DOWN
11
14
15
16
12
A
A
A
A
A13A
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-05300 Rev. *C Revised March 7, 2005
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CY62128B
MoBL
Product Portfolio
Power Dissipation
V
Product
Range (V)
CC
Min. T yp.
[2]
Max. T y p.
Speed
(ns)
(mA)
[2]
Max. Typ.
CY62128BLL Industrial 4.5 5.0 5.5 55 7.5 20 2.5 15
Industrial 70 6 15 2.5 15
Automotive 70 6 25 2.5 25
Pin Configurations
Top View
SOIC
Operating, ICC
NC
A
16
A
14
A
12
A
A
A
A
A
A
A
A
I/O
I/O
I/O
GN
gncGg
GND
7
6
5
4
3
2
1
12
0
0
13
1
14
2
151718
16
1
2
3
4
5
6
7
8
9
10
11
V
32
CC
31
A
15
30
CE
2
29
WE
28
A
13
27
A
8
26
A
9
25
A
11
24
OE
23
A
10
22
CE
1
I/O
21
7
I/O
6
20
I/O
5
19
I/O
4
I/O
3
Standby, I
(µA)
[2]
Max.
SB2
®
A
4
16
A
5
15
A
14
6
A
13
7
A
12
12
A
11
14
A
16
NC
V
CC
A
15
CE
2
WE
A
13
A
8
A
9
A
11
10
9
8
7
6
5
4
3
2
1
Reverse TSOP I
Top View
(not to scale)
A
A
CE
V
A
WE
A
NC
A
A
A
25
11
26
A
9
27
A
8
28
13
29
30
2
31
15
32
CC
1
2
16
3
14
4
12
A
5
7
A
6
6
7
A
5
8
A
4
STSOP
Top View
(not to scale)
24
OE
A
1
23
A
22
CE
21
I/O
20
I/O
19
I/O
18
I/O
17
I/O
16
GND
I/O
15
14
I/O
I/O
13
A
12
A
11
10
A
A
9
11
2
A
10
0
1
2
3
9
3
A
1
8
4
A
7
13
CE
V
WE
A
NC
A
A
A
5
6
2
7
15
8
CC
9
10
16
11
14
12
12
A
13
7
A
14
6
15
A
5
16
A
4
TSOP I
Top View
(not to scale)
6
5
4
3
2
1
0
32
OE
31
A
10
30
CE
29
I/O
28
I/O
27
I/O
26
I/O
25
25
I/O
24
GND
I/O
23
22
I/O
I/O
21
A
20
0
A
19
1
18
A
2
A
17
3
17
3
A
18
2
A
19
1
A
20
0
I/O
21
0
I/O
22
1
I/O
23
2
GND
24
I/O
3
25
I/O
4
26
I/O
27
5
I/O
6
28
I/O
7
29
CE
1
30
A
10
31
OE
32
Pin Definitions
Input A0-A16. Address Inputs
Input/Output I/O
Input/Control WE
Input/Control CE
Input/Control CE
Input/Control OE
Ground GND. Ground for the device
Power Supply V
Note:
2. Typical values are included for reference only and are not tested or guaranteed. Typical values are an averag e of the distribution across normal production
variations as measured at V
-I/O7. Data lines. Used as input or output lines depending on operation
0
. Write Enable, Active LOW. When selected LOW , a WRITE is conducted. When selected HIGH, a READ
is conducted.
. Chip Enable 1, Active LOW.
1
. Chip Enable 2, Active HIGH.
2
. Output Enable, Active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins behave as
outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins
. Power supply for the device
CC
= 5.0V, TA = 25°C, and t
CC
AA
= 70 ns.
1
7
6
5
4
3
2
1
0
Document #: 38-05300 Rev. *C Page 2 of 11
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CY62128B
MoBL
®
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Current into Outputs (LOW).........................................20 mA
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.....................................................> 200 mA
Operating Range
Power Applied.................................. ... ........–55°C to +125°C
Supply Voltage on V
DC Voltage Applied to Outputs
in High-Z State
[3]
DC Input Voltage
to Relative GND
CC
................................. .. .–0.5V to V
[3]
.................................–0.5V to VCC + 0.5V
[3]
....–0.5V to +7.0V
CC
+ 0.5V
Range
Commercial 0°C to +70°C 5V ± 10%
Industrial –40°C to +85°C5V ± 10%
Automotive –40°C to +125°C5V ± 10%
Electrical Characteristics Over the Operating Range
CY62128B-55 CY62128B-70
Parameter Description T est Conditions
V
OH
V
OL
V
IH
V
IL
I
IX
Output HIGH Voltage VCC = Min., IOH = –1.0 mA 2.4 2.4 V
Output LOW Voltage VCC = Min., IOL = 2.1 mA 0.4 0.4 V
Input HIGH Voltage 2.2 V
Input LOW Voltage
Input Load Current GND ≤ VI ≤ V
[3]
CC
Min. Typ.
–0.3 0.8 –0.3 0.8 V
–1 +1 –1 +1 µA
Automotive
I
OZ
I
OS
I
CC
I
SB1
I
SB2
Notes:
3. V
IL
4. T
is the “Instant On” case temperature.
A
5. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
Output Leakage
Current
Output Short Circuit
[5]
Current
VCC Operating
Supply Current
Automatic CE
Power-down Current
—TTL Inputs
Automatic CE
Power-down Current
—CMOS Inputs
(min.) = –2.0V for pulse durations of less than 20 ns.
GND ≤ VI ≤ VCC,
Output Disabled
VCC = Max., V
VCC = Max.,
= 0 mA,
I
OUT
f = f
MAX
= 1/t
Max. VCC,
CE
≥ V
1
or CE2 < VIL,
V
≥ VIH or
IN
V
≤ VIL, f = f
IN
Max. VCC,
CE
≥ VCC – 0.3V,
1
≤ 0.3V,
or CE
2
V
≥ VCC – 0.3V,
IN
or V
≤ 0.3V, f = 0
IN
–1 +1 –1 +1 µA
Automotive
= GND –300 –300 mA
OUT
Industrial,
Commercial
RC
Automotive
Industrial
IH
Commercial
Automotive
MAX
Industrial
Commercial
Automotive
[2]
7.5 20 6 15 mA
0.1 20.11mA
2.5 15 2.5 15 µA
Ambient
Temperature (TA)
Max. Min. Typ.
2.2 V
CC
+ 0.3
–10 +10 µA
–10 +10 µA
[4]
[2]
Max.
CC
+ 0.3
V
CC
Unit
V
625mA
0.1 2 mA
2.5 25 µA
Document #: 38-05300 Rev. *C Page 3 of 11
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CY62128B
MoBL
®
Thermal Resistance
[6]
Parameter Description Test Conditions 32 SOIC 32 TSOP 32 STSOP 32 RTSOP Unit
Θ
Θ
Capacitance
Thermal Resistance
JA
(Junction to Ambient)
Thermal Resistance
JC
(Junction to Case)
[6]
T est conditions follow standard test
methods and procedures for
measuring thermal impedance, per
EIA / JESD51.
66.17 97.44 105.14 97.44 °C/W
30.87 26.05 14.09 26.05 °C/W
Parameter Description Test Conditions Max. Unit
C
IN
C
OUT
Input Capacitance TA = 25°C, f = 1 MHz,
V
= 5.0V
Output Capacitance 9 pF
CC
9pF
AC Test Loads and Waveforms
5V
OUTPUT
100 pF
INCLUDING
JIG AND
SCOPE
Equivalent to: THÉVENIN EQUIVALENT
OUTPUT
R1 1800
(a)
Ω
639Ω
R2
990
OUTPUT
Ω
1.77V
5V
5 pF
INCLUDING
JIG AND
SCOPE
R1 1800Ω
(b)
R2
990Ω
V
CC
GND
Rise TIme:
1 V/ns
ALL INPUT PULSES
90%
10%
90%
10%
Fall TIme
1 V/ns
Data Retention Waveform
DATA RETENTION MODE
2 V
VDR
>
CE
V
CC
1
VCC, min.
t
CDR
or
CE
2
Data Retention Characteristics
(Over the Operating Range for “LL” version only)
Parameter Description Conditions Min. Typ. Max. Unit
V
DR
I
CCDR
t
CDR
t
R
Note:
6. Tested initially and after any design or process changes that may affect t hese parameters.
VCC for Data Retention 2.0 V
Data Retention Current V
= V
CC
or CE
0.3V
= 2.0V, CE1 ≥ VCC – 0.3V,
DR
≤ 0.3V, VIN ≥ VCC – 0.3V or, VIN ≤
2
Chip Deselect to Data Retention
Time
Operation Recovery Time 70 ns
VCC, min.
t
R
1.5 15 µA
0ns
Document #: 38-05300 Rev. *C Page 4 of 11
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