Cypress CY62126EV30 User Manual

MoBL

®

,CY62126EV30

1-Mbit (64K x 16) Static RAM

Features

Note

1. For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines.

Logic Block Diagram

Functional Description

■ High speed: 45 ns

■ Temperature ranges
❐ Industrial: –40°C to +85°C

❐ Automotive: –40°C to +125°C

■ Wide voltage range: 2.2V to 3.6V

■ Pin compatible with CY62126DV30

■ Ultra low standby power
❐ Typical standby current: 1 μA

❐ Maximum standby current: 4 μA

■ Ultra low active power
❐ Typical active current: 1.3 mA at f = 1 MHz

■ Easy memory expansion with CE and OE features

■ Automatic power down when deselected

■ CMOS for optimum speed and power

■ Offered in Pb-free 48-ball VFBGA and 44-pin TSOP II

packages

The CY62126EV30 is a high performance CMOS static RAM
organized as 64K words by 16 bits

[1]

. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL®) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device in standby mode reduces power consumption by more
than 99 percent when deselected (CE
output pins (IO
state when:

■ Deselected (CE HIGH)

■ Outputs are disabled (OE HIGH)

■ Both Byte High Enable and Byte Low Enable are disabled

(BHE

, BLE HIGH)

■ Write operation is active (CE LOW and WE LOW)

through IO15) are placed in a high impedance

0

HIGH). The input and

To write to the device, take Chip Enable (CE) and Write Enable

) inputs LOW. If Byte Low Enable (BLE) is LOW, then data

(WE
from IO pins (IO
specified on the address pins (A
Enable (BHE

through IO7) is written into the location

0

) is LOW, then data from IO pins (IO8 through IO15)

through A15). If Byte High

0

is written into the location specified on the address pins (A
through A15).

To read from the device, take Chip Enable (CE
Enable (OE
Byte Low Enable (BLE

) LOW while forcing the Write Enable (WE) HIGH. If

) is LOW, then data from the memory
location specified by the address pins appear on IO
Byte High Enable (BHE
appears on IO
complete description of read and write modes.

to IO15. See the “Truth Table” on page 9 for a

8

) is LOW, then data from memory

) and Output

to IO7. If

0

0

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 38-05486 Rev. *E Revised January 5, 2009

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®

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Pin Configurations

Notes

2. NC pins are not connected on the die.

3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V

CC

= V

CC(typ)

, TA = 25°C.

Figure 1. 44-Ball VFBGA (Top View) Figure 2. 44-Pin TSOP II (Top View)

Table 1. Product Portfolio

Power Dissipation

Product Range

VCC Range (V)

Min Typ

[3]

Speed

(ns)

Max Typ

Operating, I

CC

(mA)

f = 1 MHz f = f

[3]

Max Typ

[3]

CY62126EV30LL Industrial 2.2 3.0 3.6 45 1.3 2 11 16 1 4
CY62126EV30LL Automotive 2.2 3.0 3.6 55 1.3 4 11 35 1 30

[2]

max

Max Typ

Standby, I

[3]

SB2

Max

(μA)

Document #: 38-05486 Rev. *E Page 2 of 13

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Maximum Ratings

Notes

4. V

IL(min)

= –2.0V for pulse durations less than 20 ns.

5. V

IH(max)

= VCC+0.75V for pulse durations less than 20 ns.

6. Full device AC operation assumes a 100 μs ramp time from 0 to V

cc

(min) and 200 μs wait time after V

cc

stabilization.

7. Only chip enable (CE

) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the I

SB2

/ I

CCDR

spec. Other inputs can be left floating.

Exceeding maximum ratings may shorten the battery life of the
device. These user guidelines are not tested.

Storage Temperature ................................. –65°C to +150°C

Ambient Temperature with

Power Applied ............................................ –55°C to +125°C

Supply Voltage to Ground

Potential.................................–0.3V to 3.6V (V

DC Voltage Applied to Outputs
in High-Z State

[4, 5]

................–0.3V to 3.6V (V

CCmax

CCmax

+ 0.3V)

+ 0.3V)

Electrical Characteristics (Over the Operating Range)

DC Input Voltage

[4, 5]

...............−0.3V to 3.6V (V

CCmax

+ 0.3V)

Output Current into Outputs (LOW)............................. 20 mA

Static Discharge Voltage.......................................... > 2001V

(MIL-STD-883, Method 3015)

Latch up Current.................................................... > 200 mA

Operating Range

Device Range

Ambient

Tem per atur e

CY62126EV30LL Industrial –40°C to +85°C 2.2V to

Automotive –40°C to +125°C

V

CC

3.6V

[6]

Parameter Description Test Conditions

V

V

V

V

I

IX

I

OZ

I

CC

I

SB1

I

SB2

OH

OL

IH

IL

[7]

Output HIGH Voltage IOH = –0.1 mA 2.0 2.0 V

= –1.0 mA, V

I

OH

> 2.70V 2.4 2.4 V

CC

Output LOW Voltage IOL = 0.1 mA 0.4 0.4 V

= 2.1mA, V

I

OL

Input HIGH Voltage V

Input LOW
Voltage

= 2.2V to 2.7V 1.8 V

CC

= 2.7V to 3.6V 2.2 V

V

CC

V

= 2.2V to 2.7V –0.3 0.6 –0.3 0.6 V

CC

= 2.7V to 3.6V –0.3 0.8 –0.3 0.8 V

V

CC

Input Leakage Current GND < VI < V
Output Leakage

Current
VCC Operating Supply

Current

Automatic CE Power
down Current
—CMOS Inputs

Automatic CE Power
down Current
—CMOS Inputs

GND < VO < VCC, Output
Disabled

f = f

= 1/t

max

f = 1 MHz 1.3 2.0 1.3 4.0

CE > V
V

IN

f = f
f = 0 (OE
V

CC

− 0.2V,

CC

> V

– 0.2V, V

CC

(Address and Data Only),

max

, BHE, BLE and WE),

= 3.60V

CE > VCC – 0.2V,
V

> VCC – 0.2V or VIN < 0.2V,

IN

f = 0, V

= 3.60V

CC

> 2.70V 0.4 0.4 V

CC

CC

RCVCC

= V

I

= 0 mA

OUT

CMOS levels

< 0.2V)

IN

CCmax

45 ns (Industrial) 55 ns (Automotive)

Min Typ

[1]

Max Min Typ

+ 0.3 1.8 V

CC

+ 0.3 2.2 V

CC

[1]

CC

CC

Max

+ 0.3 V
+ 0.3 V

Unit

–1 +1 –4 +4 μA
–1 +1 –4 +4 μA

11 1 6 11 35 mA

14 135μA

14 130μA

Capacitance

For all packages. Tested initially and after any design or process changes that may affect these parameters.

Parameter Description Test Conditions Max Unit

C

IN

C

OUT

Document #: 38-05486 Rev. *E Page 3 of 13

Input Capacitance TA = 25°C, f = 1 MHz, VCC = V
Output Capacitance 10 pF

CC(typ)

10 pF

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Thermal Resistance

VCC

V

CC

OUTPUT

R2

30 pF

INCLUDING

JIG AND

SCOPE

GND

90%

10%

90%

10%

Rise Time = 1 V/ns

Fall Time = 1 V/ns

OUTPUT V

TH

Equivalent to: THÉVENIN EQUIVALENT

ALL INPUT PULSES

R

TH

R1

V

CC(min)

V

CC(min)

t

CDR

VDR> 1.5V

DATA RETENTION MODE

t

R

V

CC

CE

Notes

8. Tested initially and after any design or process changes that may affect these parameters.

9. Full device AC operation requires linear V

CC

ramp from V

DR

to V

CC(min)

> 100 μs.

Tested initially and after any design or process changes that may affect these parameters.

Parameter Description Test Conditions

Θ

JA

Θ

JC

Parameters 2.2V - 2.7V 2.7V - 3.6V Unit

Thermal Resistance
(Junction to Ambient)

Still Air, soldered on a 4.25 x 1.125 inch,
two-layer printed circuit board

Thermal Resistance
(Junction to Case)

Figure 3. AC Test Loads and Waveforms

R1 16600 1103 Ohms
R2 15400 1554 Ohms

R

TH

V

TH

8000 645 Ohms

1.2 1.75 Volts

VFBGA

Package

TSOP II

Package

58.85 28.2 °C/W

17.01 3.4 °C/W

Unit

Data Retention Characteristics

Over the Operating Range

Parameter Description Conditions Min Typ

V

DR

[7]

I

CCDR

[8]

t

CDR

[9]

t

R

Document #: 38-05486 Rev. *E Page 4 of 13

VCC for Data Retention 1.5 V
Data Retention Current VCC= VDR, CE > VCC – 0.2V,

V

> VCC – 0.2V or VIN < 0.2V

IN

Chip Deselect to Data
Retention Time

Operation Recovery Time t

Figure 4. Data Retention Waveform

[1]

Max Unit

Industrial 3 μA

Automotive 30 μA

0ns

RC

ns

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