Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by
and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty
provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, transla tion, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. C yp ress reserves the right to make changes without further notice to the materials described
herein. Cypress does not assume any liability arising out of the applica tion or use of any product or circuit described herein.
Cypress does not authorize its products for use as critical components in life-support systems whe re a malfunction or failure
may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all
charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
PSoC® is a registered trademark of Cypress Semiconductor Corporation. All products and company names mentioned in this
document may be the trademarks of their respective holders.
Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the
Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard
Specification as defined by Philips. As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors.
Flash Code Protection
Cypress products meet the specifications contained in their particular Cypress PSoC Data Sheets. Cypress believes that its
family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used.
There may be methods, unknown to Cypress, that can breach the code protecti on features. Any of these methods, to our
knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the prod uct as "unbreakable."
Cypress is willing to work with the customer who is concerned about the inte grity of their code. Co de prot ection i s constantly
evolving. We at Cypress are committed to continuously improving the code protection features of our products.
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Contents
1. Introduction5
1.1Introduction to the Cypress PLC Solution....................................................................5
1.2Using the Cypress PLC Solution .................................................................................5
A.3Bill of Materials..........................................................................................................37
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1.Introduction
1.1Introduction to the Cypress PLC Solution
Cypress’s Powerline Communication Solution (PLC) enables transmission of command and control
data over high voltage and low voltage powerlines. This solution is developed for low bandwidth
powerline communication.
The CY3273 PLC Low Voltage (LV) Evaluation Board demonstrates the ability of the Cypress
CY8CPLC10 to transmit data at 2400 bps over low voltage (12 V to 24 V AC/DC) powerlines.
This guide includes the following chapters:
■ Chapter 1 provides a brief overview of the Cypress PLC solution. It describes the contents of the
CY3273 evaluation kit and lists additional requirements to run the code examples, which are
included as part of the kit.
■ Chapter 2 gives the functional and high level hardw ar e descr ip tion of th e Cyp re ss PLC LV
boards. It also describes the setup and operating procedure of the PLC LV board. It describes
features such as manual addressing, connection of USB-I2C bridge, and jumper settings with
examples.
■ The Appendix contains the schematics, layout, and bill of materials.
1.2Using the Cypress PLC Solution
Powerlines are one of the most widely available communication media in the world. The
pervasiveness of powerlines makes it difficult to predict its characteristics and noise. Becaus e o f th e
variable quality of powerline, implementing robust communication over powerline has been an
engineering challenge for years. With this in mind, the Cypress PLC solution is designed to enable
secure, reliable, and robust communication over powerline. Some of the features of Cypress PLC
are:
■ Integrated powerline PHY modem with optimized amplifiers to work with rugged low voltage
powerlines.
■ Powerline optimized network protocol that supports bidirectional communication with
acknowledgement based signaling and multiple retries.
■ Support for 8-bit packet CRC and 4-bit header CRC for error detection and data packet
retransmission.
■ Carrier Sense Multiple Access (CSMA) scheme that minimizes collisions between packet
transmissions on the powerline.
The Cypress PLC solution consists of three key elements as shown in Figure 1-1.
■ Powerline network protocol layer
■ Physical layer frequency shift keying (FSK) modem
■ Power amplification and coupling circuits
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Introduction
CY8CPLC10
Application
Circuitry
PSoC/
External µC
Powerline
Network Protocol
Powerline FSK
Modem PHY
AC/DC Powerline
Coupling Circuit (110 V-
240 V AC, 12 V-24 V
AC/DC, etc)
Host System
Powerline Communication Solution
I2C Packet
Powerline
Figure 1-1. Cypress PLC Solution Block Diagram
The powerline network protocol layer and physical layer FSK modem are implemented on the
CY8CPLC10 device. The power amplification and coupling circuits are built using discrete
components. The CY3273 board contains the CY8CPLC10 device along with the power
amplification and coupling circuit for communicating on low voltage (12 to 24 V AC/DC) powerlines.
For a detailed description of the design parameters for the circuit, refer to application note Cypress
Powerline Communication Board Design Analysis - AN55427.
The CY8CPLC10 device is controlled by an external host microcontroller through an I
To evaluate this kit, an external host must be created.
■ The first option is to use a PC to install and run the Cypress PLC Control Panel GUI, which is
■ The second option is to use an external microcontroller that runs a host application. The applica-
Note To evaluate this kit, a second low voltage PLC kit is required. The compatible kits are CY3273
(this kit) and CY3275 Low Voltage PLC Development Kit. For information on these kits , visit
http://www.cypress.com/go/CY3273 and http://www.cypress.com/go/CY3275. For details on how to
program CY3275 boards with an I2C-PLC interface, refer to appendix A.2 of PLC Control Panel GUI
User Guide.
2
C interface.
included with this kit. The PC interfaces to the CY3273 board through the CY3240-I2USB Bridge
that is included with this kit. Steps for setting up this system are provided in the quick start guide
that is provided in the kit.
tion note, “AN52478 - Designing an external Host Application for Cypress's Powerline Communi-
cation IC CY8CPLC10, provides a code example that can be programmed on a PSoC
microcontroller board (in this case, the CY3210-PSoCEVAL1) and explains how to interface it to
the CY3273 board. This application note is provided with this kit.
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1.3Kit Contents
The PLC LV evaluation kit consists of the following:
■ CY3273 quick start guide
■ CY3273 PLC LV evaluation board
■ Five CY8CPLC10-PVXI samples
■ CD containing:
❐ CY8CPLC10 data sheet
❐ Packet test softwa re – PLC control panel application
❐ PLC Control Panel Release Notes
❐ CY3273 Release Notes
❐ CY3273 evaluation board user guide
❐ CY3273 board Altium design project
❐ CY3273 board schematics, layout, and BOM
❐ Application note – Designing an external Host Application for Cypress's Powerline Communi-
cation IC CY8CPLC10 - AN52478
■ 12 V power supply
■ Daisy chain cable
■ USB-I2C Bridge
■ Ribbon cable for I
■ Retractable USB cable
2
C communication, external reset, and po we rin g exte rn al bo a rd
Introduction
1.4Additional Learning Resources
Visit http://www.cypress.com/go/plc for additional learnin g resources in the form of dat asheet s, technical reference manuals, and application notes.
■ CY3273 Schematic.pdf
http://www.cypress.com/?rID=38025
■ CY3273 Board Layout.zip
http://www.cypress.com/?rID=38025
■ CY3273 Kit documentation
http://www.cypress.com/go/CY3273
■ For a list of PSoC Designer-related trainings, see
http://www.cypress.com/?rID=40543
■ CY8CPLC10 datasheet
http://www.cypress.com/?rID=38236
■ For more information regarding PSoC Designer functionality and relea ses, refer to the user guide
and release notes on the PSoC Designer web page:
www.cypress.com/go/psocdesigner
■ For more information regarding PSoC Programmer, supported hardware, and COM layer, go to
the PSoC Programmer web page:
www.cypress.com/go/psocprogrammer
■ Designing an External Host Application for Cypress's Powerline Communication IC CY8CPLC10
- AN52478
http://www.cypress.com/?rID=37956
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Introduction
1.5Additional Requirements
The following Cypress demonstration kit is used in the example applications in this user guide. This
kit is available for purchase from http://www.cypress.com/go/CY3210-PSoCEVAL1.
CY3210-PSoCEval1 Kit
This PSoC Evaluation Kit features an evaluation board and MiniProg1 programming unit. The
evaluation board includes an LCD module, potentiometer, LEDs, and plenty of bread boarding space
to meet all your evaluation needs. The MiniProg1 programming unit is also included with the kit. It
programs PSoC devices directly on the evaluation board, or on other boar ds through a 5-p in heade r.
This programming unit is small and compact, and connect s to a PC through the USB 2 .0 cable that is
provided.
The kit includes:
■ Evaluation board with LCD module
■ MiniProg1 programming unit
■ PSoC Designer software CD
■ 28-pin CY8C29466-24PXI PDIP PSoC device sample
■ USB 2.0 cable
■ Getting Started guide
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Added Software Installation, Code Examples, and Technical Reference
sections. Added schematic in Section 2.3. Added references to the
compatible low voltage PLC kits. Added a reference to the quick start
guide for evaluation. Added clarifications to the text throughout.
Removed reference to CY3277 and CY8CLED16P01. Added Getting
Started Section
1.7Documentation Convent ions
Table 1-2. Document Conventions for Guides
ConventionUsage
Courier New
Italics
[Bracketed, Bold]
File > Open
Bold
Times New Roman
Text in gray boxesDescribes cautions or unique functionality of the product.
Displays file locations, user entered text, and source code:
C:\ ...cd\icc\
Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Designer User Guide.
Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
Represents menu paths:
File > Open > New Project
Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Displays an equation:
2 + 2 = 4
Introduction
Description of Change
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Introduction
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2.Getting S tarted
This chapter describes how to install and configure the CY3273 - LV PLC Evaluation Kit.
2.1Kit Installation
To install the kit software, follow these steps:
1. Insert the kit CD in your PC’s CD drive. The CD is designed to auto-run and the Kit Installer Startup Screen appea rs.
2. Click Install CY3273 Low Voltage PLC Kit to start the installation.
Figure 2-1. Kit Installer Startup Screen
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Getting Started
Note If auto-run does not execute, double-click the cyautorun.exe file on the root directory of the CD.
Figure 2-2. Root Directory of CD
3. The CY3273 - LV PLC Evaluation - InstallShield Wizard screen appears. Choose the folder
location to install the setup files. You can change the location of the folder using Change.
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Getting Started
5. On the Product Installation Overview screen, select the installation type that best suits your
requirement. The drop-down menu has the options Typical, Complete, and Custom.
6. Click Next to start the installation.
Figure 2-4. Installation Type Options
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Getting Started
7. When the installation begins, a list of all packages appears on the Installation Page.
8. A green check mark appears next to every package that is downloaded and installed.
9. Wait until all the packages are downloaded and installed successfully.
Figure 2-5. Installation Page
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10.Click Finish to complete the installation.
Figure 2-6. Installation Completion Page
Getting Started
2.2Software Installation
2.2.1Before You Begin
All Cypress software installations require administrator privileges; however, this is not required to run
the installed software.
■ Shut down any Cypress software that is currently running.
■ Disconnect any Cypress devices (USB-I2C bridge, ICE Cube, or MiniProg) from your computer.
2.2.2Prerequisites
The PLC Control Panel requires the latest versions of Microsoft .NET Framework, Adobe Acrobat
Reader, and a Windows Installer. If your computer does not have .NET Framework and Windows
Installer, the installation automatically installs it. However, if your computer does not have Adobe
Acrobat Reader , download and install it from the Adobe website.
2.2.3Installing PLC Control Panel Software
The PLC Control Panel GUI is installed as a prerequisite when you install the CY3273 PLC LV Evaluation kit. Follow the steps on the screen to complete the installation.
If you need to reinstall this application, select Install PLC Control Panel GUI from the installation
screen, as shown in Figure 2-1 on page 11.
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Getting Started
Click Start > All Programs > Cypress > PLC Control Panel > PLC Control Panel.
The PLC Control Panel application controls the CY3273 PLC LV Evaluation Kit over USB interface
from a PC. The application's startup display, when a board attached and operating, is shown in the
following figure.
Figure 2-7. PLC Control Panel Application
After installing PLC Control Panel, refer to the documentation as needed:
■ <CD Drive>\ Software\PLC Control Panel\PLC Control Panel Release Notes.pdf
■ <CD Drive>\ Software\PLC Control Panel\ User Guide for Cypress PLC Control Panel GUI.pdf
The PLC Control Panel user guide is also availab le in the installation directory. It contains information about installation and how to set up the kit to work with the GUI. You can also access it from the
Help menu in the PLC Control Panel GUI.
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3.PLC LV Evaluation Board
3.1Features
The key features of the CY3273 evaluation board are:
■ Chip power supply derived from 12 V to 24 V AC/DC
■ LED status indicators for power, powerline transmit and receive, and band in use
■ Five-position DIP switches
❐ Three DIP switches for node logical address selection
❐ One DIP switch to configure node I
❐ One DIP switch to select between the external crystal and oscillator
■ Integrated powerline modem PHY
3.2Functional Overview
2
C addressing mode
The PLC evaluation board is designed as an advanced evaluation, testing, and product development
platform for low bandwidth (2400 bps) powerline communication.
Data to be transmitted is sent to the CY8CPLC10 through the I
from a host microcontroller.
The CY8CPLC10 receives this I
board FSK modem modulates this packet and the coupling circuitry incorporates the resulting
sinusoidal waveform on to the existing waveform on the high voltage powerline bus.
C data and encapsulates it into a PLC network packet. The on-
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PLC LV Evaluation Board
3.3Hardware Description
The key sections of the low volt ag e PL C evaluation boar d are highlighted in Figure 3-1. The board is
divided into four main sections:
■ Power supply circuit
■ Transmit amplifier
■ Transmit and receive coupling circuit section
■ Cypress powerline transceiver and user controls
Figure 3-1. Top View of Cypress PLC LV Evaluation Board
The communication signal flow on this LV board is:
Transmit: CY8CPL10 TX Pin → Power Amplifier Circuitry → LV PLC Circuitry → LV Powerline (12 V
to 24 V AC/DC)
Receive: LV Powerline (12 V to 24 V AC/DC) → LV PLC Circuitry → Passive Low Pass Filtering →
VDD/2 Biasing → CY8CPLC10 RX Pin
The core of the PLC LV board is the CY8CPLC10 chip. The board contains an I
2
C connector,
jumpers to control various functions, and a five-position DIP switch.
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3.3.1Power Supply Circuit
This section takes the power from the powerline and generates necessary low DC voltage for the
operation of the PLC transceiver and other components on the chip.
The key components in this section are listed in the following table.
Table 3-1. Power Supply
ComponentDescription
J4This is the connector to hook up the power adapter.
U75 V regulator.
J1
DS1This is a blue LED that glows when the board is powered on.
L4
The key components are circled in the following schematic.
Figure 3-2. Power Supply Schematic
This is a 2-pin header to connect other boards in daisy chain and power them. The cable to
do this is provided with the kit. Connect a maximum of five boards in one daisy chain.
This inductor blocks any high frequency power supply noise from disrupting the line. It also
minimizes any effect of loading from the power supply on the PLC signal.
PLC LV Evaluation Board
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PLC LV Evaluation Board
3.3.2Transmit Amplifier Circuit
This section takes the output signal from the transceiver chip. The circuit here amplifies the signal
for transmission over the powerline.
The key components in this section are listed in the following table.
Table 3-2. Transmit Amplifier
ComponentDescription
U1, Q3, Q2This opamp and high gain transistors are used in the power amplification stage.
Q1
The key components are circled in the following schematic.
Figure 3-3. Transmit Amplifier Schematic
This transistor controls whether transmission is allowed based on the output of the
TXDISABLE pin
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3.3.3Transmit and Receive Coupling Circuit
This circuit couples the signal from the board on to the powerline. On the receive side, the same circuit couples the carrier on the powerline to the board, rejecting the low frequency power and noise
on the powerline.
The key components in this section are listed in the following table.
Table 3-3. Transmit and Receive Coupling Circuit
ComponentDescription
L2
L3
C30
The key components are circled in the following schematic.
Figure 3-4. Transmit Amplifier Schematic
This inductor blocks very high frequency signals (for example, FM radio ) and offsets the
impedance of capacitor C30, so as to have a lower transmit impedance.
This inductor, along with C30, filters out low frequency signals (for example, 50/60 Hz AC or
DC power) and presents a high impedance to the 132 kHz PLC signal.
This is the coupling capacitor that couples the PLC signal and blocks the low frequency signals. Its voltage rating must be higher than the voltage on the powerline..
PLC LV Evaluation Board
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3.3.4Cypress Powerline Communication Transceiver and User Controls
This section is the heart of the board. It has the CY8CPLC10 chip, which has the integrated
transceiver modem and network protocol. It also has the I
external host processor. The DIP switches to control the addresses and the jumpers to control the
functionality of the chip are a lso located here. The red, blue, yellow, and green LEDs indicat e the
status of the board when functioning. The key components and their use are as follows:
Table 3-4. Transceiver and User Controls
ComponentDescription
CY8CPLC10This is Cypress’s powerline transceiver device. It is a 28-pin SSOP device.
Tx LED[DS2]This is a green LED that glows when the board is transmitting data on to the powerline.
Rx LED[DS3]This is a red LED that glows when the CY8CPLC10 device is receiving data.
BIU LED [DS5]This is a yellow LED that glows when the transmit frequency band is in use.
S1Reset switch to reset the CY8CPLC10 device.
These dip switches are used to set up the logical address of the node in the network. This
S2[3-5]
S2[2]
S2[1]
Y1
is an easy way for you to quickly assign an address from 0 to 7 to the board in a network.
S1[3] is MSB and S1[5] is LSB for logical address assignment.
This dip switch sets the I
cessor. Setting the switch to OFF or ON sets the I
respectively.
This dip switch controls the clock setting to the CY8CPLC10. Setting the switch to 0 or 1
sets the FSK modem clock to external 32 kHz crystal or external 24 MHz oscillator,
respectively. Note that the external crystal is always required for protocol timing.
This 32.768 kHz crystal is required for establishing the correct protocol timing and communication signal frequencies of the CY8CPLC10.
2
C slave address to establish the communication with a host pro-
2
C header to communicate with the
2
C address to external 0×01 or 0×7a
The key components are circled in the following schematic.
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Figure 3-5. Transmit Amplifier Schematic
PLC LV Evaluation Board
3.4Setting Up the PLC LV Board
This section describes the components of the PLC evaluation board, the process of setting manual
addresses on the PLC LV board and the connection of USB-I2C Bridge and I
header on the board.
3.4.1I2C Header Settings
J8 is a five-pin header that can be used for communicating with an external board, powering an
external board, and resetting the CY8CPLC10 device from an external board. A five wire ribbon
cable provided with the CY3273 kit can be used to connect to J8. The following table describes the
J8 header pins.
2
C cable to the I2C
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PLC LV Evaluation Board
Table 3-5. J8 I2C Header Pins
J8 Pin NameDescription
V – Vdd
G – Gnd
D – I2C Data (SDA)
C – I2C Clock (SCL)
R – Reset
The VDD pin can provide a maximum of 50 mA at 5 V to an external board. It is only
to source the current. Do not supply power to this pin for powering the CY8CPLC10
device. Note that the PWR jumper, as explained in the next section, needs to be
connected to enable this functionality.
The Gnd pin can provide the ground reference to an external board. This pin connects to the ground of the CY3273 board.
2
C data (SDA) pin is the data line for the I2C communication. This pin is
The I
directly connected to the I2C_SDA pin on the CY8CPLC 10 device. Check the next
section for appropriate jumper settings for I
2
C clock (SCL) pin is the clock line for the I2C communication. This pin is
The I
directly connected to the I2C_SCL pin on the CY8CPLC10 device. Check the next
section for appropriate jumper settings for I
Connecting the reset of an external board to this pin enables the resetting of the
CY8CPLC10 device through the external board. Note that the RES jumper, as
explained in the next section, must be connected to enable this functionality.
2
C communication through this pin.
2
C communication through this pin.
Figure 3-6. I
2
C Header for Communication
3.4.2Setting Up Manual Addressing on PLC Boards
The PLC evaluation board contains a five-position DIP switch. The first three switches S2[3-5] are
used to manually set a logical address for the PLC chip. Logical addresses for up to eight nodes can
be set up using these DIP switches.
S2[3] is the MSB. S2[5] is the LSB. Set the DIP switch to the ON position for the particular bit to be
logic ‘1’ and OFF position for it to be logic ‘0’. For example, for setting the logical address of 0X06
(see Figure 3-7):
S2[5] → OFF = 0
S2[4] → ON = 1
S2[3] → ON = 1
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Figure 3-7. DIP Switches for Manual Addressing on the PLC Evaluation Boards
Note that the powerline network protocol supports 8-bit logical addressing, 16-bit extended logical
addressing, and 64-bit physical addressing; all of th ese are supported through software. An external
host or PSoC microcontroller can talk to the CY8CPLC10 internal memory map to set the appropriate mode and write a particular logical address.
Manual addressing is an easy method to quickly assign a particular address between 0 and 7 to the
board, which may be a node in a network.
Note After changing the address of the node, press the RESET button on the PLC LV board for the
change to take effect.
3.4.3Setting Up the I2C Address of the Node
PLC LV Evaluation Board
S2[1] dip switch is used to assign a specific I2C address to the node to communicate with the external microcontroller/PSoC or USB-I2C bridge. When the S2[1] switch is in the OFF position, the
address of the node is 0x01 and when the position is ON, the address of the node is 0x7A. For fur-
ther details on I
2
C addressing, refer to the data sheet available on the CD.
3.4.4Jumper Settings for the PLC LV Boards
Figure 3-8. Six Jumpers Available on Board
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PLC LV Evaluation Board
Table 3-6. Jumper Description
Jumper NameUse
INT
PWR
RES
SCL
SDA
CLKThis jumper is not available for use and should be left unconnected by the user.
This is not a jumper. It is a 2-pin header to connect the interrupt pin of the CY8CPLC10
device to an external host. Refer to the CY3273 board schematics to determine interrupt
and ground pins for this header.
This jumper should be connected if the user wants to provide power to an external board.
After this jumper is connected, power for the external board can be derived from the V
) and G (Gnd) connectors on the I2C header (J5). For example, if we connect
(V
DD
another PSoC EVAL1 board with this board, the PLC board can supply power to that
board too. The CY3273 board can provide a maximum of 50 mA at 5 V to an external
board through the V and G pins on the I2C header (J5).
This jumper is for enabling reset of the PLC device through an external board. After this
jumper is connected, the external board reset can be connected to the R (Reset) pin on
2
C header (J8).
the I
This is a pull up jumper. While communicating through I
the line. When the jumper is connected, the SCL line gets pulled high. This needs to be
done when the user wants the I
This jumper does not need to be placed if the USB-I2C bridge is used for communication
to the host.
This is a pull up jumper. While communicating through I
the line. When the jumper is connected, the SDA line is pulled high. This must be done
when the user wants the I
This jumper does not need to be placed if the USB-I2C bridge is used for communication
to the host.
2
C link to be pulled up by the CY3273 board.
2
C link to be pulled up by the CY3273 board.
2
C (J8), one side has to pull up
2
C (J8), one side has to pull up
3.5Code Example
The CY3273 kit is designed for systems that require a communication interface over low voltage
powerlines. Typically, these systems consist of a microcontroller or processor along with other electronic components that implement the host application functionality. For more information on this
interface, refer to AN52478 - Designing an External Host Application for Cypress's Powerline Com-
munication IC CY8CPLC10.
3.6Technical Reference
For a real-time list of knowledge base articles for the CY3273 kit, refer to our Online Knowledge
Base. For any help with the installation of the Control Panel, refer to the Control Panel User Guide
provided in the kit CD. You can also download the latest revision of the GUI setup and user guide
from www.cypress.com/go/plc.
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A.Appendix
A.1Schematics
A.1.1Board Overview
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A.1.2User Interface
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A.1.3Transmit Amplification and Receive Filter
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A.1.4Power Supply
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A.2Layout
A.2.1Top Layer
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A.2.2Ground Layer
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A.2.3Power Layer
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A.2.4Bottom Layer
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A.2.5Top Silkscreen
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A.2.6Bottom Silkscreen
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