Cypress CY8C29x66, AN2309, CY8C24794 User Manual

Power Management - Low-Cost, Two-Cell

Li-Ion/Li-Pol Battery Charger with

Cell-Balancing Support

AN2309

Author: Oleksandr Karpin

Associated Project: Yes

Associated Part Family: CY8C24x23A, CY8C24794, CY8C27x43, CY8C29x66

TGET FREE SAMPLES HERETH

Software Version: PSoC Designer™ 5.0 SP1

Associated Application Notes: AN2107, AN2258, AN2267, AN2294

PSoC Application Notes Index

Application Note Abstract

This application note describes a low cost, two-cell Li-Ion/Li-Pol battery charger. An effective cell-balancing algorithm during
both charge and discharge phases is presented. This charger can be used either as a standalone application to charge a
battery pack with two serial connected Li-Ion/Li-Pol batteries or embedded in residential, office, and industrial applications.

Introduction

A modern portable system requires more operating voltage
than a single-cell Lithium-ion (Li-Ion) or Lithium-polymer (Li­Pol) battery can provide. A serial connection results in a
pack voltage equal to the sum of the cell voltages. To
increase the battery pack capacity, the cells are connected
in parallel. For many applications, two cells in series are
sufficient, with one or more cells in parallel. This
combination gives nominal voltage and the necessary power
for laptop computers and medical and industrial
applications. Problems can occur when the cells have
different capacities or charge levels. During charging or
discharging, the cells in the battery pack do not have
matched voltage every cell. Therefore, the battery pack is
not balanced. The unbalanced charge between cells causes
the following problems:

 Reduced overall battery pack capacity to the value of

the cell with the least capacity. During the charge
process, this cell reaches the maximum charge level
before the other cells, and during the discharge process
this cell is depleted before the other cells in the pack.

 Reduced overall battery pack life. The charge or

discharge of cells at different values increases pack
imbalance.

 Cell damage, which occurs if the charger monitors only

the summary voltage. For example, if the lower cell has
a capacity deficiency of at least 10 percent, its cell
voltage begins to rise into the dangerous area above

4.3 volts. This can result in additional degradation of the
cell or a safety system response that greatly reduces
pack capacity.

This application note describes a two-cell Li-Ion/Li-Pol
battery charger. An effective cell-balancing algorithm is
designed. It avoids the issues that appear in battery packs
with two cells in series. Through modification of the
configuration parameters, the cell-balancing algorithm can
easily be adapted for various applications and selected
batteries. The unique architecture of the PSoC
provides an integrated hardware solution for a two-cell
battery charger and a flexible μC-based, cell-balancing
algorithm with minimal external components at a very
affordable price. The CY8C24x23A PSoC device family
used in this implementation reduces the total device cost
even further.

When you want to use algorithms for the latest charging or
cell-balancing technologies, only the firmware needs to be
modified. PSoC Designer’s in-circuit and self-programming
capabilities make these operations simple.

Specifications for a two-cell Li-Ion/Li-Pol battery charger with
cell-balancing support are listed in Table 1 on page 2.

®

device

November 25, 2007 Document No. 001-17394 Rev. *B - 1 -

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Item

Item Value

Battery Charger Parameters

Built-In Battery Charger Type

Two-cell Li-Ion/Li-Pol battery charger

Power Supply Voltage

10…14V

Power Consumption

35 mA

Battery Current Measurement Error (Not Calibrated)

5 percent

Battery Voltage Measurement Error (After Calibration)

0.5 percent

Battery Thermistor Resistance Measurement Error

5 percent

User Interface

2 LEDs

PC Communication Interface

RS232

PC Communication Speed

115200

Cell-Balancing Parameters

Cell-Balancing Algorithms

1. During charge phase

2. During discharge phase

Cell-Balancing Configuration Parameters

Cell-balance circuit resistors nominal
Cell-balance interval parameter
Minimum cell-balance parameter for charge phase
Minimum cell-balance parameter for discharge phase
Minimum charge current value when cell balancing is allowed
VMID value for discharge phase (voltage of middle charged state)

Minimum Cell Balancing During Charge Phase

Equal to the voltage measurement error value (15 mV-30 mV)

Minimum Cell Balancing During Discharge Phase

Equal to the voltage measurement error value (15 mV-30 mV) plus the
internal impedance error (10 mV-30 mV)

12

QQ

cell cell

cellN

Q

Q I t C V

1 1 2 2

C V C V

cell cell cell cell

V

cellN

V

cellN

12

QQ

cell cell

1 1 2 2

C V C V

cell cell cell cell

V

cell

12

CC

cell cell

Table 1. Specifications for Two-Cell Li-Ion/Li-Pol Battery Charger with Cell-Balancing Support

AN2309

Cell-Balancing Foundation

This section describes the fundamentals of cell-balancing
techniques. Cells are considered balanced when:

Equation 1

The value
the charge is:

Therefore, Equation 1 can be transformed into the following
equation:

The value
charged cell. The

electrodes is fixed and does not change from cell to cell.
When two cells are unbalanced, the following is true:

November 25, 2007 Document No. 001-17394 Rev. *B - 2 -

is the charge of cell N. The equation for

Equation 2

Equation 3

is the electrochemical potential of the fully

potential is fixed for a given set of

Equation 4

Equation 5

However,

does not change from cell to cell.

Therefore, the cells are unbalanced if:

Equation 6

Equation 6 shows two cells that have different capacities,

which is one cause of cell imbalance. A difference in cell­charge levels, which can be identified by using Equation 4,
is the second cause of cell imbalance. For both kinds of
mismatches in the battery pack – different cell capacities
and difference cell charge levels – the highest voltage cell
shows relative charge redundancy and must be shunted
during the charging/discharging process. This is the heart of
the cell-balancing issue.

The main reasons for variation in cell capacity are:

 Variations in cell assembly. Today’s factory

manufacturing of cells produces Li-Ion battery backs
with cell capacity matched to three percent.

 Different rates in cell degradation. The self-degradation

rate is 30 percent at 500 cycles, which equals 0.06
percent per cycle. But individual cells degrade
differently depending on temperature, charge voltage,
and the particular self- degradation process. For
example, a cell with a lower capacity is exposed to a
higher charge voltage, which degrades it faster, further
reducing its capacity and increasing the pack
imbalance.

[+] Feedback

AN2309

Charger,

Monitor,

Safety,
Fuel Gauge,
Cell Balance

Software

Load

R1

R2

Q1

Q2

CELL1

CELL2

V

cellN

I

balN

RR

N QN

I I I

chargeN charge balN

I

balN

V

cellN

R

N

R

QN

I

chargeN

I

charge

()R R R

N QN load

R

dischargeN

R R R

N QN load

R

dischargeN

R

load

 Temperature gradient across the battery pack.

Temperature mismatches of 15 degrees Celsius can
cause up to 5- percent capacity differential among cells.
Such a temperature gradient is relatively common in
densely packed products, where multiple heat sources
are located close to the battery pack. An example of
this is a laptop computer.

The main causes of variation in cell charge levels are:

 Variations in self-discharge rates. Even at room

temperature, two similar cells self-discharge at different
rates, resulting in a mismatch. For example, one cell
could lose 3 percent per month, while another cell loses
a different amount.

 Variations in internal cell impedance. These impedance

variations cause otherwise similar battery cells to have
different charge acceptance levels. This error is minute
(about 0.1 percent).

Cell balancing is achieved by connecting a parallel load to
each cell that must be balanced. Typically, a series
combination of a power transistor (MOSFET) and a current­limiting resistor are connected in parallel to each cell. If a
cell has a higher voltage than the other cells, the bypass
load to the cell is connected by closing the MOSFET so that
a fraction of the charging current bypasses that cell. It is
possible to balance the cells during the discharge phase, the
charge phase, or both phases.

Balancing the charge levels among cells must be done
during the charge or discharge phase. This balancing
process is simple and has been well investigated. Balancing
the cells’ capacity variation must be done during both the
charge and discharge phases. Cells with different capacities
must be charged or discharged by using an absolute value
rather than a relative value. The process of balancing cell
capacity variation is difficult to implement in practice and is
not intuitively obvious.

The charge in dV/dQ for Li-Ion batteries has a maximum
level when the cells are nearly fully charged or discharged. It
takes less time to correct voltage mismatch during this
period of complete or nearly complete charge/discharge
than during the middle period of battery charge/discharge.
Thus, it is advisable to perform the balancing routine when
the cells are nearly fully charged or nearly fully discharged.
See also Cell-Balancing Algorithm on page 14. The cell­balancing technique is shown in Figure 1.

Figure 1. Cell-Balancing Technique Schematic

The balancing circuit is represented by (R1, Q1) and (R2,
Q2). These transistors and resistors dissipate energy and
control the amount of balancing current.

If cell balancing is performed during the charge phase, the
charge current on the balanced cells is reduced on the
shunted current value (Equation 7 and Equation 8) and
remains unchanged on other cells:

Equation 7

Equation 8

The value
balancing circuit of the cell N, and

electro chemical potential. The value
resistor, and

the battery pack charge current.
If cell balancing is performed during the discharge phase,

the current that flows through the balancing circuit depends
on the system load resistance. If the load resistance is high,
by comparison with a balancing circuit resistance, most of
the discharge current flows through the balancing circuit. But
if the load resistance is low, most of the discharge current
flows through the load, making the balancing operation less
efficient.

The current that flows through the balancing circuit is shown
in Equation 7 and the equivalent discharge resistance is
equated as:

The value
resistance of the balanced cell N, and

resistance.
Components for the cell-balancing circuit are selected by

taking the following factors into account:

is the current that flows through the

is the battery

is the balancing

is the transistor resistance. The value

is the charge current of cell N, and

is the equivalent discharge

is

Equation 9

is the load

November 25, 2007 Document No. 001-17394 Rev. *B - 3 -

 Amount of Imbalance: This factor is described earlier

in this section and consists of variations in capacity and
charge level. Typically, cell imbalance is about 1
percent. An imbalance as great as 5 percent to 15
percent can occur only with a high temperature gradient
or if a battery pack has been stored and not used for a
long period of time.

[+] Feedback

AN2309

b

V

P

bal

100%

b

CV

P

bal

2000 4.2 15%

1.26

100%

mAh V

PW

bal

100%

Cn

I

bal

2000 2 15%

600

100%

mAh

I mA

bal

4.2 /100 42I V mA

bal

4.2 0.042 0.1764P V A W

Legend:

Ich - Battery charge current
I

act

- Battery activation charge current, 0.1-0.2 CA

I

rap

- Battery rapid charge current, 0.7-1 CA
Vb - Battery voltage
Vrs - Rapid start voltage, typically 3 V/cell

- Constant-current / constant voltage switching point
V

max

- Emergency shutdown voltage, 4.3 V/cell

- Rapid charge termination current, typically 0.1 CA
T

rmax

- Battery rapid charge maximum temperature, 45 oС

T

rmin

- Battery rapid charge minimum temperature, 0 oC
Tb - Battery temperature
t

rch

- Rapid charge termination time

tcv - Constant voltage charge time

1

2

3
4

5
6

7

8

 Cell Balancing Time: If C is the cell capacity and

the battery voltage, and the requirement is to eliminate
the amount of imbalance (in percent) in one hour of

balancing time, then the power dissipation on balancing
circuit

is:

Equation 10

For example, balancing the cells for one hour with a
battery capacity of 2000 mAh and an imbalance of 15
percent results in the following approximate amount of
power dissipation on the balancing circuit:

Equation 11

Thus, there is a tradeoff between the rate of balancing
and power dissipation. Faster balancing provides more
options and flexibility, but it also results in increased
power dissipation, which increases cost and board
space. The one charge/discharge period can be
selected as a favorable time for cell balancing.

 Cell Capacity: If n is the count of cells connected in

parallel, C is the cell capacity, and is the amount of
imbalance in percent (capacity and charge level
variation), then the highest required balancing current

during one hour is the following:

Equation 12

For example, the initial balancing level is:

is

for most applications it is not necessary to use this
algorithm.

The cell-balancing technique is explained in detail in

AN2258, “Cell Balancing in a Multi-Cell Li-Ion/Li-Pol Battery

Charger.”

Two-Cell Battery Charger Hardware

Li-based batteries use a two-stage charge profile (activation
and rapid-charge). If the battery voltage is less than 2.9 to

3.0 volts per cell, the battery must be activated first. In the
activation stage, the battery is charged with a constant
current (0.05-0.15 CA, where CA is the nominal battery
capacity) until the battery voltage reaches a predefined
level. The activation charge time-out is set to 1.5 to 2 hours.
The activation charge can diagnose battery health and
identify troubles such as damaged or shorted cells.

The rapid-charge stage starts after the activation charge
finishes without error. This stage consists of two modes:
constant current and constant voltage. When the battery
voltage is less than the predefined level (4.1V or 4.2V
depending on battery type), the charge is processed in
constant current mode (0.5-1.0 CA). When the battery
voltage reaches this level, the charge source switches to
constant voltage mode and the charge process is terminated
when the current drops below a predefined limit (0.07-

0.2 CA).
The rapid-charge stage must be protected by time limits.

The rapid-charge time is limited to three hours. The charge
profile for Li-Ion/Li-Pol batteries is shown in Figure 2. The
technique to charge Li-Ion and Li-Pol batteries is explained
in detail in AN2107 “A Multi-Chemistry Battery Charger.”

Figure 2. Li-Ion/Li-Pol Battery Charge Profile

Equation 13

If the balancing circuit resistance is set to equal 100Ω,

then:

Equation 14

Equation 15

Using a four hour discharge time and a two hour charge
time during one complete discharge/charge cycle with full
time cell balancing on both phases, 42 mA*(4+2)=252 mA
is removed from one unbalanced cell. Therefore, the
balancing level from this example can be removed during
three discharge/charge cycles with a balancing circuit
resistance of 100Ω or during one complete cycle with 40Ω.

For maximum cell balancing, use a balancing circuit

resistance of 40Ω to 200Ω and perform cell balancing during

both charge and discharge phases. Note that the overnight
conditioning cell-balancing algorithm is not implemented in
this project. The reason is that the CY8C24xxxA device
used in this implementation does not have enough ROM
memory space. If you choose another PSoC device family
for the same project, the overnight conditioning cell­balancing algorithm can easily be added (see AN2258, “Cell
Balancing in a Multi-Cell Li-Ion/Li-Pol Battery Charger”). But

November 25, 2007 Document No. 001-17394 Rev. *B - 4 -

[+] Feedback

AN2309

PSoC internals

R23

R1

POWER+

INAMP

AMUX

Incremental

ADC

CPU

RS_TX

(For Debug

Only)

SERIAL_TX

R5

AMUX

Q1

PWM

Q2

T

Cell2

TIMERs

R11

Li-Ion

Battery

Pack

Cell1

Q5

R14

R17

R6

R7

C5

Vbias

R12

R13

C6

Vbias

R19

R18

C7

Vbias

R24

D1

R20 R21

R15 R16

POWER-

C8

bal2
bal1

bal2

bal1

VREF

Vref

Vref

Vref

Vbias

C1

Q4

C4

R4

R10

Q3

R8

R9

Current Sense

A two-cell battery charger structure with cell-balancing support is shown in Figure 3. Similar battery charger structures are
explained in detail in AN2258, AN2294, and AN2267. Note that the fuel gauge function can easily be added to this project
without changing any hardware: It is only necessary to switch from the CY8C24423A to a PSoC device with more program
memory. The main fuel gauge calculation parameters are described in AN2294, “The Li-Ion/Li-Pol Battery Charger with Fuel
Gauge Function.

Figure 3. Two-Cell Battery Charger with Cell-Balancing Support

The following abbreviations are used in Figure 3:
RS_TX: RS232 transmitter for debug purposes (uses

external level translator). It monitors temperature, voltage,
current and cell-balancing statistics. RS_TX is used only in
the debug stage and may be removed in the released
product.

CPU: Central processor to implement charge and cell­balancing algorithms, and perform charge control functions.

PWM: Pulse width modulator to regulate the charge current.
VREF: Reference voltage source.
TIMERs: Several timers are used by the CPU in charge and

cell-balancing algorithms.

November 25, 2007 Document No. 001-17394 Rev. *B - 5 -

Incremental ADC: Analog-to-digital converter to digitize the
analog signals.

INAMP: Instrumentation amplifier to measure charge
voltage, current, and temperature.

AMUX: Analog multiplexers.

Figure 3 also contains a two-cell Li-Ion battery pack, a linear

regulator (based on Q1, Q2), a cell-balancing circuit (based
on Q4, Q5), a current-sense resistor, and other elements
that allow the PSoC device to use and interpret battery
current, voltage, and temperature.

[+] Feedback

AN2309

Device Schematic

The schematics shown in Figure 4 on page 7 and Figure 5
on page 8 constitute a complete two-cell battery charger.

A signal from the PWM goes to the RC-filter, which consists
of resistor R4 and capacitor C4. A constant voltage signal
proportional to the PWM duty cycle value forms at the Q2
gate. Therefore, the PWM and RC-filter is a simple
implementation of a PWM-DAC. The bipolar transistor Q2 is
driven by an analog signal from the PWM-DAC. This bipolar
transistor and resistors R1 and R5 form a resistive divider.
Therefore, the voltage drop on the resistor R1 is directly
dependent on the Q2 base voltage; that is, on the PWM­DAC level. The MOSFET transistor Q1 is driven by the
voltage drop on resistor R1 and regulates the battery charge
current. The PWM period was set to 2048 for an accurate
current level setting, and can easily be adjusted in the
firmware.

Note that the charger proposed in this application note is
based on a linear current regulator. The advantages of this
regulator are low cost and small size. However, to charge a
battery with a capacity of over 1000 mAh with a charge
current of 1 CA (where CA is the nominal battery capacity)
the linear regulator can be nonoptimal due to the large
voltage drop on the MOSFET and the consequent high
MOSFET temperature. In this case, a step down regulator is
preferable to a linear current regulator. The step-down
regulator is explained in detail in Application Notes AN2107
and AN2258.

Diode D1 is used to prevent a reverse current that can
discharge the battery when the charger is disconnected from
the supply voltage. The cell-balancing circuit is represented
by MOSFETs Q4 and Q5, and by balancing resistors R11
and R14. The MOSFETs are directly controlled from the
PSoC device port (high level - close, low level - open). The
resistors R8-R10 and the bipolar transistor Q3 act as a level
translator and allow opening the MOSFET Q4 by a logic
signal from the PSoC.

The resistive network (R6, R7, R12, R13, R15, R16, and
R18-R22) and the reference voltage V

from the divider on

bias

R29 and D8, allow transformation of the battery current,
voltage, and temperature into signals suitable for the PSoC
device. The 100 mΩ resistor R23 is a current-sense resistor
that is in the battery pack current path.

The two-cell charger user interface uses two LEDs to
display internal status. In this application configuration, the
green LED indicates the charge phase, and the yellow LED
indicates the discharge phase. The Error state is indicated
when both LEDs are on and the idle status is indicated when
both LEDs are off.

To provide a processor power supply from a high voltage
level, the linear current regulator U2 is used. Alternatively, a
switching regulator can be used, as explained in AN2258.
Or, the regulated step-down converter from an internal SMP

can be used, as explained in AN2180, “Using the PSoC

Switch Mode Pump in a Step-Down Converter.” An external
voltage supply is applied to the connector J4. The SW1
switch allows the device to be disconnected from the
external power supply. Two diodes in the D6 package allow
the processor to operate during the charge phase from the
external power supply and during the discharge phase from
the battery pack power supply. The external load is
connected to the connector J3 LOAD. The diodes D4 and
D5 provide an uninterrupted power supply (UPS) to the
LOAD connector, much as D6 provides power to the
processor. The switch-on transistors Q6 and Q7 allow the
power supply to be disconnected from the LOAD connector
and protect the battery from overdischarge. This switch is
optional and can be removed to reduce total device cost
further. The ground level is connected to the external ground
level POWER (during the charge phase or discharge phase)
and to the battery pack ground that follows the current­sense resistor. Only in this way can the charge battery pack
current and the total battery pack discharge current pass
through the current-sense resistor. This ground-level
position is used to supplement the battery fuel gauging
functionality in the PSoC software, as shown in AN2294.

November 25, 2007 Document No. 001-17394 Rev. *B - 6 -

[+] Feedback

BAL2

Q1
IRLML6402

BAL1

CALIBRATION

DRIVE

1
2
3
4
5

J2

ISSP/DEBUG

XRES

VCC

TX

TP1

BAL1

Vref

P0[7]

1

P0[5]

2

P0[3]

3

P0[1]

4

P2[7]

5

P2[5]

6

P2[3]

7

P2[1]

8

SMP

9

P1[7]

10

P1[5]

11

P1[3]

12

P1[1]

13

Vss

14

P1[0]

15

P1[2]

16

P1[4]

17

P1[6]

18

Xres

19

P2[0]

20

P2[2]

21

P2[4]

22

P2[6]

23

P0[0]

24

P0[2]

25

P0[4]

26

P0[6]

27

Vcc

28

U1

CY8C24423A

VCC

V1

V2

Vi2

Vbias R24

10K 1%

LED_GREEN

R16
1M 1%

R15
1M 1%

R21
200K 1%

R20
200K 1%

C8 0.1u

Vi1

Vi2

Vi1

R14
100

C6

0.01u

R17
1M

R13 150K 0.1%

R12
50K 0.1%

V1

Q5
IRLML2502

Vref

C5

0.01u

R7 150K 0.1%

R6
50K 0.1%

V2

1
2
3
4
5

J1

BAT_CON

C7

0.01u

R18 150K 0.1%

BAT_GND

R19
50K 0.1%

R23

100mOh 1%

Vbias

BAT_GND

Vbias

POWER-

BAT+

BAT2

Vref

Tbat

BAT1
GND
TERMO

LED_YELLOW

Tbat

DRIVE
LOAD_EN

Q4
IRLML6402

R8
1M

XRES

R22

10K

R11
100

+

C2
47uF

R5
15K

R1
10K

C1

0.01uF

D1

MBR360C3

1uF CER

POWER+

Q2
BC817

C4

0.1uF

R4 1K

R9

330R

Q3
BC817

R10
10K

BAL2

Figure 4. Two-Cell Battery Charger Schematic – CPU, Cell Balancing, and Measuring Equipment

AN2309

November 25, 2007 Document No. 001-17394 Rev. *B - 7 -

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