The information in this document is subject to change without prior notice
in order to improve reliability, design, and function and does not represent
a commitment on the part of CyberResearch, Inc.
In no event will CyberResearch, Inc. be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use of or inability
to use the product or documentation, even if advised of the possibility of
such damages.
This document contains proprietary information protected by copyright.
All rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of CyberResearch, Inc.
Trademarks
“CyberResearch,” and “MXGD Series,” are trademarks of CyberResearch,
Inc. Other product names mentioned herein are used for identification
purposes only and may be trademarks and/or registered trademarks of
their respective companies.
• NOTICE •
CyberResearch, Inc. does not authorize any CyberResearch product for
use in life support systems, medical equipment, and/or medical devices
without the written approval of the President of CyberResearch, Inc. Life
support devices and systems are devices or systems which are intended
for surgical implantation into the body, or to support or sustain life and
whose failure to perform can be reasonably expected to result in injury.
Other medical equipment includes devices used for monitoring, data
acquisition, modification, or notification purposes in relation to life
support, life sustaining, or vital statistic recording. CyberResearch
products are not designed with the components required, are not subject
to the testing required, and are not submitted to the certification required
to ensure a level of reliability appropriate for the treatment and diagnosis of
humans.
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Warnings appear where overlooked details may cause damage to the equipment or result
in personal injury. Warnings should be taken seriously. Warnings are easy to recognize.
The word “warning” is written as “WARNING,” both capitalized and bold and is followed by
text. The text is the warning message. A warning message is shown below:
WARNING:
This is an example of a warning message. Failure to adhere to warning
messages may result in permanent damage to the MXGD or personal
injury to the user. Please take warning messages seriously.
CAUTION!
Cautionary messages should also be heeded to help reduce the chance of losing data or
damaging the MXGD. Cautions are easy to recognize. The word “caution” is written as
“CAUTION,” both capitalized and bold and is followed. The italicized text is the cautionary
message. A caution message is shown below:
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CAUTION:
This is an example of a caution message. Failure to adhere to cautions
messages may result in permanent damage to the MXGD. Please take
caution messages seriously.
NOTE:
These messages inform the reader of essential but non-critical information. These
messages should be read carefully as any directions or instructions contained therein can
help avoid making mistakes. Notes are easy to recognize. The word “note” is written as
“NOTE,” both capitalized and bold and is followed by text. The text is the cautionary
message. A note message is shown below:
NOTE:
This is an example of a note message. Notes should always be read.
Notes contain critical information about the MXGD. Please take note
messages seriously.
If any of the components listed in the checklist below are missing,
please do not proceed with the installation. Contact CyberResearch,
Inc.
The items listed below should all be included in the MXGD package.
1 x MXGD single board computer
3 x SATA power cables
6 x SATA cabl es
2 x Dual RS-232 cable
1 x Single RS-232 cable
1 x I/O shielding
1 x Mini jumper pack
1 x Utility CD
Images of the above items are shown in Chapter 3.
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1.1 Overview
Figure 1-1: MXGD Motherboard
The MXGD ATX form factor motherboard is a LGA775 Intel® Core™2 Quad, Core™2
Duo, Pentium® D, Pentium® 4 or Celeron® D platform with a 533 MHz, 800 MHz or
1066 MHz front side bus (FSB). Up to 8.0 GB of DDR2 SDRAM and up to six SATA II hard
disk drives (HDD) are supported. High-performance PCI Express (PCIe) Gigabit Ethernet
(GbE) connectivity is integrated into the system. One PCIe x16, one PCIe x4, five PCI
slots and eight USB 2.0 connectors (four external and four internal) provide flexible
expansion options. Added system security is provided with Trusted Platform Module (TPM
v1.2) support.
1.1.1 MXGD Features
Some of the MXGD features are listed below.
Supports LGA775 Intel® CPUs including:
o Intel® Core™2 Quad
o Intel® Core™2 Duo
o Intel® Pentium® D
o Intel® Pentium® 4
o Intel® Celeron® D
Supports four 240-pin 533 MHz, 667 MHz or 800 MHz 2.0 GB (max.) DDR2
memory modules
Added security with support for TPM v1.2
Expansion slots include:
o One PCIe x16 slot
o One PCIe x4 slot
o Five PCI slots
Six SATA II drives with transfer rates of 3.0Gb/s supp orted
Eight USB 2.0 devices supported
Dual PCIe GbE Ethernet connectors
PICMG 1.3 form factor
RoHS compliant
Supports ATX power supplies
1.2 MXGD Overview
1.2.1 MXGD Overview Photo
The MXGD has a wide variety of peripheral interface connectors. Figure 1-2 is a labeled
photo of the peripheral interface connectors on the MXGD.
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Figure 1-2: MXGD Overview [Front View]
1.2.2 MXGD Peripheral Connectors and Jumpers
The MXGD has the following connectors on-board:
1 x ATX +12V power connector
1 x ATX power connector
1 x Audio connector
1 x CompactFlash® Type II (CF Type II) socket
1 x Digital input/output (DIO) connector
3 x Fan connectors
1 x Front panel connector
5 x PCI expansion slots
1 x PCIe x16 expansion slot
1 x PCIe x4 expansion slots
6 x Serial ATA II (SATA II) drive connectors
5 x Serial port connectors
1 x SPDIF connector
1 x SPI flash connector
1 x TPM connector
2 x USB 2.0 connectors (support four USB devices)
The MXGD has the following external peripheral interface connectors on the board rear
panel
3 x Audio jacks
2 x Ethernet connectors
1 x Parallel port connector
2 x PS/2 connectors
1 x Serial port connector
4 x USB 2.0 port connectors
1 x VGA connector
The MXGD supports the following LGA775 processors:
Intel® Core™2 Quad
Intel® Core™2 Duo
Intel® Pentium® D
Intel® Pentium® 4
Intel® Celeron® D
All of the above processors are interfaced with an Intel® Q965 northbridge chipset through
the front side bus (FSB). Features of the supported processors are listed in sections
below.
2.3.1 Intel® Core™2 Quad Features
Intel® Core™2 Quad features include:
Four processing cores
Up to 8MB of shared L2 cache
Up to 1066 MHz FSB
Intel® Wide Dynamic Execution
Intel® Intelligent Power Capability
Intel® Smart Memory Access
Intel® Advanced Smart Cache
Intel® Advanced Digital Media Boost
2.3.2 Intel® Core™2 Duo Features
Intel® Core™2 Duo features include:
Two processing cores
Up to 8MB of shared L2 cache
Up to 1066 MHz FSB
Intel® Wide Dynamic Execution
Intel® Intelligent Power Capability Intel® Smart Memory Access
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The Intel® Q965 (G)MCH supports LGA775 processors. The (G)MCH supports a FSB
frequency of 533 MHz, 800 MHz or 1066 MHz. Some of the features of the Intel® Q965
(G)MCH Include:
Support for the following processors.
o Intel® Core™2 Quad
o Intel® Core™2 Duo
o Intel® Pentium® D
o Intel® Pentium® 4
o Intel® Celeron® D
Supports Hyper-Threading Technology (HT Technology)
Supports FSB Dynamic Bus Inversion (DBI)
Supports 36-bit host bus addressing, allowing the processor to access the
entire
64 GB of the (G)MCH’s memory address space
Has a 12-deep In-Order Queue to support up to twelve outstanding pipelined
address requests on the host bus
Has a 1-deep Defer Queue
Uses GTL+ bus driver with integrated GTL termination resistors
Supports a Cache Line Size of 64 bytes
2.4.2 Intel® Q965 Memory Support
WARNING:
Only DDR2 memory module can be installed on the MXGD. Do not
install DDR memory modules. If a DDR memory module is installed on
the MXGD, the MXGD may be irreparably damaged.
The Intel® Q965 supports up to four 2GB DDR2 DIMMs with the following specifications:
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Only un-buffered DIMMs supported
DDR2 only
Maximum supported bandwidth (assuming DDR2 800 MHz):
o Single-channel: 6.4 GB/s
o Dual-channel asymmetric mode: 6.4 GB/s
o Dual-channel interleaved mode: 12.8 GB/s
Capacities of 256MB, 512MB, 1GB or 2GB
Transfer speeds of 533MHz, 667MHz or 800MHz
A DB-15 VGA connector on the external peripheral interface connector panel is interfaced
to the Intel® Q965 graphics engine. The Intel® Q965 internal graphics engine, with an
400MHz integrated 24-bit RAMDAC. Some of the graphics features are listed below.
Analog Display Support
400 MHz Integrated 24-bit RAMDAC
Up to 2048x1536 @ 75 Hz refresh
Hardware Color Cursor Support
DDC2B Compliant Interface
2.4.3 Intel® Q965 PCIe x16
2.4.3.1 PCIe x16 Bus Overview
The Intel® Q965 northbridge has one 16-lane PCIe port that is intended for an external
PCIe graphics card. The PCIe x16 graphics card is installed on the PCIe x16 slot (Figure 2-5) and interfaced to the northbridge directly.
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Figure 2-5: PCIe x16 Expansion Slot
2.4.3.2 PCIe x16 Bus Specifications
The PCIe port is compliant with the PCI Express* Base Specification revision 1.1. The
PCIe x16 port operates at a frequency of 2.5 Gb/s on each lane while employing 8b/10b
encoding; the port supports a maximum theoretical bandwidth of 40 Gb/s in each
direction. Some of the features are listed below.
One, 16-lane PCIe port intended for graphics attach, compatible to the PCI
Express* Base Specification revision 1.1a.
PCI Express frequency of 1.25 GHz resulting in 2.5 Gb/s each direction
Raw bit-rate on the data pins of 2.5 Gb/s results in a real bandwidth per pair of
250 MB/s given the 8b/10b encoding used to transmit data across this
interface
Maximum theoretical realized bandwidth on the interface of 4 GB/s in each
direction simultaneously, for an aggregate of 8 GB/s when x16.
PCI Express* Graphics Extended Configuration Space. The first 256 bytes of
configuration space alias directly to the PCI Compatibility configuration space.
The remaining portion of the fixed 4-KB block of memory-mapped space
above that (starting at 100h) is known as extended configuration space.
PCI Express Enhanced Addressing Mechanism. Accessing the device
configuration pace in a flat memory mapped fashion.
Automatic discovery, negotiation, and training of link out of reset
Supports traditional PCI style traffic (asynchronous snooped, PCI ordering)
Supports traditional AGP style traffic (asynchronous non-snooped, PCI
Express relaxed ordering)
Hierarchical PCI-compliant configuration mechanism for downstream devices
(i.e., normal PCI 2.3 Configuration space as a PCI-to-PCI bridge)
Supports “static” lane numbering reversal. This method of lane reversal is
controlled by a Hardware Reset strap, and reverses both the receivers and
transmitters for all lanes (e.g., TX[15]->TX[0], RX[15]->RX[0]). This method is
transparent to all external devices and is different than lane reversal as
defined in the PCI Express Specification. In particular, link initialization is not
affected by static lane reversal.
2.4.4 Intel® Q965 Direct Media Interface (DMI)
Intel® Q965 northbridge GMCH is connected to the Intel® ICH8DO Southbridge Chipset
through the chip-to-chip Direct Media Interface (DMI). Features of the Intel
listed below:
chip-to-chip connection interface to Intel ICH8
2GB/s (1GB/s in each direction) bus speed
32-bit downstream address
100 MHz reference clock (shared with PCI Express Graphics Attach)
APIC and MSI interrupt messaging support
®
Q965 DMI are
Message Signaled Interrupt (MSI) messages
SMI, SCI and SERR error indication
DMA, floppy drive, and LPC bus master
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Figure 2-6: DMI Interface
2.5 Intel® ICH8DO Southbridge Chipset
2.5.1 Intel® ICH8DO Overview
The Intel® ICH8DO southbridge chipset is connected to the Intel® Q965 northbridge
GMCH through the chip-to-chip Direct Media Interface (DMI). Some of the features of the
Intel® ICH8DO are listed below.
Complies with PCI Express Base Specification, Revision 1.1
Complies with PCI Local Bus Spe cificati on, Revision 2.3 and su pports 33MHz
PCI operations
Supports ACPI Power Management Logic
Contains:
Integrated SATA host controller with DMA operations and AHCI su pport
interfaced to six SA TA connectors on the MXGD
Supports the eight USB 2.0 devices on the MXGD with five UHCI controllers
and two EHCI controllers
Integrated 10/100/1000 GbE MAC with System Defense
Complies with System Management Bus (SMBus) Specification, Version 2.0
Supports Intel High Definition Audio
Supports Intel® Matrix Storage Technology
Supports Intel® Active Management Technology (ICH8DO only)
Low Pin Count (LPC) interface
Firmware Hub (FWH) interface support
Serial Peripheral Interface (SPI) support
2.5.2 SPI BIOS Chipset:
A licensed copy of AMI BIOS installed is an onboard SPI (Serial Peripheral Interface)
BIOS chipset. Some of the BIOS features are listed below:
AMI Flash BIOS
SMIBIOS (DMI) compliant
Console redirection function support
PXE (Pre-boot Execution Environment) support
USB booting support
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Figure 2-7: SPI BIOS Chipset
2.5.3 Intel® High Definition Audio
The MXGD onboard audio connector can connect to an optional audio kit. The codec on
the optional audio kit is connected to the ICH8DO controller through the Intel® High
Definition Audio serial link. The DMA engines in the controller move samples of digitally
encoded data between system memory and the audio kit codec.
The ICH8DO LPC interface complies with the LPC 1.1 specifications. The LPC bus from
the ICH8DO is connected to the following components:
BIOS chipset
Super I/O chipset
2.5.5 Intel® ICH8DO PCI Interface
The PCI interface on the ICH8DO is compliant with the PCI Revision 2.3 implementation.
Some of the features of the PCI interface are listed below.
PCI Revision 2.3 compliant
33MHz
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5V tolerant PCI signals (except PME#)
Integrated PCI arbiter supports up to seven PCI bus masters
Five PCI channels are connected to five PCI expansion sockets.
Figure 2-9: PCI Expansion Slots
2.5.6 Intel® ICH8DO PCIe Ports
There are six root PCIe ports on the Intel® ICH8DO. Port 5 and port 6 provides PCIe x1
connectivity to two Broadcom PCIe GbE controllers. Port 1 to port 4 are connected to a
PCIe x4 expansion slot.
256 bytes of battery backed RAM is provided by the Motorola MC146818A real time clock
(RTC) integrated into the ICH8DO. The RTC operates on a 3V battery and 32.768KHz
crystal. The RTC keep s track of the time and stores system data even when the system is
turned off.
2.5.8 Intel® ICH8DO SATA Controller
The two integrated SATA controllers on the ICH8DO southbridge support six SATA II
drives on the MXGD with independent DMA operations. The SATA controller contains two
modes of operation – a legacy mode using I/O space, and an AHCI mode using memory
space. SATA controller specifications are listed below.
Supports independent DMA operation on up to six ports
Supports six SATA drive s
Supports 3Gb/s data transfer speeds
Supports Serial ATA 1.0 Specification, Revision 1.0
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Figure 2-10: SATA Connectors
2.5.9 Intel® ICH8DO USB Controller
Up to eight high-speed, full-speed or low-speed USB devices are supported by the
ICH8DO on the MXGD. High-speed USB 2.0, with data transfers of up to 480MB/s, is
enabled with the ICH8DO integrated Enhanced Host Controller Interface (EHCI) compliant
host controller. USB full-speed and low-speed signaling is supported by the ICH8DO
integrated Universal Host Controller Interface (UHCI) controllers.
The MXGD Intel® ICH8DO southbridge PCIe bus is split into two PCIe x1 channels and
one PCIe x4 channel. The two PCIe x1 channels are each connecte d to a Broadcom PCIe
GbE controller. The PCIe x4 channel is connected to a PCIe x4 slot.
2.6.2 PCIe x4 Expansion
Four of the PCI express root ports are connected to a single PCIe x4 expansion slot
enabling PCIe x4 cards to be installed on the system.
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Figure 2-12: PCIe x4 Expansion Slot
2.6.3 PCIe GbE Ethernet
Two PCIe x1 lanes from the are connected to two Broadcom BCM5787M PCIe GbE
controllers shown in Figure 2-13 below.
The Broadcom BCM5787M is a 10/100/1000BASE-T Ethernet LAN controller. The
BCM5787M combines a triple-speed IEEE 802.3 compliant Media Access Controller
(MAC) with a triple-speed Ethernet transceiver, a PCIe bus interface, and an on-chip
buffer memory. Some of the BCM5787 controller features are listed below:
Integrated 10/100/1000BASE-T transceiver
Automatic MDI crossover function
PCIe v1.0a
10/100/1000BASE-T full/half-duplex MAC
Wake on LAN support meeting the ACPI requirements
Statistics for SNMP MIB II, Ethernet-like MIB, and Ethernet MIB (802.3z,
clause 30)
Serial EEPROM or serial flash support
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2.7 LPC Bus Components
2.7.1 LPC Bus Overview
The LPC bus is connected to components listed belo w:
Super I/O chipset
Serial port chipset
Figure 2-14: LPC Bus Components
2.7.2 Super I/O chipset
The iTE IT8712F Super I/O chipset is connected to the ICH8DO southbridge through the
LPC bus. The iTE IT8712F is an LPC interface-based Super I/O device that comes with
Environment Controller integration. Some of the features of the iTE IT8712F chipset are
listed below:
PC98/99/2001, ACPI and LANDesk Compliant
Enhanced Hardware Monitor
Fan Speed Controller
Single +5V Power Supply
Two 16C550 UARTs for serial port control
One IEEE 1284 Parallel Port
Keyboard Controller
Watchdog T i mer
Serial IRQ Support
Vbat & Vcch Support
Single +5V Power Supply
Some of the Super I/O features are described in more detail below:
2.7.2.1 Super I/O LPC Interface
The LPC interface on the Super I/O complies with the Intel® Low Pin Count Specification
Rev. 1.0. The LPC interface supports both LDRQ# and SERIRQ protocols as well as PCI
PME# interfaces.
2.7.2.2 Super I/O 16C550 UARTs
The onboard Super I/O has two integrated 16C550 UARTs that can support the following:
Two standard serial ports (COM1 and COM2)
IrDa 1.0 and ASKIR protocols
Another two chipsets connected to the LPC bus provided connectivity to another two seri al
port connectors (COM3 and COM4).
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2.7.2.3 Super I/O Enhanced Hardware Monitor
The Super I/O Enhanced Hardware Monitor monitors three thermal inputs, VBAT
internally, and eight voltage monitor inputs. These hardware parameters are reported in
the BIOS and can be read from the BIOS Hardware Health Configuration menu.
2.7.2.4 Super I/O Fan Speed Controller
The Super I/O fan speed controller enables the system to monitor the speed of the fan.
One of the pins on the fan connector is reserved for fan speed detection and interfaced to
the fan speed controller on the Super I/O. The fan speed is then reported in the BIOS.
2.7.2.5 Super I/O Keyboard Controller
The Super I/O keyboard controller can execute the 8042 instruction set. Some of the
keyboard controller features are listed below:
The 8042 instruction is compatible with a PS/2 keyboard and PS/2 mouse
Gate A20 and Keyboard re set output
Supports multiple keyboard power on events
Supports mouse double-click and/or mouse move power on events
2.7.3 Serial Port Chipset
The MXGD has a Fintek F81216DG chipset onboard enables the addition of four
additional UART serial ports (COM3, COM4, COM5 and COM6). UART includes 16-byte
send/receive FIFO. The Fintek serial port chipset is interfaced to the southbridge chipset
through the LPC bus. Some of the features of the Fintek chipset are listed below:
A cooling fan and heat sink must be installed on the CPU. Thermal paste must be
smeared on the lower side of the heat sink before it is mounted on the CPU. Heat sinks
are also mounted on the northbridge and southbridge chipsets to ensure the operating
temperature of these chips remain low.
2.8.3 Power Consumption
Ta b l e 2 - 1 shows the power consumption parameters for the MXGD running with a 1066
MHz FSB 3.73 GHz Intel® Pentium® 4 processor with 1 GB of 667 MHz DDR2 memory.
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3.1 Anti-static Precautions
WARNING:
Failure to take ESD precautions during the installation of the MXGD
may result in permanent damage to the MXGD and severe injury to the
user.
Electrostatic discharge (ESD) can cause serious damage to electronic components,
including the MXGD. Dry climates are especially susceptible to ESD. It is therefore critical
that whenever the MXGD, or any other electrical component is handled, the following
anti-static precautions are strictly adhered to.
Wear an anti-static wristband: - Wearing a simple anti-static wristband can
help to prevent ESD from damaging the board.
Self-grounding:- Before handling the board touch any grounded conducting
material. During the time the board is handled, frequently touch any
conducting materials that are connected to the ground.
Use an anti-static pad: When configuring the MXGD, place it on an
antic-static pad. This reduces the possibility of ESD damaging the MXGD.
Only handle the edges of the PCB:-: When handling the PCB, hold the PCB
by the edges.
3.2 Unpacking
3.2.1 Unpacking Precautions
When the MXGD is unpacked, please do the following:
Follow the anti-static precautions outlined in Section 3.1.
Make sure the packing box is facing upwards so the MXGD does not fall out
of the box.
Make sure all the components shown in Section 3.3 are present.
Internal peripheral connectors are found on the motherboard and are only accessible
when the motherboard is outside of the chassis. Thi s section ha s complete description s of
all the internal, peripheral connectors on the MXGD.
4.2.1 ATX +12V Power Connector
CN Label:
CN Type:
ATX1
4-pin ATX power connector (2x2)
CN Location: See Figure 4-2
CN Pinouts: See Table 4-3
The 4-pin ATX power connector is connected to an ATX power supply.
Figure 4-2: ATX Power Connector Location
PIN NO. DESCRIPTION
1 GND
2 GND
3 +12V
4 +12V
Table 4-3: ATX Power Connector Pinouts
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4.2.2 ATX Power Connector
CN Label:
CN Type:
ATX2
24-pin A TX (2x12)
CN Location: See Figure 4-3
CN Pinouts: See Table 4-4
The ATX connector is connected to an external ATX power supply. Power is provided to
the system, from the power supply through this connector.
The 4-pin audio CD in connector is connected to an external audio CD device for the input
and output of audio signals from a CD player to the system.
Figure 4-4: Audio CD In Connector Pinouts (4-pin)
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PIN NO. DESCRIPTION
1 CD Signal (Left)
2 Ground
3 Ground
4 CD Signal (Right)
Table 4-5: Audio CD In Connector Pinouts
4.2.4 Audio Connector
CN Label:
CN Type:
CN Location:
CN Pinouts:
CN3
10-pin header (2x5)
See Figure 4-5
See Table 4-6
The 10-pin audio connector is connected to external audio devices including speakers and
microphones for the input and output of audio signals to and from the system.
The digital input/output connector is managed through a Super I/O chip. The DIO
connector pins are user programmable.
Figure 4-6: DIO Connector Connector Locations
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 Ground 2 VCC
3 Input 0 4 Output 0
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5 Input 1 6 Output 1
7 Input 2 8 Output 2
9 Input 3 10 Output 3
Table 4-7: DIO Connector Connector Pinouts
4.2.6 Fan Connector (+12V) (CPU Cooling Fan)
CN Label:
CN Type:
CN Location:
CN Pinouts:
IO_FAN2
4-pin wafer
See Figure 4-7
See Table 4-8
The CPU cooling fan connector provides a 12V, 500mA current to a CPU cooling fan. The
connector has a "rotation" pin to get rotation signals from fans and notify the system so the
system BIOS can recognize the fan speed. Please note that only specified fans can issue
the rotation signals.
Two system cooling fan connectors provide a 12V, 500mA current to two system cooling
fans. The connectors have a "rotation" pin to get rotation signals from fans and notify the
system so the system BIOS can recognize the fan speed. Please note that only specified
fans can issue the rotation signals.
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Figure 4-8: +12V Fan Connector Location
PIN NO. DESCRIPTION
1 GND
2 +12V
3 Fan Speed Detect
Table 4-9: +12V Fan Connector Pinouts
4.2.8 Front Panel Connector (14-pin)
CN Label:
CN Type:
CN Location:
CN Pinouts:
F_PANEL1
14-pin header (2x7)
See Figure 4-9
See Table 4-10
The front panel connector connects to external switches and indicators to monitor and
controls the motherboard. These indicators and switches include:
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CN Pinouts:
See Table 4-16
The six SATA drive connectors are each connected to a second generation SATA drive.
Second generation SATA drives transfer data at speeds as high as 300Mb/s. The SATA
drives can be configured in a RAID configuration.
The four 10-pin serial port connectors provide four additional RS-232 serial
communications channels. The four internal RS-232 serial port connectors can be
connected to external RS-232 serial port devices.
Figure 4-15: RS-232 COM Connector Pinout Locations
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 Data Carrier Direct (DCD) 2 Data Set Ready (DSR)
3 Receive Data (RXD) 4 Request To Send (RTS)
5 Transmit Data (TXD) 6 Clear To Send (CTS)
7 Data Terminal Ready (DTR) 8 Ring Indicator (RI)
9 Ground (GND) 10 Ground (GND)
Table 4-17: RS-232 COM Connector Pinouts
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4.2.15 Serial Port Connector (COM 2)(RS-232, RS-422 or RS-485)
CN Label: COM2
CN Type:
14-pin header (2x7)
CN Location: See Figure 4-16
CN Pinouts: See Table 4-18
The 14-pin serial port connector connects to the COM 2 serial communications channels.
COM 2 is a multi function channel. In default mode COM 2 is an RS-232 serial
communication channel but, with the COM 2 function select jumper, can be configured as
either an RS-422 or RS-485 serial communications channel.
Figure 4-16: RS-232/422/485 Serial Port Connector Location
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 DCD 2 DSR
3 RXD 4 RTS
5 TXD 6 CTS
7 DTR 8 RI
9 GND 10 GND
11 TXD+ 12 TX13 RX+ 14 RX-
Table 4-18: RS-232/RS-485 Serial Port Connector Pinouts
The Trusted Platform Module (TPM) connector secures the system on bootup.
Figure 4-19: TPM Connector Pinout Locations
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 LCLK 2 GND2
3 LFRAME# 4 KEY
5 LRESET# 6 +5V
7 LAD3 8 LAD2
9 +3.4V 10 LAD1
11 LAD0 12 GND3
13 SCL 14 SDA
15 SB3.3V 16 SERIRQ
17 GND1 18 GLKRUN#
19 LPCPD# 20 LDRQ#
Table 4-21: TPM Connector Pinouts
4.2.19 USB Connectors (Internal)
CN Label:
USB1, USB2
CN Type:
CN Location:
8-pin header (2x4)
See Figure 4-20
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CN Pinouts:
See Table 4-22
The 2x4 USB pin connectors each provide connectivity to two USB 1.1 or two USB 2.0
ports. Each USB connector can support two USB devices. Additional external USB ports
are found on the rear panel. The USB ports are used for I/O bus expansion.
The external peripheral interface connectors on the back panel are connected to devices
externally when the MXGD is installed in a chassis. The peripheral connectors on the rear
panel are:
1 x Keyboard/mouse connector
1 x Parallel port connector
2 x RJ-45 Ethernet connector
Figure 4-23: Parallel Port Connector Pinout Locations
PIN Description PIN Description
1 STROBE# 2 DATA 0
3 DATA 1 4 DATA 2
5 DATA 3 6 DATA 4
7 DATA 5 8 DATA 6
9 DATA 7 10 ACKNOWLEDGE
11 BUSY 12 PAPER EMPTY
13 PRINTER SELECT 14 AUTO FORM FEED #
15 ERROR# 16 INITIALIZE
17 PRINTER SELECT LN# 18 GND
19 GND 20 GND
21 GND 22 GND
23 GND 24 GND
25 GND
Table 4-24: Parallel Pinouts
4.3.3 Audio Connectors
CN Label:
CN T ype:
CN Location:
CN2
Audio jack
See Figure 4-21
CN Pinouts:
Line In port (Light Blue): Connects a CD-ROM, DVD player, or other audio
See Figure 4-24
devices.
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Speaker Out port (Lime): Connects to a headphone or a speaker. With
multi-channel configurations, this port can also connect to front speakers.
Microphone (Pink): Connects a microphone.
Figure 4-24: Audio Connector
4.3.4 LAN Connectors
CN Label:
CN Type:
J20 and J21
RJ-45
CN Location: Figure 4-21
CN Pinouts: Table 4-25
The MXGD is equipped with two built-in RJ-45 Ethernet controllers. The controllers can
connect to the LAN through two RJ-45 LAN connectors. There are two LEDs on the
connector indicating the status of LAN. The pin assignments are listed in the following
table:
The RJ-45 Ethernet connector has two status LEDs, o ne green an d one yello w. The green
LED indicates activity on the port and the yellow LED indicates the port is linked. See
Table 4-26.
STATUS
YELLOW Activity GREEN Linked
DESCRIPTION STATUS DESCRIPTION
Table 4-26: RJ-45 Ethernet Connector LEDs
4.3.5 USB Connectors
CN Label:
CN T ype:
CN Location:
CN Pinouts:
USB devices connect directly to the USB connectors on the external peripheral connector
panel.
USB_LAN1, USB_LAN2
Dual USB port
See Figure 4-21
See Figure 4-26 and Table 4-27
Figure 4-26: USB Connector Pinout Locations
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5.1 Anti-static Precautions
WARNING:
Failure to take ESD precautions during the installation of the MXGD
may result in permanent damage to the MXGD and severe injury to the
user.
Electrostatic discharge (ESD) can cause serious damage to electronic components,
including the MXGD. Dry climates are especially susceptible to ESD. It is therefore critical
that whenever the MXGD, or any other electrical component is handled, the following
anti-static precautions are strictly adhered to.
Wear an anti-static wristband: - Wearing a simple anti-static wristband can
help to prevent ESD from damaging the board.
Self-grounding:- Before handling the board touch any grounded conducting
material. During the time the board is handled, frequently touch any
conducting materials that are connected to the ground.
Use an anti-static pad: When configuring the MXGD, place it on an
antic-static pad. This reduces the possibility of ESD damaging the MXGD.
Only handle the edges of the PCB:-: When handling the PCB, hold the PCB
The following installation notices and installation considerations should
be read and understood before the MXGD is installed. All installation
notices pertaining to the installation of the MXGD should be strictly
adhered to. Failing to adhere to these precautions may lead to severe
damage of the MXGD and injury to the person installing the
motherboard.
5.2.1 Installation Notices
WARNING:
The installation instructions described in this manual should be carefully
followed in order to prevent damage to the MXGD, MXGD components and
injury to the user.
Before and during the installation please DO the following:
Read the user manual:
oThe user manual provides a complete description of the MXGD
installation instructions and configuration options.
Wear an electrostatic discharge cuff (ESD):
oElectronic components are easily damaged by ESD. Wearing an ESD cuff
removes ESD from the body and helps prevent ESD damage.
Place the MXGD on an antistatic pad:
oWhen installing or configuring the motherboard, place it on an antistatic
pad. This helps to prevent potential ESD damage.
Turn all power to the MXGD off:
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oWhen working with the MXGD, make sure that it is disconnected from all
power supplies and that no electricity is being fed into the system.
Before and during the installation of the MXGD DO NOT:
Remove any of the stickers on the PCB board. These stickers are required for
warranty validation.
Use the product before verifying all the cables and power connectors are
properly connected.
Allow screws to come in contact with the PCB circuit, connector pins, or its
components.
5.2.2 Installation Checklist
The following checklist is provided to ensure the MXGD is properly installed.
All the items in the packing list are present
The CPU is installed
The CPU cooling kit is properly installed
A compatible memory module is properly inserted into the slot
The CF Type I or CF Type II card is properly installed into the CF socket
The jumpers have been properly configured
The MXGD is inserted into a chassis with adequate ventilation
The correct power supply is being used
The following devices are properly connected
o Primary and secondary IDE device
o SATA drives
o Power supply
o USB cables
o Serial port cables
o I/O Shielding
The following external peripheral devices are properly connected to the