The information in this document is subject to change without prior notice
in order to improve reliability, design, and function and does not represent
a commitment on the part of CyberResearch, Inc.
In no event will CyberResearch, Inc. be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use of or inability
to use the product or documentation, even if advised of the possibility of
such damages.
This document contains proprietary information protected by copyright.
All rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of CyberResearch, Inc.
Trademarks
“CyberResearch,” and “MMGA Series,” are trademarks of CyberResearch,
Inc. Other product names mentioned herein are used for identification
purposes only and may be trademarks and/or registered trademarks of
their respective companies.
• NOTICE •
CyberResearch, Inc. does not authorize any CyberResearch product for
use in life support systems, medical equipment, and/or medical devices
without the written approval of the President of CyberResearch, Inc. Life
support devices and systems are devices or systems which are intended
for surgical implantation into the body, or to support or sustain life and
whose failure to perform can be reasonably expected to result in injury.
Other medical equipment includes devices used for monitoring, data
acquisition, modification, or notification purposes in relation to life
support, life sustaining, or vital statistic recording. CyberResearch
products are not designed with the components required, are not subject
to the testing required, and are not submitted to the certification required
to ensure a level of reliability appropriate for the treatment and diagnosis of
humans.
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Warnings appear where overlooked details may cause damage to the equipment or result
in personal injury. Warnings should be taken seriously. Warnings are easy to recognize.
The word “warning” is written as “WARNING,” both capitalized and bold and is followed by
text. The text is the warning message. A warning message is shown below:
WARNING:
This is an example of a warning message. Failure to adhere to warning
messages may result in permanent damage to the MMGA or personal
injury to the user. Please take warning messages seriously.
CAUTION!
Cautionary messages should also be heeded to help reduce the chance of losing data or
damaging the MMGA. Cautions are easy to recognize. The word “caution” is written as
“CAUTION,” both capitalized and bold and is followed. The italicized text is the cautionary
message. A caution message is shown below:
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CAUTION:
This is an example of a caution message. Failure to adhere to cautions
messages may result in permanent damage to the MMGA. Please take
caution messages seriously.
NOTE:
These messages inform the reader of essential but non-critical information. These
messages should be read carefully as any directions or instructions contained therein can
help avoid making mistakes. Notes are easy to recognize. The word “note” is written as
“NOTE,” both capitalized and bold and is followed by text. The text is the cautionary
message. A note message is shown below:
NOTE:
This is an example of a note message. Notes should always be read.
Notes contain critical information about the MMGA. Please take note
messages seriously.
If any of the components listed in the checklist below are missing,
please do not proceed with the installation. Contact CyberResearch,
Inc.
The items listed below should all be included in the MMGA package.
1 x MMGA motherboard
3 x SATA power cables
6 x SATA cables
1 x Dual RS-232 cable
1 x USB cable
1 x Mini jumper pack
1 x Utility CD
1 x IO shielding
Images of the above items are shown in Chapter 3.
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1.1 Overview
Figure 1-1: MMGA uATX Motherboard
The MMGA uATX form factor motherboard (Figure 1-1) is an LGA775 Intel® Core™2
Quad, Intel® Core™2 Duo or Intel® Celeron® CPU processor platform. Both 45nm core
(Wolfdale, Yorkfield) and 65nm core (Conroe) processors are supported. (For a full list of
supported processors please refer to Section 2.3)
Up to four 2.0 GB 667 MHz or 800 MHz un-buffered DDR2 SDRAM DIMM are supported
by the Intel® Q35 graphics memory controller hub (GMCH). The Intel® Q35 GMCH also
has a single PCI Express x16 (PCIe x16) expansion lane for a PCIe x16 graphics card.
The integrated Intel® ICH9DO I/O controller hub (ICH) supports six SATA II drives with
data transfer speeds of 3.0 Gbps with SATA RAID configuration support. Twelve USB 2.0
channels, one expansion PCIe x4 channel and two expansion PCI channels provide
flexible expansion options. Support for a (optional) trusted platform module (TPM)
provides additional system security during system boot-up.
o Intel® Core™2 Duo (45nm and 65nm)
o Intel® Core™2 Quad (45nm and 65nm)
o Intel® Celeron® (65nm)
Supports four 240-pin 2 GB 667 MHz or 800 MHz DDR2 DIMMs
Six SATA II drives with transfer rates of 3.0 Gbps supported
Twelve USB 2.0 devices suppo rted (eight onboa rd and four on the rear p anel)
Dual GbE Ethernet connectors
uATX form factor
RoHS compliant
Supports ATX power supplies
1.2 MMGA Overview
1.2.1 MMGA Overview Photo
The MMGA has a wide variety of peripheral interface connectors. Figure 1-2 is a labeled
photo of the peripheral interface connectors on the MMGA.
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Figure 1-2: MMGA Overview [Front View]
1.2.2 MMGA Peripheral Connectors and Jumpers
The MMGA has the following connectors on-board:
1 x ATX power connector
1 x Audio connector
1 x CD in connector
1 x Cooling fan connector, CPU
1 x CPU power connector
1 x Digital input/output connector
4 x DIMM sockets
1 x Floppy drive connector
1 x Front panel connector
1 x Infrared (IrDA) connector
2 x PCI slots
1 x PCIe x16 slots
1 x PCIe x4 slots
1 x PCIe power connector
6 x Serial ATA drive connectors
3 x Serial port connectors
1 x SPDIF connector
1 x SPI flash connector
1 x TPM connector
4 x USB connectors (support eight USB devices)
The MMGA has the following external peripheral interface connectors on the board rear
panel.
3 x Audio jacks
2 x Keyboard/mouse connectors
1 x Parallel port
2 x RJ-45 Ethernet connectors
1 x Serial port
4 x USB 2.0 connectors
1 x VGA connector
The MMGA has the following on-board jumpers:
Clear CMOS
COM port pin 9 setting
COM port pin 9 voltage setting
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1.2.3 Technical Specifications
MMGA technical specifications are listed in Table 1-1. See Chapter 2 for details.
Table 1-2 lists the Conroe core Intel® Celeron® processors supported on the MMGA. All
the processors in Table 1-2 are 65nm LGA775 processors with the following features:
Execute Disable Bit
Intel® 64
Processor # CPU Speed FSB Speed Cache Size
440 2.0 GHz 800 MHz 512kB
Table 1-3: Supported Intel® Celeron® Processors
2.4 Intel® Q35 Northbridge Chipset
2.4.1 Intel® Q35 Northbridge Chipset
The Intel® Q35 Northbridge chipset is an advanced Graphics and Memory Controller Hub
(GMCH) that supports a range of Intel® processors including 45nm Wolfdale dual core
and Yorkfield quad core and 65nm Conroe core processors. The Intel® Q35 Northbridge
supports 1333 MHz, 1066 MHz, or 800 MHz FSB and up to 8.0 GB of 667 MHz or 800
MHz DDR2 SDRAM. The Intel® Q35 Northbridge is interfaced to an Intel® ICH9DO
Southbridge chipset through a Direct Media Interface (DMI) communications link.
2.4.2 Intel® Q35 Front Side Bus (FSB) Support
The Intel® Q35 Northbridge supports processors with the following FSB speeds:
800 MHz
1066 MHz
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1333 MHz
The LGA775 socket, Intel® Q35 Northbridge and the FSB are shown in Figure 1-6.
Figure 1-6: Front Side Bus (FSB)
2.4.3 Intel® Q35 Memory Controller
The memory controller on the Intel® Q35 Northbridge can support up to 8.0 GB of DDR2
SDRAM. Four DDR2 SDRAM DIMM sockets on the MMGA are interfaced to the Intel®
Q35 Northbridge memory controller. The DDR2 sockets are shown in Figure 1-7.
If more than one DDR2 DIMM is being installed in the system, please
purchase two DIMM that have the same capacity and operating
frequency.
Each DIMM socket can support DIMMs with the following specifications:
DDR2 only
Un-buffered only
667 MHz or 800 MHz
2.0 GB maximum capacity per DIMM (8.0 GB supported with four DIMM)
Memory bandwidth:
o 6.4 GBps in single-channel or dual-channel asymmetric mode
o 12.8 GBps in dual-channel interleaved mode assuming DDR2 800MHz
2.4.4 Intel® Q35 PCIe x16 Interface
The Intel® Q35 PCIe bus is compliant with the PCI Express 1.1a Specifications has the
following PCIe lanes:
One PCIe x16 graphics interface
PCIe frequency of 1.25 GHz (2.5 Gbps in each direction)
For further details on the PCIe interfaces, please refer to Section 2.6.2 on page 25.
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2.4.5 Intel® Q35 Graphics and Display Features
NOTE:
The Intel® Q35 Graphics and Display Features can be configured in
the Northbridge BIOS configuration screen. Please refer to Section
6.7.1 on page 149.
The Intel® Q35 GMCH integrated graphics device (IGD) has 3D, 2D and video
capabilities. The Unified Memory Architecture (UMA ) uses up to 256 MB of Dynamic Video
Memory Technology (DVMT) for graphics memory. External graphics accelerators on the
PCIe graphics (PEG) port are supported but cannot work simultaneou sly with the IGD.
2.4.6 Intel® Q35 Analog Display Capability
A single external female DB-15 (VGA) connector interfaces an analog display to an analog
CRT port on the Intel® Q35 GMCH. The VGA connector is shown in Figure 1-8.
Some of the capabilities of the Intel® Q35 analog CRT port are listed below:
400 MHz Integrated 24-bit RAMDAC
Up to 2048x1536 @ 75 Hz refresh
Hardware Color Cursor Support
DDC2B Compliant Interface
2.4.7 Intel® Q35 Direct Media Interface (DMI)
The Direct Media Interface (DMI) is the communication bus between the Intel® Q35
GMCH and the ICH9DO I/O controller hub (ICH). The DMI is a high-speed interface that
integrates advanced priority-based servicing and allows for concurrent traffic and true
isochronous transfer capabilities. The DMI is shown in Figure 1-9.
Figure 1-9: DMI Chip-to-Chip Connection
Some of the features of the DMI include:
2.0 GBps point-to-point DMI to ICH9DO (1.0 GBps in each direction)
100 MHz reference clock (shared with PCI Express* Graphics Attach)
32-bit downstream addressing
APIC and MSI interrupt messaging support
Message Signaled Interrupt (MSI) messages
SMI, SCI and SERR error indication
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2.5 Intel® ICH9DO Southbridge Chipset
2.5.1 Intel® ICH9DO Overview
Intel® ICH9DO Southbridge is an advanced I/O controller hub (ICH) connected to the
Intel® Q35 Northbridge through a DMI connection. The Intel® ICH9DO has six PCIe x1
ports, supports up to twelve USB 2.0 devices, six 3.0 Gbps SATA II drives with Intel®
Matrix Storage Technology (ACHI, RAID 0, RAID 1, RAID 5 or RAID 10). A High-Definition
audio (HDA) controller can be connected to an HDA codec. The PCI Masters provide PCI
expansion capabilities through the two PCI slots on the motherboard.
2.5.2 Intel® ICH9DO Features
The ICH9DO Southbridge chipset on the MMGA has the features listed below.
Complies with PCI Express Base Specification, Revision 1.1
Complies with PCI Local Bus Specification, Revision 2.3 and supports 33MHz
PCI operations
Supports ACPI Power Management Logic
Contains:
o Enhanced DMA controller
o Interrupt controller
o Timer functions
Integrated SATA host controller with DMA operations on six ports with data
transfer rates up to 3.0 Gbps
Supports twelve USB 2.0 devices with six UHCI controllers and two EHCI
controller
Complies with System Management Bus (SMBus) Specification, Version 2.0
Supports Intel
Supports Intel
Contains Low Pin Count (LPC) interface
Serial Peripheral Interface (SPI) for Serial and Shared Flash
2.5.3 Intel® ICH9DO High Definition Audio Implementation
A RealTek ALC883 High Definition Audio (HDA) codec is interfaced through the Intel®
High Definition Audio serial link to the HDA controller integrated on the Intel® ICH9DO.
The audio connector is shown in Figure 1-10.
Figure 1-10: Audio Connectors
2.5.4 Intel® ICH9DO Ethernet Controller
NOTE:
Gigabit Ethernet (1000 Mbps) is only supported in S0.
The Intel® ICH9DO Southbridge integrated GbE controller is interfaced to an Intel®
82566DM Gigabit LAN connect device through the Gigabit LAN Connect Interface (GLCI)
and LAN Connect Interface (LCI). The GLCI is shared with the PCIe x1 port 6. The Intel®
82566DM connects the Intel® ICH9DO Southbridge integrated GbE controller to an
external RJ-45 Ethernet LAN connector to provide GbE access.
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NOTE:
To enable the Intel® ICH9DO GbE Wake-on LAN function, the
Wake-on LAN function must be enabled in the BIOS. Please refer to
Section 6.5.1 (the Boot Settings Configuration menu) on page 143.
Some of the features of the Intel® ICH9DO GbE controller are listed below.
Supports multi speeds including 10 Mbps, 100 Mbps and 1000 Mbps
Can operate in full-duplex mode at all supported speeds
Can operate at half-duplex at 10 MBps and 100 MBps
Adheres to the IEEE 802.3x Flow Control Specification.
64-bit address master support for system using more than 4 GB of physical
memory.
Configurable receive and transmit data FIFO, programmable in 1 KB
increments.
Intelligent interrupt generation to enhance driver performance.
Compliance with Advanced Configuration and Power Interface
Compliance with PCI Power Management standards.
ACPI register set and power down functionality supporting D0 & D3 states.
Full wake-up support (ACPI).
Magic Packet wake-up enable with unique MAC address.
Fragmented UDP checksum off load for package reassembly.
Jumbo frames supported.
2.5.4.1 Intel® 82566DM Gigabit LAN Connect Device
One of the external RJ-45 Ethernet LAN connectors is interfaced to an Intel® 82566DM
Gigabit LAN connect device. The Intel® 82566DM is a compact, single-port integrated
physical layer (PHY) device interfaced directly to the Intel® ICH9DO Ethernet controller
through the GLCI and LCI. The Intel® ICH9DO Ethernet controller has its own Media
Access Controller (MAC). The Intel® 82566DM Gigabit LAN connect device is shown in
Figure 1-11.
Figure 1-11: Intel® 82566DM Gigabit LAN Connect Device
Some of the features of the Intel® 82556DM are listed below:
10 Mbps, 100 Mbps, or 1000 Mbps
Supports Intel® Active Management Technology
Supports Intel® Virtualization Technology through the Intel® Virtual Gigabit
Network Connection.
Can support legacy ASF2.0.
Shared SPI flash with system BIOS
Integrated linear voltage regulator
TCP/UDP checksum and segmentation offload
Receive side scaling
Dual TX and RX queues
802.1p and 802.1q
2.5.5 Intel® ICH9DO Low Pin Count (LPC) Interface
The ICH9DO LPC interface complies with the LPC 1.1 specifications. The LPC bus from
the ICH9DO is connected to the following components:
BIOS chipset
Super I/O chipset
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Trusted Platform Module (TPM) co nnector
2.5.6 Intel® ICH9DO PCI Interface
The PCI interface on the ICH9DO is compliant with the PCI Revision 2.3 implementation.
Some of the features of the PCI interface are listed below.
PCI Revision 2.3 compliant
33MHz
5V tolerant PCI signals (except PME#)
Integrated PCI arbiter supports up to four PCI bus masters
The PCI bus masters are interfaced to the following onboard components:
Two PCI sockets
2.5.7 Intel® ICH9DO PCIe x4 Bus
The Intel® ICH9DO Southbridge chipset has six PCIe x1 lanes. The four PCIe lanes are
interfaced to one PCIe x4 slot on the MMGA motherboard.
One of the remaining PCIe x1 lanes is connected to an Intel® 82566DM GbE controller
and the other PCIe x1 lane is connected to an Intel® 82573L GbE controller.
For more detailed information, please refer to Section 2.6.3.
2.5.8 Intel® ICH9DO Real Time Clock
256 bytes of battery backed RAM is provided by the Motorola MC146818B real time clock
(RTC) integrated into the ICH9DO. The RTC operates on a 3V battery and 32.768KHz
crystal. The RTC keeps track of the time and stores system data even when the system is
turned off.
That SATA drive mode is set in the BIOS. Please refer to the Section
6.3.2 on IDE Configuration on page 112 and Section 6.3.7on AHCI
Configuration on page 127.
The ICH9DO SATA supports three modes of operation:
Native IDE enabled operating system: Two controllers enable all six ports
on the bus. Controller 1 supports Port 0, Port 1, Port 2 and Port 3. Controller 2
supports Ports 4 and Port 5.
Legacy operating system is used: One controller is enabled and only
supports Port 0, Port 1, Port 2 and Port 3.
AHCI or RAID mode: One controller supports all six ports including, Port 0,
Port 1, Port 2, Port 3, Port 4 and Port 5.
In the AHCI or RAID mode, 3.0 Gbps data transfer speeds are supported. The SATA drive
connectors are shown in Figure 1-12.
Figure 1-12: SATA Drive Connectors
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2.5.10 Intel® ICH9DO Serial Peripheral Interface (SPI) BIOS
The SPI is connected to an SPI BIOS chip. A licensed copy of AMI BIOS is preinstalled on
the SPI BIOS chip.
2.5.11 Intel® ICH9DO USB Controller
2.5.11.1 Intel® ICH9DO USB Controller Overview
The ICH9DO comprises six full/low speed USB controllers that support the standard
Universal Host Controller Interface (UHCI) Revision 1.1. Each controller supports two
USB devices ensuring up to twelve USB 1.1 devices can be connected to the MMGA.
The ICH9DO also comprises two high-speed Enhanced Host Controller Interface (EHCI)
controllers. Each EHCI controller supports six USB 2.0 devices ensuring twelve USB 2.0
devices can be connected to the MMGA. EHCI controllers facilitate data transfer speeds
of 480 Mbps
Port routing logic on the ICH9DO determines whether a UHCI or an EHCI controller
controls a USB port.
2.5.11.2 MMGA USB Implementation
All twelve of the Intel® ICH9DO USB ports are implemented on the MMGA. Four USB
ports (USB Port 1 to USB Port 4) are connected to four external connectors and eight USB
ports (USB Port 5 to USB Port 12) are connected to four 8-pin onboard pin-headers. See
Figure 1-13.
The MMGA has one PCIe x16 channel from the Intel® Q35 Northbridge and six PCIe x1
lanes from the Intel® ICH9DO Southbridge. The PCIe bus lanes are interfaced to the
following devices.
One PCIe x16 lane is connected to one PCIe x16 graphics card
Four PCIe x1 lanes are connected to one PCIe x4 expansion card
One PCIe x1 lane are connected to one Intel® PCIe GbE device
One PCIe x1 is shared with the Intel® ICH9DO Gigabit LAN Connect
Interface (GLCI), which is connected to a Intel® 82566DM Gigabit platform
LAN connect device
2.6.2 PCIe x16 Slot
The Intel® Q35 Northbridge chipset has one PCIe x16 port reserved for a PCIe x16
graphics card. The PCIe x16 lane is interfaced to a PCIe x16 slot on the MMGA
motherboard. The PCIe x16 graphics card is then installed on the PCIe x16 slot on the
motherboard. The PCIe x16 edge connector is shown in Figure 1-14.
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Figure 1-14: PCIe x16 Slot
2.6.3 PCIe x4 Slot
Four of the six PCIe x1 expansion channels on the MMGA are interfaced to one PCIe x4
slot on the MMGA motherboard. The PCIe x4 slot is shown in Figure 1-15.
Figure 1-15: PCIe x4 Slot
2.6.4 Intel® 82573L PCIe GbE Controller
An RJ-45 Ethernet LAN connector is interfaced directly to an Intel® 82573L PCIe GbE
controller. The Intel® 82573L PCIe GbE controller is a compact, single-port integrated
physical layer (PHY) device with its own Memory Access Controller (MAC) and interfaced
to the Intel® ICH9DO Southbridge through a PCIe x1 lane. The Intel® 82573L GbE
controllers is shown in Figure 1-16 below.
Figure 1-16: Intel® 82573L PCIe GbE Controller
Some of the features of the Intel® 82573L are listed below:
2 Gbps peak bandwidth per direction
PCI Express Rev 1.0a specification
High bandwidth density per pin
Wide,pipelined internal data path architecture
Optimized transmit (Tx) and receive (Rx) queues
32 KB configurable Rx and Tx first-in/first-out (FIFO)
IEEE 802.3x*-compliant flow-control support with software controllable pause
times and threshold values
Programmable host memory Rx buffers (256 B-16 KB)
Descriptor ring management hardware for Tx and Rx
Mechanism for reducing interrupts from Tx/Rx operations
Integrated PHY for 10/100/1000 Mbps (full- and half-duplex)
IEEE 802.3ab* auto-negotiation support
IEEE 802.3ab PHY compliance and compatibility
Tx/Rx IP,TCP,and UDP checksum offloading
Tx TCP segmentation
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IEEE 802.1q* Virtual Local Area Network (VLAN) support with VLAN tag
insertion, stripping, and packet filtering for up to 4096 VLAN tags
Boot ROM Preboot eXecution Environment (PXE) Flash interface support
SDG 3.0,WfM 3.0 and PC2001 compliant
Wake on LAN support
2.7 PCI Bus Components
2.7.1 PCI Bus Overview
The PCI bus is connected to the components listed below:
Two PCI slots
The PCI bus complies with PCI Local Bus Specification, Revision 2.3 and supports 33MHz
PCI operations.
2.7.2 PCI Slots
The Intel® ICH9DO Southbridge integrates a PCI arbiter that supports up to four PCI
Masters thereby enabling the MMGA to support an additional two PCI bus Masters. The
PCI bus on the MMGA is interfaced to two PCI slots thereby connecting the PCI
expansion boards to the Intel® ICH9DO Southbridge. The PCI slots are shown in Figure 1-17.
The LPC bus is connected to components listed below:
TPM module connector
Super I/O chipset
Fintek F81216DG LPC Serial Port Chipset
2.8.2 TPM Module
A TPM connector on the MMGA is interfaced to the Intel® ICH9DO Southbridge through
the LPC bus. The TPM connector is shown in Figure 1-18 below.
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Figure 1-18: TPM Connector
The Intel® ICH9DO Southbridge supports TPM version 1.1 and TPM version 1.2 devices
for enhanced security. Three types of TPM compatible modules are listed below:
The ITE IT8712F Super I/O chipset is connected to the Intel® ICH9DO Southbridge
through the LPC bus. ITE IT8712F Super I/O chipset is shown in Figure 1-19 below.
The ITE IT8712F is an LPC interface-based Super I/O device that comes with an
integrated Environment Controller. Some of the features of the ITE IT8712F chipset are
listed below:
PC98/99/2001, ACPI and LANDesk Compliant
Enhanced Hardware Monitor
Fan Speed Controller
Single +5V Power Supply
Two 16C550 UARTs for serial port control
One IEEE 1284 Parallel Port
Keyboard Controller
Watchdog T i mer
Serial IRQ Support
Vbat & Vcch Support
Single +5V Power Supply
Some of the Super I/O features are described in more detail below:
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2.8.3.1 Super I/O LPC Interface
The LPC interface on the Super I/O complies with the Intel® Low Pin Count Specification
Rev. 1.0. The LPC interface supports both LDRQ# and SERIRQ protocols as well as PCI
PME# interfaces.
2.8.3.2 Super I/O 16C550 UARTs
The onboard Super I/O has two integrated 16C550 UARTs that can support the following:
one standard serial port (COM1)
IrDa 1.0 and ASKIR protocols(IR1)
The Fintek F81216DG LPC Serial Port chipset connected to the LPC bus provided
connectivity to another three serial port connectors (COM2, COM3 and COM4). For
further details on the Fintek F81216DG serial port controller, please refer to Section 2.8.4.
2.8.3.3 Super I/O Enhanced Hardware Monitor
The Super I/O Enhanced Hardware Monitor monitors three thermal inputs, VBAT
internally, and eight voltage monitor inputs. These hardware parameters are reported in
the BIOS and can be read from the BIOS Hardware Health Configuration menu.
2.8.3.4 Super I/O Floppy Disk Drive (FDD) Controller
The Super I/O FDD controller is compatible with the following specifications.
Enhanced digital data sep arator
Supports automatic write protection via software
Supported capacities:
The FDD controller is interfaced to a FDD connected to the FDD conne ctor on the MMGA.
2.8.3.5 Super I/O Fan Speed Controller
The Super I/O fan speed controller enables the system to monitor the speed of the fan.
One of the pins on the fan connector is reserved for fan speed detection and interfaced to
the fan speed controller on the Super I/O. The fan speed is then reported in the BIOS.
2.8.3.6 Super I/O Keyboard/Mouse Controller
The Super I/O keyboard/mouse controller can execute the 8042 instruction set. Some of
the keyboard controller features are listed below:
The 8042 instruction is compatible with a PS/2 keyboard and PS/2 mouse
Gate A20 and Keyboard re set output
Supports multiple keyboard power on events
Supports mouse double-click and/or mouse move power on events.
2.8.3.7 Super I/O GPIO Ports
The Super I/O has 48 programmable GPIO ports of which 8 are implemented on the
MMGA. The GPIO connector has 8 programmable bits, 4-bit input and 4-bit output.
2.8.3.8 Super I/O Infrared
The Super I/O has dedicated infrared (IrDA) pins that are interfaced to an IrDA connector.
The IrDA connector is compatible with the following standards:
ASKIR
SIR
2.8.3.9 Super I/O Parallel Port
The Super I/O parallel port (LPT) is compatible with the following LPT specifications.
SPP compatible bi-directional parallel port
Enhanced Parallel Port (EPP) mode supported. Compatible with IEEE 1284
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specifications
Extended Capability Port (ECP) mode supported. Compatible with IEEE 1284
specifications
Enhanced printer port back-drive current reduction
Printer power-on damage reduction
Supports POST (Power-On Self Test) Data Port
The parallel port controller is connected to an external DB-26 LPT connector.
2.8.3.10 Super I/O Watchdog Timer
The super I/O watchdog timer has a maximum time resolution of 1 minute or 1 second
with a maximum or either 65,535 minutes or 65,535 seconds.
2.8.4 Fintek F81216DG LPC Serial Port Chipset
The Fintek F81216DG chipset enables the addition of three additional UART serial ports
(COM2,COM3 and COM4). UART includes 16-byte send/receive FIFO. The Fintek serial
port chipset is interfaced to the Southbridge chipset through the LPC bus. Some of the
features of the Fintek chipset are listed below:
The first GbE controller, is an Intel® 82537L PCIe GbE controller and is the interface
between the Intel® ICH9DO Southbridge controller and the LAN1 RJ-45 Ethernet
connector.
The second GbE controller is integrated on the Intel® ICH9DO Sout hbridge and interfaced
to the LAN2 RJ-45 Ethernet LAN connector through an Intel® 82566DM Gigabit Platform
LAN Connect device. The Intel® 82566DM is connected directly to the GbE controller on
the Intel® ICH9DO Southbridge through the GLCI and LCI, which is shared with the PCIe
x1 port 6.
Both of these Ethernet controllers have been described in detail in earlier sections. For
further details please refer to the relevant sections:
A cooling fan and heat sink must be installed on the CPU. Thermal paste must be
smeared on the lower side of the heat sink before it is mounted on the CPU. Heat sinks
are also mounted on the Northbridge and Southbridge chipsets to ensure the operating
temperature of these chips remain low.
2.10.3 Power Consumption
Table 1-4 shows the power consumption parameters for the MMGA running 3D Mark®
2001 SE330 with a 3.0 GHz E6850 Intel® Core™2 Duo processor with four 2.0 GB
800MHz DDR2 DIMMs.
Voltage Current
+3.3V 2.41A
+5.0V 5.71A
+12V 3.69A
5Vsb 0.13A
Table 1-4: Power Consumption
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3.1 Anti-static Precautions
WARNING:
Failure to take ESD precautions during the installation of the MMGA
may result in permanent damage to the MMGA and severe injury to the
user.
Electrostatic discharge (ESD) can cause serious damage to electronic components,
including the MMGA. Dry climates are especially susceptible to ESD. It is therefore critical
that whenever the MMGA, or any other electrical component is handled, the following
anti-static precautions are strictly adhered to.
Wear an anti-static wristband: Wearing a simple anti-static wristband can
help to prevent ESD from damaging the board.
Self-grounding: Before handling the board touch any grounded conducting
material. During the time the board is handled, frequently touch any
conducting materials that are connected to the ground.
Use an anti-static pad: When configuring the MMGA, place it on an
antic-static pad. This re duces the possibility of ESD damaging the MMGA.
Only handle the edges of the PCB: When handling the PCB, hold the PCB
by the edges.
3.2 Unpacking
3.2.1 Unpacking Precautions
When the MMGA is unpacked, please do the following:
Follow the anti-static precautions outlined in Section 3.1.
Make sure the packing box is facing upwards so the MMGA does not fall out
of the box.
Make sure all the components shown in Section 3.3 are present.
Serial port connector (COM2) 10-pin box header COM2
Serial port connector (COM3) 10-pin box header COM3
Serial port connector (COM4) 10-pin box header COM4
SPDIF connector 5-pin header SPDIF1
SPI flash connector 8-pin header JSPI1
TPM connector 20-pin header TPM1
USB connector 8-pin header USB45
USB connector 8-pin header USB67
USB connector 8-pin header USB89
USB connector 8-pin header USB1011
Table 1-6: Peripheral Interface Connectors
4.1.3 External Interface Panel Connectors
Table 1-7 lists the rear panel connectors on the MMGA. Detailed descriptions of these
connectors can be found in Section 4.3.
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Connector Type Label
Audio connector Audio jack AUDIO_CV1
Ethernet and dual USB combo connector RJ-45 and two USB LAN1_USB01
Ethernet and dual USB combo connector RJ-45 and two USB LAN2_USB23
Mouse or keyboard connector PS/2 KB_MS1
Parallel port, serial port and VGA combo
connector
Table 1-7: Rear Panel Connectors
4.2 Internal Peripheral Connectors
Internal peripheral connectors are found on the motherboard and are only accessible
when the motherboard is outside of the chassis. This section has complete descriptions of
all the internal, peripheral connectors on the MMGA.
4.2.1 ATX Power Connector
CN Label: ATX1
CN Type:
CN Location: See Figure 1-22
24-pin A TX (2x12)
DB-25, DB-9 and
DB-15
3IN1_DSUB1
CN Pinouts: See Table 1-8
The ATX connector is connected to an external ATX power supply. Power is provided to
the system, from the power supply through this connector.
The 4-pin CPU power connector is connected to an ATX power supply and powers the
CPU.
Figure 1-24: CPU Power Connector Location
PIN NO. DESCRIPTION
1 GND
2 GND
3 +12V
4 +12V
Table 1-10: CPU Power Connector Pinouts
4.2.4 Digital Input/Output (DIO) Connector
CN Label: DIO1
CN Type:
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CN Location: See Figure 1-25
CN Pinouts: See Table 1-11
The digital input/output connector is managed through a Super I/O chip. The DIO
connector pins are user programmable. To see details on how to program the DIO chip,
please refer to Appendix C.
The CPU cooling fan connector provides a 12V, 500mA current to a CPU cooling fan. The
connector has a "rotation" pin to get rotation signals from fans and notify the system so the
system BIOS can recognize the fan speed. Please note that only specified fans can issue
the rotation signals.
Figure 1-26: +12V Fan Connector Location
PIN NO. DESCRIPTION
1 GND
2 +12VCC
3 Rotation Signal
4 Control
Table 1-12: +12V Fan Connector Pinouts
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4.2.6 Fan Connector, System (+12V, 3-pin)
CN Label: SYS_FAN1
CN Type:
3-pin header (1x3)
CN Location: See Figure 1-27
CN Pinouts: See Table 1-13
The system cooling fan connector provides a 12V, 500mA current to a sy stem cooling fan.
The connector has a "rotation" pin to get rotation signals from fans and notify the system
so the system BIOS can recognize the fan speed. Please note that only specified fans can
issue the rotation signals.
The six SATA drive connectors are each connected to second generation SATA drives.
Second generation SATA drives transfer data at speeds as high as 3.0 Gbps. The SATA
drives can be configured in a RAID configuration.
Figure 1-33: SATA Drive Connector Locations
PIN NO. DESCRIPTION
1 GND
2 TX+
3 TX4 GND
5 RX6 RX+
7 GND
Table 1-19: SATA Drive Connector Pinouts
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4.2.13 Serial Port Connector (COM2, COM 3 and COM4)
CN Label: COM2, COM3 and COM4
CN Type:
10-pin header (2x5)
CN Location: See Figure 1-34
CN Pinouts: See Table 1-20
The 10-pin serial port connector provides a second RS-232 serial communications
channel. The serial port connectors can be connected to external RS-232 serial port
devices.
Figure 1-34: Serial Connector Location
PIN NO. DESCRIPTION PIN NO. DESCRIPTION
1 Data Carrier Direct (DCD) 2 Data Set Ready (DSR)
3 Receive Data (RXD) 4 Request To Send (RTS)
5 Transmit Data (TXD) 6 Clear To Send (CTS)
7 Data Terminal Ready (DTR) 8 Ring Indicator (RI)
9 Ground (GND) 10 N/C
The 2x4 USB pin connectors each provide connectivity to two USB 1.1 or two USB 2.0
ports. Each USB connector can support two USB devices. Additional external USB ports
are found on the rear panel. The USB ports are used for I/O bus expansion.
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4.3 External Peripheral Interface Connector Panel
Figure 1-38 shows the MMGA external peripheral interface connector (EPIC) panel. The
MMGA EPIC panel consists of the following:
3 x Audio jacks
1 x Parallel port
2 x PS/2 keyboard/mouse connectors
2 x RJ-45 LAN connectors
1 x Serial port connector
4 x USB 2.0 ports
1 x VGA connector
Line Out port (Lime): Connects to a headphone or a speaker. With
multi-channel configurations, this port can also connect to front speakers.
Microphone (Pink): Connects a microphone.
Figure 1-39: Audio Connector
4.3.2 Keyboard/Mouse Connector
CN Label: KB_MS1
CN Type:
CN Location: See Figure 1-38
CN Pinouts: See Figure 1-40 and Table 1-24
The MMGA keyboard and mouse connectors are standard PS/2 connectors.
Dual PS/2
Figure 1-40: PS/2 Pinouts
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PIN DESCRIPTION
1 DATA
2 NC
3 GND
4 VCC5
5 CLK
6 NC
Table 1-24: PS/2 Connector Pinouts
4.3.3 LAN and Dual USB Combo Connectors
CN Label: LAN1_USB01 and LAN2_USB23
CN Type:
RJ-45
CN Location: See Figure 1-38
CN Pinouts: See Table 1-25
The MMGA is equipped with two built-in RJ-45 Ethernet controllers. The controllers can
connect to the LAN through two RJ-45 LAN connectors. There are two LEDs on the
connector indicating the status of LAN. The pin assignments are listed in the following
table:
The RJ-45 Ethernet connector has two status LEDs, one green and one yellow. The green
LED indicates activity on the port and the yellow LED indicates the port is linked. See
Table 1-26.
LINK LED Activity LED
Status Description Status Description
Off
Yellow
Blinking
Not linked
Linked
Data activity
Off
Green
Orange
10 Mbps
100 Mbps
1 GbE
Table 1-26: RJ-45 Ethernet Connector LEDs
The MMGA has four external USB 2.0 ports. The ports are integrated into two dual USB
and LAN combo connectors. The ports connect to both USB 2.0 and USB 1.1 devices.
PIN NO. DESCRIPTION
1 VCC
2 DATA4 DATA+
4 GROUND
Table 1-27: USB Port Pinouts
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4.3.4 Parallel Port, Serial Port and VGA Combo Connector
CN Label: 3IN1_DSUB1
CN Type:
DB-25, DB-9 and DB-15
CN Location: See Figure 1-38
CN Pinouts: See Table 1-28, Table 1-29 and Table 1-30
A 25-pin parallel port connector, a male DB-9 serial port (COM1) and a female DB-15
VGA connector are integrated into a single EPIC connector as shown in Figure 1-38.
The MMGA includes one on-board parallel port accessed through one 25-pin D-type
female connector. The parallel port is usually connected to a printer. The connector is
show in Figure 1-42 and the pinouts are shown in Table 1-28.
Figure 1-42 Parallel Port Connector Pinout Locations
PIN Description PIN Description
1 STROBE# 2 DATA 0
3 DATA 1 4 DATA 2
5 DATA 3 6 DATA 4
7 DATA 5 8 DATA 6
9 DATA 7 10 ACKNOWLEDGE
11 BUSY 12 PAPER EMPTY
13 PRINTER SELECT 14 AUTO FORM FEED #
15 ERROR# 16 INITIALIZE
The male DB-9 COM 1 serial port connector is connected to RS-232 serial
communications devices. The connector is show in Figure 1-43 and the pinouts are
shown in Table 1-29.
Failure to take ESD precautions during the installation of the MMGA
may result in permanent damage to the MMGA and severe injury to the
user.
Electrostatic discharge (ESD) can cause serious damage to electronic components,
including the MMGA. Dry climates are especially susceptible to ESD. It is therefore critical
that whenever the MMGA, or any other electrical component is handled, the following
anti-static precautions are strictly adhered to.
Wear an anti-static wristband: Wearing a simple anti-static wristband can
help to prevent ESD from damaging the board.
Self-grounding: Before handling the board touch any grounded conducting
material. During the time the board is handled, frequently touch any
conducting materials that are connected to the ground.
Use an anti-static pad: When configuring the MMGA, place it on an
antic-static pad. This re duces the possibility of ESD damaging the MMGA.
Only handle the edges of the PCB: When handling the PCB, hold the PCB
by the edges.
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5.2 Installation Considerations
NOTE:
The following installation notices and installation considerations should
be read and understood before the MMGA is installed. All installation
notices pertaining to the installation of the MMGA should be strictly
adhered to. Failing to adhere to these precautions may lead to severe
damage of the MMGA and injury to the person installing the
motherboard.
5.2.1 Installation Notices
WARNING:
The installation instructions described in this manual should be carefully
followed in order to prevent damage to the MMGA, MMGA components
and injury to the user.
Before and during the installation please DO the following:
Read the user manual:
oThe user manual provides a complete description of the MMGA
installation instructions and configuration options.
Wear an electrostatic discharge cuff (ESD):
oElectronic components are easily damaged by ESD. Wearing an ESD cuff
removes ESD from the body and helps prevent ESD damage.
Place the MMGA on an antistatic pad:
oWhen installing or configuring the motherboard, place it on an antistatic
oWhen working with the MMGA, make sure that it is disconnected from all
power supplies and that no electricity is being fed into the system.
Before and during the installation of the MMGA DO NOT:
Remove any of the stickers on the PCB board. These stickers are required for
warranty validation.
Use the product before verifying all the cables and power connectors are
properly connected.
Allow screws to come in contact with the PCB circuit, connector pins, or its
components.
5.2.2 Installation Checklist
The following checklist is provided to ensure the MMGA is properly installed.
All the items in the packing list are present
The CPU is installed
The CPU cooling kit is properly installed
A compatible memory module is properly inserted into the slot
The jumpers have been properly configured
The MMGA is inserted into a chassis with adequate ventilation
The correct power supply is being used
The following devices are properly connected
o SATA drives
o Power supply
o USB cable
o Serial port cable
The following external peripheral devices are properly connected to the
chassis:
o Keyboard/Mouse
o VGA screen
o USB devices
o LAN
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5.3 Unpacking
5.3.1 Unpacking Precautions
When the MMGA is unpacked, please do the following:
Follow the anti-static precautions outlined in Section 5.1.
Make sure the packing box is facing upwards so the MMGA does not fall out
of the box.
Make sure all the components in the checklist shown in Chapter 3 are
present.
NOTE:
If some of the components listed in the checklist in Chapter 3 are
missing, please do not proceed with the installation. If any of the
components listed in the checklist below are missing, contact
CyberResearch, Inc.
5.4 CPU, CPU Cooling Kit and DIMM Installation
WARNING:
A CPU should never be turned on without the specified cooling kit
being installed. If the cooling kit (heat sink and fan) is not properly
installed and the system turned on, permanent damage to the CPU,
MMGA and other electronic components attached to the system may
be incurred. Running a CPU without a cooling kit may also result in
injury to the user.
The CPU, CPU cooling kit and DIMM are the most critical components of the MMGA. If
one of these components is not installed the MMGA cannot run.