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CT-CCV6X
Intel® Atom D2000/N2000 Series
COM Express™ Type 6 Module
User’s Manual
Version 1.0
C&T Solution Inc.
12F. -1, No.700, Zhongzheng Rd., Zhonghe Dist., New Taipei City 235, Taiwan
TEL: 886-2-77317888
http://www.candtsolution.com
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Table of Contents
I. Preface ..................................................................................................... ５
1.1 Disclaimer ...................................................................................... ５
1.2 Copyright Notice ............................................................................. ５
1.3 Trademarks Acknowledgment ........................................................ ５
II. Introduction.............................................................................................. ６
2.1 Product Description ........................................................................ ６
2.2 Specifications ................................................................................. ７
2.3 Block Diagram ................................................................................ ９
2.4 SKU ............................................................................................. １０
III. Mechanical Specification ..................................................................... １１
3.1 Module Dimensions ..................................................................... １１
3.2 Layout ......................................................................................... １２
3.3 Connectors .................................................................................. １４
3.3.1 LPC Debug Port: CN2 ....................................................... １４
3.3.2 CPLD JTAGE: CN3 ........................................................... １４
3.3.3 COM Express Connectors ................................................ １４
3.4 Thermal Solutions ....................................................................... １８
3.4.1 Heat Sink .......................................................................... １８
3.4.2 Heat Spreader ................................................................... １９
IV. Features & Interfaces .......................................................................... ２１
4.1 Processor .................................................................................... ２１
4.2 BIOS............................................................................................ ２１
4.3 System Memory .......................................................................... ２１
4.4 Graphics ...................................................................................... ２１
4.4.1 Analog Display Port ........................................................... ２１
4.4.2 LVDS ................................................................................. ２２
4.4.3 Digital Display Interfaces (DDI) ......................................... ２２
4.5 Chipset ........................................................................................ ２５
4.6 USB ............................................................................................. ２５
4.6.1 USB 2.0 ............................................................................. ２５
4.6.1 USB 3.0 ............................................................................. ２６
4.7 SATA ........................................................................................... ２６
4.8 PCI Express ................................................................................ ２７
4.8.1 PCI Express x1 ................................................................. ２７
4.9 High Definition Audio ................................................................... ２７
4.10 Ethernet ..................................................................................... ２８
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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4.11 LPC ........................................................................................... ２８
4.12 SPI ............................................................................................ ２９
4.13 UART ........................................................................................ ２９
4.14 SMBus ....................................................................................... ２９
4.15 ExpressCard ............................................................................. ３０
4.16 General Purpose Input Output .................................................. ３０
4.16.1 GPIO Configuration ......................................................... ３０
4.16.2 Registers Description ...................................................... ３１
4.17 Power and System Management Signals.................................. ３３
4.18 Thermal Management Signals .................................................. ３４
4.19 Miscellaneous Signals ............................................................... ３４
4.20 Watchdog Timer ........................................................................ ３５
4.20.1 Board Design .................................................................. ３５
4.20.2 PSUEDO CODE .............................................................. ３５
V. SYSTEM BIOS ..................................................................................... ３７
5.1 Main ............................................................................................ ３７
5.2 Advanced .................................................................................... ３８
5.2.1 ACPI Settings .................................................................... ３９
5.2.2 Trusted Computing ............................................................ ４０
5.2.3 CPU Configuration ............................................................ ４１
5.2.4 IDE Configuration .............................................................. ４２
5.2.5 USB Configuration ............................................................ ４３
5.2.6 Hardware Monitor .............................................................. ４４
5.2.7 W83627DHG Super IO Configuration ............................... ４５
5.2.8 Serial Port Console Redirection ........................................ ４８
5.2.9 PPM Configuration ............................................................ ４９
5.3 Chipset ........................................................................................ ５０
5.3.1 Host Bridge ....................................................................... ５１
5.3.2 South Bridge ..................................................................... ５３
5.4 Boot ............................................................................................. ５６
5.4.1 CSM parameters ............................................................... ５７
5.5 Security ....................................................................................... ５８
5.6 Save and Exit .............................................................................. ５９
VI. Address Map ....................................................................................... ６０
6.1 I/O Port Address Map .................................................................. ６０
6.2 Interrupt Controller (IRQ) Map ..................................................... ６２
6.3 Memory Map ............................................................................... ６５
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VII. Electrical Specification ....................................................................... ６６
7.1 Input Power ................................................................................. ６６
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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I. Preface
1.1 Disclaimer
All specifications and information in this User’s Manual are believed to be
accurate and up to date. C&T Solution Inc. does not guarantee that the
contents herein are complete, true, accurate or non-misleading. The
information in this document is subject to change without notice and does not
represent a commitment on the part of C&T Solution Inc.
C&T Solution Inc. disclaims all warranties, express or implied, including,
without limitation, those of merchantability, fitness for a particular purpose with
respect to contents of this User’s Manual. Users must take full responsibility for
the application of the product.
1.2 Copyright Notice
All rights reserved. No part of this manual may be reproduced or transmitted in
any form or by any means, electronic or mechanical, including photocopying,
recording, or information storage and retrieval systems, without the prior
written permission of C&T Solutions Inc.
Copyright © 2012 C&T Solutions Inc.
1.3 Trademarks Acknowledgment
Intel®, Celeron® and Pentium® are trademarks of Intel Corporation.
Windows® is registered trademark of Microsoft Corporation.
AMI is trademark of American Megatrend Inc.
IBM, XT, AT, PS/2 and Personal System/2 are trademarks of International
Business Machines Corporation
All other products and trademarks mentioned in this manual are trademarks of
their respective owners.
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II. Introduction
2.1 Product Description
The CT-CCV6X is a new COM (computer-on-module) Express® compact form
factor (95x95mm) in embedded computing platforms. It combines the onboard
Intel® Atom D2550/N2600 processor with Intel® NM10 Express chipset. The
CT-CCV6X is based on the COM Express® specification and features a
standardized connector layout that carries a specified set of signals. With the
Type 6 pin-out connectors, the CT-CCV6X supports DDI/LVDS/VGA, SATA,
HD audio, Gigabit Ethernet, PCIe and USB3.0. This system requires a Carrier
Board to bring out I/O and power up. The benefit of this standardization pin-out
is making the application design more flexible. To accommodate different
ODM requirements, the COM Express module with a Carrier Board is the best
cost-effective solution and reduces development time.
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2.2 Specifications
CPU
Intel® Atom D2550 processor, 1.86GHz
Intel® Atom N2600 processor, 1.6GHz
Chipset
Intel® NM10 PCH
System Memory
One 204-pin DDR3 SODIMM socket
800MHz or 1066MHz
Up to 4GB at Intel® Atom D2550 processor
Up to 2GB at Intel® Atom N2600 processor
BIOS
AMI uEFI BIOS
2MB SPI Flash ROM
SSD
16GB SSD onboard
TPM
Trusted Platform Module compatible with TPM1.2
Infineon SLB9635
Graphics
Dual display
Graphic core frequency
640MHz at D2550 processor
400MHz at N2600 processor
CRT interface supports up to 1920x1200
Single channel of LVDS interface
1-ch 24-bit LVDS supports resolution up to 1440x900
MHz at D2550 processor
1-ch 18-bit LVDS supports resolution up to 1366x768
MHz at N2600 processor
Two DDI ports supports HDMI / DVI / DisplayPort / eDP
Ethernet
Intel® 82583V GbE controller
One 10/100/1000 Base-Tx
Audio
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Integrated in chipset Intel® NM10
SATA Interface
One SATA 3Gb/s port
Optional second SATA
PCIe Lane
Two PCIex1 Lane
Optional third PCIex1 Lane
USB Interface
Eight USB 2.0 ports
Four USB 3.0 ports
LPC Interface
SMBus
SPI Interface
8-bit GPIO
Watchdog Timer
H/W Monitor
Power Management
ACPI (Advanced Configuration and Power Interface)
Form Factor
Compact size, 95mm x 95mm
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2.3 Block Diagram
Connector ROW A,B
CPU
Intel
D2550/N2600
VGA
2xPCIex1
SPI
8-bit DIO
1-ch 24/18-bit LVDS
8xUSB2.0
SATAII
Port1
HDA
Connector ROW CD
DDR3
1067MH
DDI0
(DisplayPort/HDMI)
DDI1
(DisplayPort/HDMI)
PCIex1
Port3
LPC
PCH
Intel NM10
SMBUS
Debug
Port
TPM
SODIMM
Up to
4GB/2GB
TUSB
7340
Selection
Circuit
DMI
4xUSB3.0
Onboard
16GB SSD
SATAII
Port0
Intel
82583V
PCIex1
Port2
BIOS
GbE
CPLD
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2.4 SKU
Product
Number
Processor
PCH
Features
CT-CCV61
Intel Atom
D2550
NM10
1xDDR3, 24-bit LVDS, 2xPCIex1, GbE, 4xUSB3.0,
8xUSB2.0, 1xSATA, onboard 16GB SSD, TMP1.2
CT-CCV62
Intel Atom
N2600
NM10
1xDDR3, 18-bit LVDS, 2xPCIex1, GbE, 4xUSB3.0,
8xUSB2.0, 1xSATA, onboard 16GB SSD, TMP1.2
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III. Mechanical Specification
3.1 Module Dimensions
The PCB size of CT-CCV6X is 95mm x 95mm, the standard COM Express
compact Module size.
The holes shown in the drawing below is for stacking the module with the Heat
Spreader / Heat Sink and the Carrier Board. The mounting holes are 2.7mm,
and the 2.5mm hardware shall be used. The position and the dimension of the
holes are shown in the unit of millimeters.
Top View:
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Side View and Bottom View:
3.2 Layout
There is one SODIMM socket mounted on the top side of the CT-CCV6X.
Two 220-pin COM Express connectors are mounted at the bottom side of the
PCB.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Top View:
Bottom View:
CN4
CN5
CN1
CN3
CN2
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3.3 Connectors
Connector
Description
CN1
SODIMM Socket
CN2
LPC Debug Port
CN3
CPLD JTAGE
CN4
COM™ Express connector Row A, B
CN5
COM™ Express connector Row C, D
3.3.1 LPC Debug Port: CN2
Pin
Signal
Pin
Signal
1
GND
2
3.3V
3
LPC_AD3
4
BIOS_DIS0-L
5
LPC_AD2
6
RESET
7
LPC_AD1
8
CLOCK
9
LPC_AD0
10
FRAME
3.3.2 CPLD JTAGE: CN3
Pin
Signal
Pin
Signal
1
3.3V
2
GND
3
TDO
4
GND
5
TDI 6 GND
7
TMS
8
GND
9
TCK
10
GND
3.3.3 COM Express Connectors
The CT-CCV6X is connected to the carrier board via two 220-pin connectors.
Each connector is break down into two rows. The first connector, CN4,
consists Row A and Row B; the second connector, CN5, consists Row C and
Row D. Their pin-out is as table below.
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Pin
Row A
Row B
Row C
Row D
1
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
2
GBE0_MDI3-
GBE0_ACT#
GND
GND
3
GBE0_MDI3+
LPC_FRAME#
USB_SSRX0-
USB_SSTX0-
4
GBE0_LINK100#
LPC_AD0
USB_SSRX0+
USB_SSTX0+
5
GBE0_LINK1000#
LPC_AD1
GND
GND
6
GBE0_MDI2-
LPC_AD2
USB_SSRX1-
USB_SSTX1-
7
GBE0_MDI2+
LPC_AD3
USB_SSRX1+
USB_SSTX1+
8
GBE0_LINK#
LPC_DRQ0#
GND
GND
9
GBE0_MDI1-
LPC_DRQ1#
USB_SSRX2-
USB_SSTX2-
10
GBE0_MDI1+
LPC_CLK
USB_SSRX2+
USB_SSTX2+
11
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
12
GBE0_MDI0-
PWRBTN#-
USB_SSRX3-
USB_SSTX3-
13
GBE0_MDI0+
SMB_CK
USB_SSRX3+
USB_SSTX3+
14
GBE0_CTREF
SMB_DAT
GND
GND
15
SUS_S3#
SMB_ALERT#
NC
DDI1_CTRLCLK_AUX+
16
SATA0_TX+
SATA1_TX+(Reserved)
NC
DDI1_CTRLDATA_AUX-
17
SATA0_TX-
SATA1_TX-(Reserved)
NC
NC
18
SUS_S4#
SUS_STAT#
NC
NC
19
SATA0_RX+
SATA1_RX+(Reserved)
NC
NC
20
SATA0_RX-
SATA1_RX-(Reserved)
NC
NC
21
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
22
NC
NC
NC
NC
23
NC
NC -
NC
NC
24
SUS_S5#
PWR_OK
DDI1_HPD
NC
25
NC
NC
NC
NC
26
NC
NC -
NC
DDI1_PAIR0+
27
BATLOW#
WDT
NC
DDI1_PAIR0-
28
(S)ATA_ACT#
AC/HAD_SDIN2
NC
NC
29
AC/HDA_SYNC
AC/HAD_SDIN1
NC
DDI1_PAIR1+
30
AC/HAD_RST#
AC/HAD_SDIN0
NC
DDI1_PAIR1-
31
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
32
AC/HDA_BITCLK
SPKR
DDI2_CTRLCLK_AUX+
DDI1_PAIR2+
33
AC/HAD_SDOUT
I2C_CK
DDI2_
DDI1_PAIR2-
34
BIOS_DIS0#
I2C_DAT
DDI2_DDC_AUX_SEL
DDI1_DDC_AUX_SEL
35
THRMTRIP#
THRM#
NC
NC
36
USB6-
USB7-
NC
DDI1_PAIR3+
37
USB6+
USB7+
NC
DDI1_PAIR3-
38
USB_6_7_OC#
USB_4_5_OC#
NC
NC
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Pin
Row A
Row B
Row C
Row D
39
USB4-
USB5-
NC
DDI2_PAIR0+
40
USB4+
USB5+
NC
DDI2_PAIR0-
41
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
42
USB2-
USB3-
NC
DDI2_PAIR1+
43
USB2+
USB3+
NC
DDI2_PAIR1-
44
USB_2_3_OC#
USB_0_1_OC#
NC
DDI2_HPD
45
USB0-
USB1-
NC
NC
46
USB0+
USB1+
NC
DDI2_PAIR2+
47
VCC_RTC
EXCD1_PERST#
NC
DDI2_PAIR2-
48
EXCD0_PERST#
EXCD1_CPPE#
NC
NC
49
EXCD0_CPPE#
SYS_RESET#
NC
DDI2_PAIR3+
50
LPC_SERIRQ
CB_RESET#
NC
DDI2_PAIR3-
51
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
52
NC
NC
NC
NC
53
NC
NC
NC
NC
54
GPI0
GPO1
NC
NC
55
NC
NC
NC
NC
56
NC
NC
NC
NC
57
GND
GPO2
NC
GND
58
NC
NC
NC
NC
59
NC
NC
NC
NC
60
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
61
PCIE2_TX+
PCIE2_RX+
NC
NC
62
PCIE2_TX-
PCIE2_RX-
NC
NC
63
GPI1
GPO3
NC
NC
64
PCIE1_TX+
PCIE1_RX+
NC
NC
65
PCIE1_TX-
PCIE1_RX-
NC
NC
66
GND
WAKE0#
NC
NC
67
GPI2
WAKE1#
NC
GND
68
PCIE0_TX+
PCIE0_RX+
NC
NC
69
PCIE0_TX-
PCIE0_RX-
NC
NC
70
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
71
LVDS_A0+
NC
NC
NC
72
LVDS_A0-
NC
NC
NC
73
LVDS_A1+
NC
GND
GND
74
LVDS_A1-
NC
NC
NC
75
LVDS_A2+
NC
NC
NC
76
LVDS_A2-
NC
GND
GND
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Pin
Row A
Row B
Row C
Row D
77
LVDS_VDD_EN
NC
NC
NC
78
LVDS_A3+
NC
NC
NC
79
LVDS_A3-
LVDS_BKLT_EN
NC
NC
80
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
81
LVDS_A_CK+
NC
NC
NC
82
LVDS_A_CK-
NC
NC
NC
83
LVDS_I2C_CK
LVDS_BKLT_CTRL
NC
NC
84
LVDS_I2C_DAT
VCC_5V_SBY
GND
GND
85
GPI3
VCC_5V_SBY
NC
NC
86
NC
VCC_5V_SBY
NC
NC
87
NC
VCC_5V_SBY
GND
GND
88
PCIE_CK_REF0+
BIOS_DIS1#
NC
NC
89
PCIE_CK_REF0-
VGA_RED
NC
NC
90
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
91
SPI_POWER
VGA_GRN
NC
NC
92
SPI_MISO
VGA_BLU
NC
NC
93
GPO0
VGA_HSYNC
GND
GND
94
SPI_CLK
VGA_VSYNC
NC
NC
95
SPI_MOSI
VGA_I2C_CK
NC
NC
96
TPM_PP
VGA_I2C_DAT
GND
GND
97
NC
SPI_CS#
NC
NC
98
SER0_TX
NC
NC
NC
99
SER0_RX
NC
NC
NC
100
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
101
SER1_TX
FAN_PWMOUT
NC
NC
102
SER1_RX
FAN_TACHIN
NC
NC
103
LID#
SLEEP#
GND
GND
104
VCC_12V
VCC_12V
VCC_12V
VCC_12V
105
VCC_12V
VCC_12V
VCC_12V
VCC_12V
106
VCC_12V
VCC_12V
VCC_12V
VCC_12V
107
VCC_12V
VCC_12V
VCC_12V
VCC_12V
108
VCC_12V
VCC_12V
VCC_12V
VCC_12V
109
VCC_12V
VCC_12V
VCC_12V
VCC_12V
110
GND(FIXED)
GND(FIXED)
GND(FIXED)
GND(FIXED)
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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3.4 Thermal Solutions
There are two thermal solutions for the COM Express Module CT-CCV6X to
dissipate the heat. One is by using a heat sink and the other one is by using a
heat spreader.
3.4.1 Heat Sink
Step 1: Connect the COM Express connectors on the module, CT-CCV6X, to
the corresponding COM connectors on the Carrier Board. Make sure the four
holes at the corners of CT-CCV6X module align to the corresponding pillars on
the Carrier Board.
Step2: Place the heat sink on top of the CT-CCV6X module.
Step3: Use four screws (M2.5x15L) to secure the heat sink with the Carrier
Board through the corresponding holes on the CT-CCV6X.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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3.4.2 Heat Spreader
A heat spreader is designed for the CT-CCV6X to dissipate heat. All heat
generating components are thermally conducted to the heat spreader in order
to avoid hot spots. The assembly of the heat spreader with CT-CCV6X module
and the Carrier board is same as the heat sink.
Step 1: Connect the COM Express connectors on the module, CT-CCV6X, to
the corresponding COM connectors on the Carrier Board. Make sure the four
holes at the corners of CT-CCV6X module align to the corresponding pillars on
the Carrier Board.
Step2: Place the heat spreader on top of the CT-CCV6X module.
Step3: Use four screws (M2.5x15L) to secure the heat sink with the Carrier
Board through the corresponding holes on the CT-CCV6X.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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IV. Features & Interfaces
4.1 Processor
The CT-CCV6X supports Intel® Atom D2550/N2600 processor. This 64-bit and
multi-core mobile processor built on 32-nanometer process technology is
based on a new micro-architecture. This architecture consists a processor and
Platform Controller Hub (PCH) to form a two-chip platform. The processor
includes Integrated Display Engine, Processor Graphics and Integrated
Memory Controller.
4.2 BIOS
The AMI uEFI BIOS, 2MB SPI Flash Rom is used in the CT-CCV6X module.
4.3 System Memory
The Integrated Memory Controller (IMC) of the processor supports one 64-bit
channel of DDR3 protocols. The channel allows the data transfer rate of
800/1066MHz with a 204-pin SODIMM socket. The maximum memory size of
the SODIMM socket is 4GB supported by Intel Atom D2550 on the CT-CCV6X;
2GB supported by Intel Atom N2600.
4.4 Graphics
Intel Atom Processor D2550 and N2600 contain an integrated graphics engine,
video decode and a display controller that supports two pipes to LVDS, CRT,
HDMI/DVI, DP, eDP. The graphic core frequency is 640 MHz at D2550 and
400 MHz at N2600.
4.4.1 Analog Display Port
The Analog Port provides a RGB signal output along with a HSYNC and
VSYNC signal. There is an associated Display Data Channel (DDC) signal pair
that is implemented using GPIO pins dedicated to the analog port. The
intended target device is for a CRT Based monitor with a VGA connector.
The Analog Port can directly drive a standard progressive scan analog monitor
up to a resolution of 1920x1200 pixels with 32-bit color at 60Hz.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Signal
I/O
Description
VGA_RED
O
Red for monitor, analog DAC output, designed to
drive a 37.5Ω equivalent load.
VGA_GRN
O
Green for monitor, analog DAC output, designed
to drive a 37.5Ω equivalent load.
VGA_BLU
O
Blue for monitor, analog DAC output, designed to
drive a 37.5Ω equivalent load.
VGA_HSYNC
O
Horizontal sync output to VGA monitor
VGA_VSYNC
O
Vertical sync output to VGA monitor
VGA_I2C_CLK
I/O
Monitor clock line
VGA_I2C_DATA
I/O
Monitor data line
4.4.2 LVDS
The LVDS transmitter channel of D2550 consists of 4 data pairs and a clock
pair; N2600 consists of 3 data pairs and a clock pair. The LVDS data pair is
used to transfer pixel data as well as the LCD timing control signals. The
maximum resolution is 1440x900 at D2550 CPU and 1366x768 at N2600
CPU.
Signal
I/O
Description
LVDS_A[3:0]+
O
Differential data output - positive
LVDS_A3+ support at D2550 only
LVDS_A[3:0]-
O
Differential data output – negative
LVDS_A3- support at D2550 only
LVDS_A_CLK+
O
Differential clock output - positive
LVDS_A_CLK-
O
Differential clock output - negative
LVDS_VDD_EN
O
LVDS panel power enable
LVDS_BKLT_EN
O
Panel backlight enable control
LVDS_BKLT_CTR
O
Panel backlight brightness control
LVDS_I2C_CLK
I/O
LVDS flat panel I2C clock for EDID read and
control.
LVDS_I2C_DATA
I/O
LVDS flat panel I2C data for EDID read and
control.
4.4.3 Digital Display Interfaces (DDI)
The Intel Atom Processor D2550 and N2600 can drive HDMI, DVI, eDP and
Display Port natively. Its two display ports can support up to two different
images on two different display devices.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Signal
I/O
Description
DDI[1:2]_PAIR[0:3]+
DDI[1:2]_PAIR[0:3]-
O
DDI 1 and 2 Pair[0:3] differential pairs
DDI[1:2]_DDC_AUX_SEL
I
Selects the function of
DDI[1:2]_CTRLCLK_AUX+ and
DDI[1:2]_CTRLDATA_AUX-. This pin shall have
a 1M pull-down to logic ground on the Module. If
this input is floating the AUX pair is used for the
DP AUX+/- signals. If pulled-high the AUX pair
contains the CTRLCLK and CTRLDATA signals.
DDI[1:2]_CTRLCLK_AUX+
I/O
DP AUX+ function if DDI[1:2]_DDC_AUX_SEL is
no connect
I/O
HDMI/DVI I2C CTRLCLK if
DDI[1:2]_DDC_AUX_SEL is pulled high
DDI[1:2]_CTRLDATA_AUXI/O
DP AUX- function if DDI[1:2]_DDC_AUX_SEL is
no connect
I/O
HDMI/DVI I2C CTRLDATA if
DDI[1:2]_DDC_AUX_SEL is pulled high
DDI[1:2]_HPD
I
DDI Hot-Plug Detect
Signal
Pin
eDP/DP
HDMI/DVI
DDI
1
DDI1_PAIR0+
D26
DP1_LANE0+
TMDS1_DATA2+
DDI1_PAIR0-
D27
DP1_LANE0-
TMDS1_DATA2-
DDI1_PAIR1+
D29
DP1_LANE1+
TMDS1_DATA1+
DDI1_PAIR1-
D30
DP1_LANE1-
TMDS1_DATA1-
DDI1_PAIR2+
D32
DP1_LANE2+
TMDS1_DATA0+
DDI1_PAIR2-
D33
DP1_LANE2-
TMDS1_DATA0-
DDI1_PAIR3+
D36
DP1_LANE3+
TMDS1_CLK+
DDI1_PAIR3-
D37
DP1_LANE3-
TMDS1_CLK-
DDI1_CTRLCLK_AUX+
D15
DP1_AUX+
TMDS1_SCL
DDI1_CTRLDATA_AUX-
D16
DP1_AUX-
TMDS1_SDA
DDI1_DDC_AUX_SEL
D34
CONFIG1 (pull
down to GND)
Pull up to 5V
DDI1_HPD (3.3V
active high signal)
C24
Signal
Pin
DP
HDMI/DVI
DDI
2
DDI2_PAIR0+
D39
DP2_LANE0+
TMDS2_DATA2+
DDI2_PAIR0-
D40
DP2_LANE0-
TMDS2_DATA2-
DDI2_PAIR1+
D42
DP2_LANE1+
TMDS2_DATA1+
DDI2_PAIR1-
D43
DP2_LANE1-
TMDS2_DATA1-
DDI2_PAIR2+
D46
DP2_LANE2+
TMDS2_DATA0+
DDI2_PAIR2-
D47
DP2_LANE2-
TMDS2_DATA0-
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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DDI2_PAIR3+
D49
DP2_LANE3+
TMDS2_CLK+
DDI2_PAIR3-
D50
DP2_LANE3-
TMDS2_CLK-
DDI2_CTRLCLK_AUX+
C32
DP2_AUX+
HDMI2_SCL
DDI2_CTRLDATA_AUX-
C33
DP2_AUX-
HDMI2_SDA
DDI2_DDC_AUX_SEL
C34
CONFIG1 (pull
down to GND)
Pull up to 5V
DDI2_HPD (3.3V
active high signal)
D44
4.4.3.1 High Definition Multimedia Interface (HDMI)
The HDMI is provided for transmitting uncompressed digital audio and video
signals to television sets, projectors and other video displays.
4.4.3.2 Digital Video Interface (DVI)
The PCH digital ports can be configured to drive DVI-D. DVI uses TMDS for
transmitting data from the transmitter to the receiver, which is similar to the
HDMI protocol but the audio and CEC. When a system has support for DVI-I
port, then either VGA or the DVI-D through a single DVI-I connector can be
driven but not both simultaneously.
The HDMI or DVI supports the resolution up to 1920x1200 at 60Hz.
HDMI Signal
I/O
Description
TMDS[1:2]_CLK+
TMDS[1:2]_CLK-
O
HDMI/DVI TMDS Clock differential pair
TMDS[1:2]_DATA[0:2]+
TMDS[1:2]_DATA[0:2]-
O
HDMI/DVI TMDS lanes 0, 1 and 2 differential
pairs
HDMI[1:2]_SCL
I/O
HDMI/DVI I2C control clock
HDMI[1:2]_SDA
I/O
HDMI/DVI I2C control data
4.4.3.3 Display Port (DP)
The Display Port is a digital communication interface that utilized differential
signaling to achieve a high bandwidth bus interface designed to support
connections between PCs and monitors, projectors, and TV displays. The
Display Port supports the resolution up to 2560x1600 at D2550 CPU and
1600x1200 at N2600 CPU.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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4.4.3.4 Embedded DisplayPort (eDP)
Embedded DisplayPort (eDP) is an embedded version of the DisplayPort
standard oriented towards applications such as notebook and All-In-One PCs.
eDP is supported only on Digital Display Port 1. The resolution is up to
1920x1080 at D2550 CPU and 1366x768 at N2600 CPU.
DP Signal
I/O
Description
DP[1:2]_LANE[0:3]+
DP[1:2]_LANE[0:3]-
O
Uni-directional main link for the transport of
isochronous streams and secondary-data
packets
DP[1:2]_AUX+
DP[1:2]_AUX-
I/O
Half-duplex bi-directional AUX channel for
services such as link configuration or
maintenance and EDID access
4.5 Chipset
The Platform Controller Hub (PCH) used on CT-CCV6X is Intel NM10. The
PCH provides extensive I/O support with two COM™ Express connectors.
4.6 USB
4.6.1 USB 2.0
The two EHCI Controllers of Intel® NM10 offer eight USB2.0 ports. Each
USB2.0 port supports USB 1.1 and 2.0 compliant devices.
Signal
I/O
Description
USB[0:7]+
USB[0:7]-
I/O
USB differential pairs, channels 0 through 7
USB_0_1_OC#
I
USB over-current sense, USB 0 and 1. A pull-up
for this line shall be present on the Module. An
open drain driver from a USB current monitor on
the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB_2_3_OC#
I
USB over-current sense, USB 2 and 3. A pull-up
for this line shall be present on the Module. An
open drain driver from a USB current monitor on
the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB_4_5_OC#
I
USB over-current sense, USB 4 and 5. A pull-up
for this line shall be present on the Module. An
open drain driver from a USB current monitor on
the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Signal
I/O
Description
USB_6_7_OC#
I
USB over-current sense, USB 6 and 7. A pull-up
for this line shall be present on the Module. An
open drain driver from a USB current monitor on
the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
4.6.1 USB 3.0
There are four USB 3.0 ports by extended from the Port 3 of the PCIe x1
interface.
Signal
I/O
Description
USB_SSRX[0:3]+
USB_SSRX[0:3]-
I
USB differential pairs, channels 0 through 3,
receive Data/Address/Command signals
USB_SSTX[0:3]+
USB_SSTX[0:3]-
I
USB differential pairs, channels 0 through 3,
transmit Data/Address/Command signals
4.7 SATA
The PCH NM10 provides two Serial ATA (SATA) ports. The Port 0 and 1
support SATA 3.0 Gb/s device transfers. This interface may be used for Serial
Attached SCSI (SAS).
Signal
I/O
Description
SATA0_TX+
SATA0_TX-
O
Serial ATA 0 transmit differential pair
SATA0_RX+
SATA0_RX-
I
Serial ATA 0 receive differential pair
SATA1_TX+
SATA1_TX-
O
Serial ATA 1 transmit differential pair
(reserved)
SATA1_RX+
SATA1_RX-
I
Serial ATA 1 receives differential pair
(reserved)
(S)ATA_ACT#
OC
ATA (parallel and serial) activity indicator, active
low
The SATA Port 0 of CT-CCV6X can be used for general SATA devices. The
SATA Port 1 of CT-CCV6X has been used for onboard 16GB SSD. Also, this
interface has been reserved on the COM Express connector Row B. When the
onboard SSD of CT-CCV6X is not applied, the interface on the COM Express
connector could be used for general SATA devices.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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4.8 PCI Express
4.8.1 PCI Express x1
There are four one-lane PCI Express ports available in the PCH NM10. The
ports are compliant to the PCI Express 1.0 specification running at 2.5 Gb/s.
Only two PCIe x1 Ports, 0~1, are left on the CT-CCV6X COM™ Express
connector since Port 2 is occupied by GbE and Port 3 is occupied by USB3.0.
Signal
I/O
Description
PCIE[0:1]_TX+
PCIE[0:1]_TX-
O
PCI Express Differential transmit Pairs 0 through
1
PCIE[0:1]_RX+
PCIE[0:1]_RX-
I
PCI Express Differential receive Pairs 0 through
1
PCIE_CK_REF0+
PCIE_CK_REF0-
O
Reference clock output for all PCI Express and
PCI Express Graphics lanes
4.9 High Definition Audio
The High Definition Audio (HDA) controller is integrated with PCH NM10. It
communicates with the external codec(s) over the Intel® High Definition Audio
serial link. The controller consists of a set of DMA engines that are used to
move samples of digitally encoded data between system memory and an
external codec(s). The PCH implements a single Serial Data Output signal
(HDA_SDOUT) that is connected to all external codecs. Three Serial Digital
Input signals (HDA_SDIN[2:0]) provided by the PCH support up to three
codecs.
Signal
I/O
Description
AC/HDA_RST#
O
Reset output to CODEC, active low
AC/HDA_SYNC
O
Sample-synchronization signal to the CODEC(s)
AC/HDA_BITCLK
O
Serial data clock generated by the external
CODEC(s)
AC/HDA_SDOUT
O
Serial TDM data output to the CODEC
AC/HDA_SDIN[2:0]
I/O
Serial TDM data input from up to 3 CODECs
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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4.10 Ethernet
The Intel® 82583V, a fully-integrated Gigabit Ethernet Media Access Control
(MAC) provides 10/100/1000Mb/s Ethernet interface. The Intel® 82583V is
connected to Port 2 of the PCIe x1 in the PCH. Gigabit transformer has to be
designed on the Carrier Board.
The integrated GbE controller contains power management registers for PCIE,
so it supports the Advanced Configuration and Power Interface (ACPI)
specification. This enables the network-related activity (using an internal host
wake signal) to wake up the host.
Signal
I/O
Description
GBE0_MDI[0:3]+
GBE0_MDI[0:3]-
I/O
Gigabit Ethernet Controller 0: Media Dependent
Interface Differential Pairs 0, 1, 2, 3. The MDI
can operate in 1000, 100 and 10 Mbit/sec
modes. Some pairs are unused in some modes,
per the following:
1000BASE-T 100BASE-TX 10BASE-T
MDI[0]+/- B1_DA+/- TX+/- TX+/MDI[1]+/- B1_DB+/- RX+/- RX+/MDI[2]+/- B1_DC+/MDI[3]+/- B1_DD+/-
GBE0_ACT#
OD
Gigabit Ethernet Controller 0 activity indicator,
active low
GBE0_LINK#
OD
Gigabit Ethernet Controller 0 link indicator, active
low
GBE0_LINK100#
OD
Gigabit Ethernet Controller 0 100 Mbit/sec link
indicator, active low
GBE0_LINK1000#
OD
Gigabit Ethernet Controller 0 1000 Mbit/sec link
indicator, active low
GBE0_CTREF
REF
Reference voltage for Carrier Board Ethernet
channel 0 magnetics center tap. The reference
voltage is 3.3V.
4.11 LPC
The LPC interface provides legacy I/O support on a Carrier Board via a Super
I/O and system management devices.
Signal
I/O
Description
LPC_AD[3:0]
I/O
LPC multiplexed address, command and data
LPC_FRAME#
O
LPC frame indicates the start of an LPC cycle
LPC_DRQ[0:1]#
I
LPC serial DMA request input
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
２９
Signal
I/O
Description
LPC_SERIRQ
I/O
LPC serial interrupt
LPC_CLK
O
LPC clock output – 33MHz nominal
4.12 SPI
The Serial Peripheral Interface (SPI) is a 4-pin interface that supports
SPI-compatible flash devices. The SPI flash device can be up to 16MB
(128Mb). The SPI bus is clocked at either 20MHz, 25MHz, 33MHz or 50 MHz.
SPI devices selected should support one of these frequencies.
Signal
I/O
Description
SPI_CS#
O
Chip select for Carrier Board SPI - may be
sourced from chipset SPI0 or SPI1
SPC_MISO
I
Data in to Module from Carrier SPI
SPI_MISI
O
Data out from Module to Carrier SPI
SPI_CLK
O
Clock from Module to Carrier SPI
SPI_POWER
O
Power supply for Carrier Board SPI – sourced
from Module – nominally 3.3V. The Module shall
provide a minimum of 100mA on SPI_POWER.
Carriers shall use less than 100ma of
SPI_POWER. SPI_POWER shall only be used
to power SPI devices on the Carrier Board.
4.13 UART
The CT-CCV6X module supports two serial RX/TX ports.
Signal
I/O
Description
SER[0:1]_TX
O
UART transmitter
SER[0:1]_RX
I
UART receiver
4.14 SMBus
The SMBus port is specified for system management functions. It is used on
the Module to manage system function such as reading the DRAM SPD
EEPROM and setting clock synthesizer parameters. If the SMBus is used on
the carrier board, then great care must be taken that no conflicts with the
on-Module SMBus devices occur. It may be useful for implementation on the
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Carrier Board of standards such as Smart Battery. The maximum capacitance
on the Carrier Board shall not exceed 100pF.
Signal
I/O
Description
SMB_CK
I/OD
System Management Bus bidirectional clock line
SMB_DAT
I/OD
System Management Bus bidirectional data line
SMB_ALERT#
I
System Management Bus Alert – active low input
can be used to generate an SMI# (System
Management Interrupt) or to wake the system.
4.15 ExpressCard
ExpressCard is a small form factor expansion card that uses PCI Express or
USB as the interface. It is similar in concept and scope to CardBus. The
CT-CCV6X supports two Express Card interface.
Signal
I/O
Description
EXCD[0:1]_CPPE#
I
PCI ExpressCard: PCI Express capable card
request, active low, one per card
EXCD[0:1]_PERST#
O
PCI ExpressCard: reset, active low, one per card
4.16 General Purpose Input Output
GPI and GPO pins may be implemented as GPIO (Module specific). GPI and
GPO pins may be implemented as SDIO.
Signal
I/O
Description
GPO[0:3]
O
General purpose output pins. Upon a hardware
reset, these outputs should be low
GPI[0:3]
I
General purpose input pins. Pulled high
internally on the Module.
4.16.1 GPIO Configuration
Output Pin default setting is HIGH.
Pin #
GPIO#
Default Configuration
B63
GPIO7
GPO3
B57
GPIO6
GPO2
B54
GPIO5
GPO1
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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Pin #
GPIO#
Default Configuration
A93
GPIO4
GPO0
A85
GPIO3
GPI3
A67
GPIO2
GPI2
A63
GPIO1
GPI1
A54
GPIO0
GPI0
The GPIO function, provided by Intel Tiger Point NM10, can be accessed
through GPIO Base Address Register (GPIOBASE). The configuration on
CT-CCV6X is described as below.
Register
Address
GPIOBASE Base Address
0x500
The general I/O read/write function is used to access and configure the NM10.
Through the I/O read or write command, the current status of GPIO can
configure each pin to input or output.
4.16.2 Registers Description
4.16.2.1 GPIO Use Select Register 1 (Offset GPIOBASE+0x00)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO3
GPIO2
GPIO1
GPIO0
GPIO Use Select Register 2 (Offset GPIOBASE+0x30)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO7
GPIO6
GPIO5
GPIO4
Bit X = 0 means Native Function
Bit X = 1 means GPIO Function
4.16.2.2 GPIO Input/Output Select Register 1 (Offset GPIOBASE+0x04)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO3
GPIO2
GPIO1
GPIO0
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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GPIO Input/Output Select Register 2 (Offset GPIOBASE+0x34)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO7
GPIO6
GPIO5
GPIO4
Bit X = 0 means Output Pin
Bit X = 1 means Input Pin
4.16.2.3 GPIO Level for Input or Output Register 1
(Offset GPIOBASE+0x0C)
If Pin X is configured as output, the output value (0 or 1) could be selected by
user.
If it is programmed as an input, this register reflects the state of the input
signal.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO3
GPIO2
GPIO1
GPIO0
GPIO Level for Input or Output Register 1
(Offset GPIOBASE+0x38)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO7
GPIO6
GPIO5
GPIO4
4.16.2.4 GPIO Signal Invert Register (Offset 0x2C)
It will invert the polarity of the Input Port register data.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GPIO3
GPIO2
GPIO1
GPIO0
Bit X = 0 means Polarity is retained
Bit X = 1 means Polarity is inverted
[Note] The GPIO4~GPIO7 can’t be set to inverted.
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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4.16.2.5 PSUEDO CODE
Example 1 Change GPIO2 from output to input
Step1: ByteData = ReadIOByte(0x504) //Read current setting from
configuration register
Step2: ByteData = ByteData | Bit 4 //Set Bit4 1. It means input
Step3: WriteIOByte(0x504, ByteData) //Write back to configuration register
Example2 Set GPIO3 to output LOW
Step1: ByteData = ReadIOByte(0x50C) //Read current setting from Output
Port register
Step2: ByteData =ByteData & 0xDF //Set Bit5 0. It means output low
Step3: WriteIOByte(0x50C, ByteData) //Write back to Output Port
Register
4.17 Power and System Management Signals
Signal
I/O
Description
SUS_S3#
O
Indicates system is suspended to RAM state.
Active low output.
SUS_S4#
O
Indicates system is suspended to Disk state.
Active low output.
SUS_S5#
O
Indicates system is in Soft Off state.
SUS_STAT#
O
Indicates imminent suspend operation.
PWRBTN#
I
Power button to bring system out of S5 (soft off),
active on rising edge.
PWR_OK
I
Power OK from main power supply
BATLOW#
I
Indicates that external battery is low.
SYS_RESET#
I
Reset button input. Active low input.
CB_RESET#
O
Carrier Board Reset. Active low input.
WAKE0#
I
PCI Express wake up signal.
WAKE1#
I
General purpose wake up signal.
VCC_RTC
I
RTC External Battery
LID#
I
LID switch
SLEEP#
I
Sleep Button
FAN_PWMOUT
O
FAN PWM out
FAN_TACHIN
I
Fan Tacho in
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
３４
4.18 Thermal Management Signals
Signal
I/O
Description
THRMTRIP#
O
Active low output indicating that the CPU has
entered thermal shutdown.
THRM#
I
Input from off-module temp sensor indicating and
over-temp situation.
4.19 Miscellaneous Signals
Signal
I/O
Description
I2C_CK
O
General purpose I2C port clock output
I2C_DAT
I/O
General purpose I2C port data I/O lin
WDT
O
Indicator for Watchdog Timeout
SPKR
O
Output for audio enunciator-the “speaker” in
PC-AT systems
Signal
I/O
Description
BIOS_DIS0#
BIOS_DIS1#
I
Selection straps to determine the BIOS boot
device. The Carrier should only float these or pull
them low, please refer to the table below for
strapping option of BIOS disable signals.
BIOS_DIS1#
BIOS_DIS0#
Chipset
SPI CS1#
Destination
Chipset
SPI CS0#
Destination
Carrier
SPI_CS#
SPI
Descriptor
BIOS
Entry
Ref
Line
1 1 Module
Module
High
Module
SPI0/SPI1
0
1 0 Module
Module
High
Module
Carrier FWH
1
0 1 Module
Carrier
SPI0
Carrier
SPI0/SPI1
2
0 0 Carrier
Module
SPI1
Module
SPI1/SPI1
3
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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4.20 Watchdog Timer
4.20.1 Board Design
The WDT (Watchdog Timer) is implemented by using TCO function in NM10.
Register
Address
TCO I/O Base (TCOBASE)
0x460
RCBA Memory Base (RCBA)
0xFED1C000
Notes:
1. TCO (Total Cost of Ownership)
2. RCBA (Root Complex Base Address)
4.20.2 PSUEDO CODE
Step1 Enable TCO Timer Reboot Function
Target: Clear RCBA+3410h Bit 5 to 0
Step1: DWordData = ReadMemoryDword(0xFED1F410) //0xFED1C000+0x3410
Step2: DWordData = DWordData & 0xFFFFFFDF //Clear DWordData Bit
5 to 0
Step3: WriteMemoryDWord(0xFED1F410, DWordData) //Write back to memory
Note:
Enable TCO Timer Reboot Function
Set Initial Value into Timer Register
Reload Timer Value into Register
Start to Count
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CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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The system will be rebooted after user’s setting +2 seconds. 2 seconds added is
Intel’s limitation.
Step2 Set Initial Value into Timer Register
Target: Set TCO Timer Initial Value (Offset 0x12)
Step1: WordData = ReadIOWord(0x472) //0x460+0x12
Step2: WordData = Set Bit[9:0] //0x000~0xFFF. 1 ticks = 0.6s
Step3: WriteIOWord(0x472,WordData) //Write back to IO
Example:
If you want to reboot after 5 seconds, you should set WordData to 0x05.
5 - 2 = 3 //5 minus system’s default 2 seconds leaves the real setting
data.
3 / 0.6 = 5 //5 ticks
Step3 Reload Timer Value into Register
Target: Reload Timer Initial Value to TCO_RLD Register (Offset 0x00)
Step1: WriteIOWord(0x460, 0x01) //Reload Timer
Step4 Start to Count
Target: Enable Time to count (Offset 0x08)
Step1: WordData = ReadIOWord(0x468) //0x460+0x08
Step2: WordData = WordData & 0xF7FF //Enabled to count
Step3: WriteIOWord(0x468, WordData) // Write back to IO
Page 38
CT-CCV6X Intel Atom D2000/N2000 COM Express Type 6 Module
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V. SYSTEM BIOS
The system BIOS software is stored on EEPROM. The BIOS provides an
interface to modify the configuration. When the battery is removed, all the
parameters will be reset.
Turn on the computer and press <DEL> or <F2> to enter the setup screens.
5.1 Main
The Main setup screen is showed as following when the setup utility is entered.
System Date/Time is set up in the Main Menu.
System Language: Choose the system default language
System Date: MM/DD/YYYY. Set the Date. Use Tab to switch between Date
elements.
System Time: HH:MM:SS. Set the Time. Use Tab to switch between Time
elements.
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5.2 Advanced
Launch PXE OpROM : Enable or Disable Boot Option for Legacy Network
Devices.
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5.2.1 ACPI Settings
Enable ACPI Auto Configuration: Enable or Disable BIOS ACPI Auto
Configuration.
ACPI Sleep State: Select the highest ACPI sleep state the system will enter
when the SUSPEND button is pressed.
Select between [Suspend Disabled], [S1 (CPU Stop Clock)] and [S3 (Suspend
to RAM)].
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5.2.2 Trusted Computing
Security Device Support enables or disables BIOS support for security
device. O.S. will not show Security Device. TCG EFI protocol and INT1A
interface will not be available.
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5.2.3 CPU Configuration
Hyper-threading: Enabled for Windows XP and Linux (OS optimized for
Hyper-Threading Technology) and disabled for other OS (OS not optimized for
Hyper-Threading Technology). When disabled, only one thread per enabled
core is enabled.
Execute Disable Bit: XP can prevent certain classes of malicious buffer
overflow attacks when combined with a supporting OS (Windows Server 2003
SP1, Windows XP SP2, SusE Linux 9.2, RedHat Enterprise 3 Update 3.)
Limit CPUID Maximum: Disabled for Windows XP.
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5.2.4 IDE Configuration
The BIOS automatically detects the presence of SATA device and the
hardware installed in the SATA ports will be showed in the configuration. Each
port can be enabled or disabled individually.
Configure SATA as: Select IDE or AHCI mode for SATA controller
operations.
Port0 Speed Limit: Select between [No Limit], [GEN1 Rate], or [GEN2 Rate].
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5.2.5 USB Configuration
Legacy USB Support: AUTO option disables legacy support if no USB
devices are connected. DISABLE option will keep USB devices available only
for EFI applications.
EHCI Hand-off: This is a workaround for OS without EHCI hand-off support.
The EHCI ownership change should be claimed by EHCI driver.
USB transfer time-out: Select between [1 sec], [5 sec], [10 sec] or [20 sec].
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5.2.6 Hardware Monitor
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5.2.7 W83627DHG Super IO Configuration
Two serial ports could be configured.
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5.2.7.1 Serial Port0 Configuration
Each serial port could be enabled or disabled.
Serial Port 0 could change the setting to the following:
[Auto]
[IO=3F8h; IRQ=4;]
[IO=3F8h; IRQ=3,4,5,6,7,10,11,12;]
[IO=2F8h; IRQ=3,4,5,6,7,10,11,12;]
[IO=3E8h; IRQ=3,4,5,6,7,10,11,12;]
[IO=2E8h; IRQ=3,4,5,6,7,10,11,12;]
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5.2.7.2 Serial Port1 Configuration
Each serial port could be enabled or disabled.
Serial Port 1 could change the setting to the following:
[Auto]
[IO=2F8h; IRQ=3;]
[IO=3F8h; IRQ=3,4,5,6,7,10,11,12;]
[IO=2F8h; IRQ=3,4,5,6,7,10,11,12;]
[IO=3E8h; IRQ=3,4,5,6,7,10,11,12;]
[IO=2E8h; IRQ=3,4,5,6,7,10,11,12;]
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5.2.8 Serial Port Console Redirection
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5.2.9 PPM Configuration
CPU C state Report
When this option is set to “enabled” (default is set to disabled), it will expand
two sub-options: “Enhanced C state” and “CPU C6 state”.
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5.3 Chipset
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5.3.1 Host Bridge
Select Memory Power Voltage Support: Select between [1.5V] and [1.35V].
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5.3.1.1 Intel IGD Configuration
IGFX – Boot Type: Select the Video Device which will be activated during
POST. This has no effect if external graphics present. Select between [VBIOS
Default], [CRT], [LFP], [EFP], [CRT+EFP] and [LFP+EFP].
LCD Panel Type: Select LCD panel used by Internal Graphics Device by
selecting the appropriate setup item: [VBIOS Default], [640x480 LVDS],
[800x600 LVDS], [1024x768 LVDS], [1280x1024 LVDS], [1366x768 LVDS] or
[1280x800 LVDS].
Backlight Control: Select between [PWM Inverted] and [PWM Normal].
Active LFP: Select the Active LFP Configuration.
No LVDS: VBIOS does not enable LVDS.
Int-LVDS: VBIOS enables LVDS driver by Integrated encoder.
Fixed Graphics Memory Size: Select Fixed Graphics Memory Size between
[128MB] or [256MB].
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5.3.2 South Bridge
TPT Devices: Enable or disable Intel(R) IO Controller Hub (TPT) devices.
DMI Link ASPM Control: The control of Active State Power Management on
both NB side and SB side of the DMI Link.
PCI-Exp. High Priority Port: Select a PCI Express High Priority Port between
[Disabled], [Port 0], [Port 1], [Port 2] and [Port 3].
High Precision Timer: [Enable] or [Disable]
Restore AC Power Loss: Select between [Always OFF], [Always ON] and
[Last State] when power is re-applied after a power failure.
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5.3.2.1 TPT Devices
Azalia Controller: Select between [Disabled] and [HD Audio]
USB Function: Disable or enable USB Function.
USB 2.0(EHCI) Support: Enable or disable USB2.0 (EHCI) Support.
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5.3.2.2 PCI Express Root Port Configuration
Each PCI Express Port from 0 to 3 can be setup.
Each PCI Express Root Port can be enabled or disabled individually.
ASPM L0s: [Disabled], [Root Port Only], [Endpoint Port Only] or [Both Root
And Endpoint Ports]
ASPM L1: [Disabled] or [Enabled]
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5.4 Boot
Boot Configuration: Number of seconds to wait for setup activation key.
65535 (0xFFFF) means indefinite waiting.
Bootup NumLock State: Select [Enable] or [Disable] for the keyboard
NumLock state.
Quiet Boot: Enables or disables Quiet Boot option.
GateA20 Active:
[Upon Request] – GA20 can be disabled using BIOS services.
[Always] – do not allow disabling GA20; this option is useful wen any RT
code is executed above 1MB.
Option ROM Message: Set display mode [Force BIOS] or [Keep Current]
for Option ROM.
Boot Option #1: Set the system boot order.
Hard Drive BBS Priorities: Set the order of the legacy devices in this
group.
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5.4.1 CSM parameters
OpROM execution, boot options filter, etc.
Launch CSM: This option controls if CSM will be launched always or never.
Boot option filer: This option controls what devices system can boot to [UEFI
and Legacy], [Legacy only] or [UEFI only].
Launch PXE OpROM policy: This controls the execution of UEFI and Legacy
PXE OpROM, [Do not launch], [UEFI only] or [Legacy only].
Launch Storage OpROM policy: This controls the execution of UEFI and
Legacy Storage OpROM, [Do not launch], [UEFI only] or [Legacy only].
Launch Video OpROM policy: This controls the execution of UEFI and
Legacy Video OpROM, [Do not launch], [UEFI only] or [Legacy only].
Other PCI device ROM priority: For PCI devices other than Network, Mass
storage or Video defines which OpROM to launch, [UEFI OpROM] or [Legacy
OpROM].
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5.5 Security
Administrator’s and User’s passwords could be set.
If ONLY the Administrator’s password is set, then this only limits access to
Setup and is only asked for when entering Setup. If ONLY the User’s password
is set, then this is a power on password and must be entered to boot or enter
Setup. In Setup, the user will have administrator rights. The minimum length of
the password is 3 and the maximum length is 20.
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5.6 Save and Exit
Save Changes and Exit: Exit system setup after saving the changes.
Discard Changes and Exit: Exit system setup without saving any changes.
Save Changes and Reset: Reset the system after saving the changes.
Discard Changes and Reset: Reset system setup without saving any
changes.
Save Changes: Save Changes done so far to any of the setup options.
Discard Changes: Discard Changes done so far to any of the setup options.
Restore Defaults: Restore/Load Default values for all the setup options.
Save as User Defaults: Save the changes done so far as user Defaults.
Restore user Defaults: Restore the User Defaults to all the setup options.
Launch EFI Shell from filesystem device: Attempts to Launch EFI Shell
application (Shellx64.efi) from one of the available filesystem devices.
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VI. Address Map
6.1 I/O Port Address Map
The assignment of the I/O port addresses for the CT-CCV6X with CT-BT601
carrier board under Windows® 7 Ultimate/64bit are shown below.
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6.2 Interrupt Controller (IRQ) Map
The interrupt controller map for the CT-CCV6X with the CT-BT601 carrier
board under Windows® 7 Ultimate/64bit are as shown below.
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6.3 Memory Map
The memory map of DRAM for the CT-CCV6X with CT-BT601 carrier board
under Windows® 7 Ultimate/64bit are shown below.
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VII. Electrical Specification
7.1 Input Power
The carrier board for the CT-CCV6X shall supply a single main power rail with
a nominal value of +12V and two additional rails, a +5V standby power and
+3V RTC power.
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