CTLST CAT22C10JA-20TE13, CAT22C10J-30TE13, CAT22C10J-20TE13, CAT22C10PI-30TE13, CAT22C10PI-20TE13 Datasheet

CAT22C10

256-Bit Nonvolatile CMOS Static RAM

FEATURES

■ Single 5V Supply

■ Fast RAM Access Times:

–200ns
–300ns

■ Infinite E

■ CMOS and TTL Compatible I/O

■ Power Up/Down Protection

■ 100,000 Program/Erase Cycles (E

2

PROM to RAM Recall

2

PROM)

DESCRIPTION

The CAT22C10 NVRAM is a 256-bit nonvolatile memory
organized as 64 words x 4 bits. The high speed Static
RAM array is bit for bit backed up by a nonvolatile
E2PROM array which allows for easy transfer of data
from RAM array to E2PROM (STORE) and from
E2PROM to RAM (RECALL). STORE operations are
completed in 10ms max. and RECALL operations typi­cally within 1.5µs. The CAT22C10 features unlimited
RAM write operations either through external RAM

■ Low CMOS Power Consumption:

–Active: 40mA Max.
–Standby: 30 µA Max.

■ JEDEC Standard Pinouts:

–18-pin DIP
–16-pin SOIC

■ 10 Year Data Retention

■ Commercial, Industrial and Automotive

Temperature Ranges

writes or internal recalls from E2PROM. Internal false
store protection circuitry prohibits STORE operations
when VCC is less than 3.0V.

The CAT22C10 is manufactured using Catalyst’s ad­vanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles (E2PROM)
and has a data retention of 10 years. The device is
available in JEDEC approved 18-pin plastic DIP and 16­pin SOIC packages.

PIN CONFIGURATION

V

NC

A

4

A

3

A

2

A

1

A

0

CS

V

ss

STORE

© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice

18

1
2

17

3

16

4

15

5

14

6

13

7

12

8
9

10

cc

NC
A

5

I/O
I/O
I/O
I/O
WE

11

RECALL

22C10 F01 22C10 F02

SOIC Package (J)DIP Package (P)

A

1

4

A

3

A

2

A

3
2
1
0

1

A

0

CS

V

ss

STORE RECALL

16
15

2

14

3
4
5
6
7

8

13
12
11
10

PIN FUNCTIONS

Pin Name Function

A0–A

5

V

cc

A

5

I/O

4

I/O

3

I/O

2

I/O

1

WE

9

I/O0–I/O

3

WE Write Enable
CS Chip Select
RECALL Recall
STORE Store
V

CC

V

SS

NC No Connect

1

Address
Data In/Out

+5V
Ground

Doc. No. 25018-0A 2/98 N-1

CAT22C10

BLOCK DIAGRAM

2

E

PROM ARRAY

ROW

SELECT

COLUMN SELECT

CONTROL

LOGIC

CS WE

STATIC RAM

ARRAY

READ/WRITE

CIRCUITS

I/O0I/O1I/O2I/O

STORE

RECALL

3

MODE SELECTION

(1)(2)(3)

A
A
A

A
A
A

STORE

RECALL

0
1
2

3
4
5

Input

Mode

CSCS

CS

CSCS

WEWE

WE

WEWE

RECALLRECALL

RECALL

RECALLRECALL

STORESTORE

STORE I/O

STORESTORE

Standby H X H H Output High-Z
RAM Read L H H H Output Data
RAM Write L L H H Input Data
(E2PROM→RAM) X H L H Output High-Z RECALL

5153 FHD F02

(E2PROM→RAM) H X L H Output High-Z RECALL
(RAM→E2PROM) X H H L Output High-Z STORE
(RAM→E2PROM) H X H L Output High-Z STORE

POWER-UP TIMING

(4)

Symbol Parameter Min. Max. Units

VCCSR VCC Slew Rate 0.5 0.005 V/ms

Note:
(1) RECALL signal has priority over STORE signal when both are applied at the same time.
(2) STORE is inhibited when RECALL is active.
(3) The store operation is inhibited when VCC is below ≈ 3.0V.
(4) This parameter is tested initially and after a design or process change that affects the parameter.

Doc. No. 25018-0A 2/98 N-1

2

CAT22C10

ABSOLUTE MAXIMUM RATINGS*

Temperature Under Bias ................. –55°C to +125°C

Storage Temperature....................... –65°C to +150°C

Voltage on Any Pin with

Respect to Ground

VCC with Respect to Ground ................ -2.0V to +7.0V

Package Power Dissipation

Capability (Ta = 25°C)................................... 1.0W

(2)

..............-2.0 to +VCC +2.0V

*COMMENT

Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation
of the device at these or any other conditions outside of
those listed in the operational sections of this specifica­tion is not implied. Exposure to any absolute maximum
rating for extended periods may affect device perfor­mance and reliability.

Lead Soldering Temperature (10 secs) ............ 300°C

Output Short Circuit Current

(3)

........................ 100 mA

RELIABILITY CHARACTERISTICS

Symbol Parameter Min. Max. Units Reference Test Method

(1)

N
T
V
I

END
DR
ZAP

LTH

(1)

(1)

(1)(4)

Endurance 100,000 Cycles/Byte MIL-STD-883, Test Method 1033
Data Retention 10 Years MIL-STD-883, Test Method 1008
ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015
Latch-Up 100 mA JEDEC Standard 17

D.C. OPERATING CHARACTERISTICS

VCC = +5V ±10%, unless otherwise specified.

Limits

Symbol Parameter Min. Typ. Max. Unit Conditions

I

CC

Current Consumption 40 mA All Inputs = 5.5V
(Operating) TA = 0°C

All I/O’s Open

I

SB

Current Consumption 30 µA CS = V

CC

(Standby) All I/O’s Open

I

LI

I

LO

V

IH

V

IL

V

OH

V

OL

V

DH

Input Current 10 µA0 ≤ VIN ≤ 5.5V
Output Leakage Current 10 µA0 ≤ V
High Level Input Voltage 2 V

CC

V

OUT

≤ 5.5V

Low Level Input Voltage 0 0.8 V
High Level Output Voltage 2.4 V IOH = –2mA
Low Level Output Voltage 0.4 V IOL = 4.2mA
RAM Data Holding Voltage 1.5 5.5 V V

CC

CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V

Symbol Parameter Max. Unit Conditions

(1)

C

I/O

(1)

C

IN

Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) The minimum DC input voltage is -0.5V. During transitions, inputs may undershoot to -2.0V for periods of less than 20 ns. Maximum DC

voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from -1V to VCC +1V.

Input/Output Capacitance 10 pF V
Input Capacitance 6 pF V

I/O

IN

= 0V

= 0V

3

Doc. No. 25018-0A 2/98 N-1