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ST5461B02-3
Specification
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CSOT ST5461B02-3 Specification

ST5461B02-3 Product Specification
MODEL: ST5461B02-3
Ver. 1.1 Date: 26.Apr.2013
Customer’s Approval
CSOT
Signature Date Approved By Product Director
Name: Albert Hu
Signature:
Reviewed By PM Manager
Name: Aaron Tu
Signature:
Reviewed By Project Leader
Name: Hank Hu
Signature:
Reviewed By PM
Date
Date
Date
Date
Name: Julie Wu
Signature:
The copyright belongs to Shenzhen China Star 1 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
ST5461B02-3 Product Specification
Contents
1. General Description ....................................................................................................................................... 4
1.1 Product Features .................................................................................................................................. 4
1.2 Overview .............................................................................................................................................. 4
1.3 General Information ............................................................................................................................. 4
2. Absolute Maximum Ratings .......................................................................................................................... 5
2.1 Absolute Maximum Ratings (TA = 25 ± 2 °C) ..................................................................................... 5
2.2 Environment Requirement (Based on CSOT Module MT5461B02-1) ............................................... 5
2.3 Absolute Ratings of Environment (Open Cell) .................................................................................... 5
3. Electrical Specification .................................................................................................................................. 6
3.1 Open Cell Power Consumption (TA = 25 ± 2 °C) ............................................................................... 6
3.2 LVDS Characteristics ........................................................................................................................... 7
4. Input Terminal Pin Assignment ..................................................................................................................... 8
4.1 Interface Pin Assignment ..................................................................................................................... 8
4.3 LVDS Interface .................................................................................................................................. 11
4.3.1 VESA Format (SELLVDS = H) .............................................................................................. 11
4.3.2 JEIDA Format (SELLVDS = L or Open) ................................................................................ 12
5. Interface Timing ........................................................................................................................................... 13
5.1 Timing Table (DE Only Mode) .......................................................................................................... 13
5.2 Power On/Off Sequence ................................................................................................................... 15
6. Optical Characteristics ................................................................................................................................. 18
6.1 Measurement Conditions ................................................................................................................... 18
6.2 Optical Specifications ........................................................................................................................ 19
7. Mechanical Characteristics .......................................................................................................................... 24
7.1 Mechanical Specification ................................................................................................................... 24
7.2 Packing ............................................................................................................................................... 25
7.2.1 Packing Specifications ............................................................................................................ 25
7.2.2 Packing Method ...................................................................................................................... 25
8.1 Open Cell Label ................................................................................................................................. 26
8.2 Carton Label ...................................................................................................................................... 26
8.3 Pallet Label ........................................................................................................................................ 27
9. Precautions ................................................................................................................................................... 28
9.1 Assembly and Handling Precautions ................................................................................................. 28
9.2 Safety Precautions .............................................................................................................................. 28
The copyright belongs to Shenzhen China Star 2 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
ST5461B02-3 Product Specification
Revision History
Version Date Page Section Description Revision by
Ver.1.1 26.Apr.2013 28 All
Preliminary Specification was First Issued
Julie Wu
The copyright belongs to Shenzhen China Star 3 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
ST5461B02-3 Product Specification
1. General Description
1.1 Product Features
- FHD Resolution (1920 x 1080 )
- Very High Contrast Ratio: 4000:1
- Fast Response Time
- Ultra Wide Viewing Angle: 178°(H)/178°(V) (CR10)
- DE (Data Enable)Mode
- LVDS (Low Voltage Differential Signaling) Interface
1.2 Overview
ST5461B02-3 is a diagonal 54.6” color active matrix LCD open cell whit 2ch-LVDS interface. This open cell is a
transmissive type display operating in the normally black mode. It supports 1920 x 1080 FHD resolution and can display up to
16.7M colors (8bit). Each pixel is divided into Red, Green and Blue sub-pixels which are arranged in vertical stripe.
This open cell dedicates for LCD TV products and provides excellent performance which includes high brightness, ultra
wide viewing angle, high color saturation and high color depth. CSOT open cell comply with ROHS for identification.
1.3 General Information
Item Specification Unit Note
Active Area 1209.6 (H) * 680.4 (V) mm
Cell Size 1223.6 (H) * 697.1 (V) * 1.75 (D) mm
Weight 3.5 kg Max.
Driving Scheme a-Si TFT Active Matrix -
Number of Pixels 1920 * 1080 pixel
Pixel Pitch (Sub Pixel) 0.21 * 0.63 mm
Pixel Arrangement RGB Vertical Stripe -
Display Colors 16.7 M color
Display Mode Transmissive Mode, Normally Black -
Glass Thickness (Array/CF) 0.7 mm
R = (0.638, 0.335)
Color Chromaticity
G = (0.321, 0.630) B = (0.157, 0.052) W = (0.280, 0.290)
Contrast Ratio 4000:1(Typ.)
8bit
Typical value measured at CSOT’s module MT5461B02-1’BLU
Cell Transmittance 5.96(Typ.) %
View Angle (CR10)
+89/-89 (H), +89/-89 (V) (Typ.)
Polarizer (CF side) Anti-glare, Haze 2%, Hard Coating (3H)
Polarizer (TFT side) Hard Coating (3H)
The copyright belongs to Shenzhen China Star 4 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
2. Absolute Maximum Ratings
2.1 Absolute Maximum Ratings (TA = 25 ± 2 °C)
The followings are maximum values which, if exceeded, may cause damage to the unit.
ST5461B02-3 Product Specification
Item Symbol
Va lu e
Unit
Min. Max.
Power Supply Voltage VCC -0.3 13.8 V
Input Signal Voltage VIN -0.3 3.6 V
2.2 Environment Requirement (Based on CSOT Module MT5461B02-1’BLU)
(1) Temperature and relative humidity range are shown as below.
Relative Humidity (%RH)
100
39ºC, 90%
80
60
Operating Range
40
-40
-20
20
0
Storage Range
20
40
60
Temperature (ºC)
80
Fig. 2.1 Operating and storage environment
(a) 90%RH maximum (T
(b) Wet-bulb temperature should be 39ºC maximum (T
≤ 39 ºC).
A
> 39 ºC).
A
(c) No condensation.
(2) The storage temperature is between - 20 ºC to 60 ºC, and the operating ambient temperature is between 0 ºC to 50 ºC
The maximum operating temperature is based on the test condition that the surface temperature of display area is less than
or equal to 65ºC with LCD module in a temperature controlled chamber alone. Thermal management should be considered
in final product design to prevent the surface temperature of display area from being over 65ºC. The range of operating
temperature may degrade in case of improper thermal management in the end product design.
(3) The rating of environment is based on LCD module. Leave LCD cell alone, this environment condition can’t be guaranteed.
Except LCD cell, the customer has to consider the ability of other parts of LCD module and LCD module process.
2.3 Absolute Ratings of Environment (Open Cell)
When storing open cell as spares for a long time, please follow the precaution instructions:
(1) Do not store the module in high temperature and high humidity for a long time. It is highly recommended to store the
module with temperature from 20ºC to 30ºC in normal humidity (50 ± 10%RH) with shipping package.
(2) The open cell should be keep within one month shelf life.
The copyright belongs to Shenzhen China Star 5 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
3. Electrical Specification
3.1 Open Cell Power Consumption (TA = 25 ± 2 °C)
ST5461B02-3 Product Specification
Parameter Symbol
Power Supply Voltage VCC
Rush Current I
Power Supply
Current
CMOS Interface
Note:
(1) The ripple voltage should be controlled less than 10% of V
(2) Measurement condition: V
White Pattern I
Horizontal Stripe ICC -
Black Pattern ICC -
Input High Threshold Voltage V
Input Low Threshold Voltage VIL 0 - 0.7 V
= 12V, Rising time = 470μs.
CC
RUSH
CC
IH
Va lu e
Min.
10.8 12.0 13.2
- - 2.5 A (2)
-
2.7 - 3.3 V
.
CC
VCCx = 0.9
VCC
Typ.
0.45
1.1
0.46
Max.
0.59
1.43
0.6
Unit Note
V (1)
A
A
A
(3)
(3) Measurement condition: V
A. White Pattern B. Horizontal Pattern
C. Black Pattern
VCCx = 0.1
GND
470μs
Fig. 3.1 VCC rising time condition
= 12V, Ta = 25 ± 2ºC, F = 60 Hz. The test patterns are shown as below.
CC
G
R
R
R
B
G G
B
B
G
R
R
R
G
G
B
B
B
Fig. 3.2 Test patterns
The copyright belongs to Shenzhen China Star 6 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
G
R R
B
G
B
3.2 LVDS Characteristics
Parameter
Symbol
ST5461B02-3 Product Specification
Va lu e
Unit Note
Min. Typ. Max.
Differential Input High Threshold Voltage
Differential Input Low Threshold Voltage
LVDS Interface
Common Input Voltage
Differential Input Voltage |VID| 200 400 600 mV
Terminating Resistor RT 87.5 100 112.5 ohm
Note:
(1) The LVDS input signal has been defined as follows:
V
CM
GND
V
+100 - - mV
TH
- - -100 mV
V
TL
V
1.0 1.2 1.4 V
CM
VTH
V
TL
|V
|
ID
(1)
Fig. 3.3 LVDS input signal
The copyright belongs to Shenzhen China Star 7 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
ST5461B02-3 Product Specification
4. Input Terminal Pin Assignment
4.1 Interface Pin Assignment
CN1: 187147-51221-3 (P-two) or equivalent (see Note (4))
Pin No. Symbol Description Note
1 WP Write Protect (High: Write Enable, Low or Open: Write Disable )
2 SCL I2C Serial Clock (for adjust VCOM) (2)
3 SDA I2C Serial Data (for adjust VCOM)
4 N.C No Connection (1)
5 L/R_O
( High: Left Glass turn on Low: Right glass turn on)
6 N.C. No Connection
Input Signal for LVDS Data Format Selection
Output Signal for Left Right Glasses Control
7 SELLVDS
(3)
(High: VESA Format, Low or Open: JEIDA Format)
8 N.C. No Connection (1)
9 N.C. No Connection (1)
10 N.C. No Connection (1)
11 GND Ground
12 ORX0- Odd Pixel Negative LVDS Differential Data Input. Channel 0
13 ORX0+ Odd Pixel Positive LVDS Differential Data Input. Channel 0
14 ORX1- Odd Pixel Negative LVDS Differential Data Input. Channel 1
15 ORX1+ Odd Pixel Positive LVDS Differential Data Input. Channel 1
16 ORX2- Odd Pixel Negative LVDS Differential Data Input. Channel 2
17 ORX2+ Odd Pixel Positive LVDS Differential Data Input. Channel 2
18 GND Ground
19 OCLK- Odd Pixel Negative LVDS Differential Clock Input
20 OCLK+ Odd Pixel Positive LVDS Differential Clock Input
21 GND Ground
22 ORX3- Odd Pixel Negative LVDS Differential Data Input. Channel 3
23 ORX3+ Odd Pixel Positive LVDS Differential Data Input. Channel 3
24 N.C. No Connection (1)
25 N.C. No Connection (1)
Input Signal for 2D/3D Mode Selection
26 2D/3D
(High: 3D Enable, LOW: 3D Disable)
27 N.C. No Connection (1)
28 ERX0- Even Pixel Negative LVDS Differential Data Input. Channel 0
29 ERX0+ Even pixel Positive LVDS Differential Data Input. Channel 0
30 ERX1- Even Pixel Negative LVDS Differential Data Input. Channel 1
The copyright belongs to Shenzhen China Star 8 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
ST5461B02-3 Product Specification
31 ERX1+ Even Pixel Positive LVDS Differential Data Input. Channel 1
32 ERX2- Even Pixel Negative LVDS Differential Data Input. Channel 2
33 ERX2+ Even Pixel Positive LVDS Differential Data Input. Channel 2
34 GND Ground
35 ECLK- Even Pixel Negative LVDS Differential Clock Input
36 ECLK+ Even Pixel Negative LVDS Differential Clock Input
37 GND Ground
38 ERX3- Even Pixel Negative LVDS Differential Data Input. Channel 3
39 ERX3+ Even Pixel Positive LVDS Differential Data Input. Channel 3
40 N.C. No Connection (1)
41 N.C. No Connection (1)
42 N.C. No Connection (1)
43 N.C. No Connection (1)
44 GND Ground
45 GND Ground
46 GND Ground
47 N.C. No Connection (1)
48 VCC +12V Power Supply
49 VCC +12V Power Supply
50 VCC +12V Power Supply
51 VCC +12V Power Supply
Note:
(1) For CSOT internal only, please let it open. (2) 3D Format: Default line by line.
(3) High: connect to + 3.3V → VESA Format; Low: connect to GND or Open → JEIDA format.
(4) The first LVDS data is ODD LVDS data.
(5) The direction of pin assignment is shown as below:
Fig. 4.1 LVDS connector direction sketch map
The copyright belongs to Shenzhen China Star 9 / 28 Ver.1.1 Optoelectronics Technology Co., Ltd. Any unauthorized use is prohibited.
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