CRYSTAL Logic CRD4201-2 User Manual
CRD4201-2
CrystalClear™ AC '97 Six Channel Primary ACR Audio Reference Design
Features
l Six Channel Analog Audio Output
l Built-in Headphone Amplifier
l CS4201 audio codec and CS4334 DACs
l 20-bit D to A conversion (DAC)
l 18-bit A to D conversion (ADC)
l S/PDIF (IEC-958) optical digital output
l Complete suite of Analog I/O connections:
– Line, Mic, CD, Video and Aux Inputs
– Line Front, and Line Rear Outputs
l 2-layer low cost PC board
l Meets Intel
l Exceeds Microsoft’s
audio performance requirements.
®
AC ‘97 version 2.1 specification
®
PC 99 and PC-2001
Description
The CRD4201-2 Advanced Communications Riser
(ACR) reference design features six channel analog audio outputs and a optical S/PDIF digital output. This
board uses the CS4201 audio codec which has several
advanced features such as a built-in headphone amplifier, up to 30 dB of microphone boost, and serial digital
audio outputs.
The CRD4201-2 reference design is available by ordering the CMK4201-2 manufacturing kit. This kit includes
a full set of schematic design files (OrCAD
®
CAD
9.1 formats), PCB job files (PADS® ASCII), PCB
artwork files, and bill of materials. This reference design
offers significant cost savings over competing solutions
and can be easily modified to meet your specific design
goals.
ORDERING INFO
CMK4201-2 (Manufacturing Kit)
®
7.2 and Or-
Microphone Input
Front Channel Outputs
Front Channel Outputs
Headphone Output
Rear Channel Outputs
Center Channel and
Sub-Woofer Outputs
S/PDIF Digital
Optical Output
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
MIC
IN
AUX INVIDEO INCD ININT MODEM
LINE
IN
LINE
OUT
HEADPH
OUT
SURR
OUT
CNT/LFE
OUT
S/PDIF
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2001
Cirrus Logic
CRD4201-2
CS4201
OUT
(All Rights Reserved)
DS483RD2A2
JUN ‘01
1
TABLE OF CONTENTS
1. GENERAL INFORMATION ...................................................................................3
2. SCHEMATIC DESCRIPTION ................................................................................3
2.1 CS4201 Audio Codec .................................................................................3
2.2 Analog Inputs ..............................................................................................3
2.3 Rear, Center and Sub-Woofer Outputs ......................................................4
2.4 Front Channel and Headphone Outputs ....................................................4
2.5 S/PDIF Optical Output ...............................................................................4
2.6 ACR Connector and EEPROM ...................................................................4
2.7 Component Selection .................................................................................4
2.8 EMI Components ........................................................................................5
3. GROUNDING AND LAYOUT ................................................................................5
3.1 Partitioned Voltage and Ground Planes .....................................................5
3.2 CS4201 Layout Notes .................................................................................5
4. REFERENCES .......................................................................................................6
4.1 ADDENDUM ...............................................................................................6
5. BILL OF MATERIALS .........................................................................................19
LIST OF FIGURES
CRD4201-2
Figure 1. Block Diagram ....................................................................................................7
Figure 2. CS4201 Audio Codec .........................................................................................8
Figure 3. Analog Inputs ......................................................................................................9
Figure 4. Rear, Center, and Sub-Woofer Outputs ...........................................................10
Figure 5. Front Channel and Headphone Outputs ..........................................................11
Figure 6. S/PDIF Optical Output ......................................................................................12
Figure 7. ACR Connector .................................................................................................13
Figure 8. PCB Layout: Top Assembly Drawing ................................................................14
Figure 9. PCB Layout: Top Layer ....................................................................................15
Figure 10. PCB Layout: Bottom Layer .............................................................................16
Figure 11. PCB Layout: Drill Drawing ..............................................................................17
Figure 12. PCB Layout: Top Silkscreen ..........................................................................18
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
Microsoft , Windows 95, Windows 98 and Windows Millennium and WHQL is registered trademark of Microsoft.
CrystalClear is a trademark of Cirrus Logic, Inc.
Intel is a registered trademark of Intel Corporation.
OrCAD is a registered trademark of OrCAD, Inc.
PADS is a registered trademark of, PADS Software, Inc.
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information
describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained
in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express
or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This
document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be
copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior
written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic
files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the
prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks
or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found
at http://www.cirrus.com.
2 DS483RD2A2
CRD4201-2
1. GENERAL INFORMATION
The CRD4201-2 reference design is an ACR card
that features six channel CD quality analog audio
outputs. The card includes a CS4201 AC ’97 audio
codec and two CS4334 24-bit serial stereo DACs.
This combination gives the CRD4201-2 a rich feature set and industry leading audio performance.
The CS4201 on this card is configured as the primary AC ‘97 audio codec. If there is an AC ‘97 audio codec on the motherboard, it must be disabled.
The CS4201 audio codec has a stereo 20-bit DAC,
a stereo 18-bit ADC, and a very flexible analog audio mixer. The serial data outputs are paired with
two CS4334 DACs to provide four additional channels of analog audio. The CS4201 also features
three stereo pairs of line level analog inputs, a microphone input, and a stereo pseudo-differential
CD input. The input signals can be routed to the
ADC for recording or mixed together for recording
and direct playback. The CS4201 has internal registers that are used to control its various features
such as volume levels, audio muting, and signal
routing. The CS4201 maintains high audio quality
®
and exceeds the Microsoft
audio performance specification.
The CS4201 audio codec communicates to the audio controller across the ACR interface through the
AC-Link. The AC-Link is a 5-wire serial digital interface that transfers digital audio between the two
devices and also sends commands from the audio
controller to the CS4201’s registers. For more information on the AC-Link, see the Intel® AC’97
version 2.1 specification.
PC-99 and PC-2001
2. SCHEMATIC DESCRIPTION
The block diagram in Figure 1 illustrates the interconnections between the schematic pages found at
the end of this document. Sections 2.1 through 2.8
describe the circuitry contained in these schematics.
2.1 CS4201 Audio Codec
The CS4201 audio codec is shown in Figure 2. The
input signals to the CS4201 originate from the analog inputs in Figure 3, and the analog outputs are
shown in Figure 5. AFLT1 and AFLT2 (pins 29,
30) require 1000 pF NPO/COG capacitors connected to analog ground. These capacitors provide
a single pole lowpass filter at the inputs of the
ADC. No other input filtering is required.
FLT3D, FLTI, and FLTO (pins 32, 33, 34) form the
internal analog 3D enhancement filter. The FLT3D
pin requires a 0.01 µF capacitor to analog ground.
The FLT0 and FLT1 pins require a NPO/COG
1000 pF series capacitor.
The AC-Link may require series termination resistors to prevent reflections. These are normally
placed as close as possible to the transmitting end
of a particular AC-Link signal. Both SDATA_IN
(pin 8) and BIT_CLK (pin 6) are outputs of the
CS4201 and each have a 47 Ω series termination
resistor.
The CS4201 is powered by separate analog and
digital power supplies, each with their own respective grounds. The AGND symbols refer to analog
ground, and DGND symbols refer to digital
ground. The analog and digital grounds must be
connected together. For best results, connect them
together at a single point with a 0.050 inch trace underneath the CS4205. Each power pin needs separate decoupling capacitors. The CS4201 audio
codec uses a 0.1 uF ceramic capacitor for each of
the 3.3 V digital and 5 V analog supply pins. These
decoupling capacitors are placed as close as possible to their respective pins.
2.2 Analog Inputs
The LINE_IN, VIDEO, and AUX_IN stereo input
jacks in Figure 3 are connected to a 6 dB voltage
divider and AC coupled to the CS4201. The voltage divider allows input signal levels of up to
DS483RD2A2 3
CRD4201-2
2 Vrms. The 2.2 µF AC coupling capacitor values
are used to minimize low frequency roll-off.
The microphone circuit is AC coupled by a 1 µF capacitor to minimize low frequency roll-off. The
microphone circuit provides low voltage phantom
power for electret microphones. Phantom power is
derived from the +5 V analog supply and provides
a maximum of 4.2 V under no load and a minimum
of 2.0 V under a 0.8 mA load. These parameters are
required by PC-99 and PC-2001.
The CS4201 features a pseudo-differential CD input that minimizes common mode noise and interference. Each CD signals acts as one side of the
differential input and CD_COM acts as the other
side. CD_COM is used as the common return path
for both the left and right channels.
2.3 Rear, Center, and Sub-Woofer Outputs
The outputs in Figure 4 drive the rear speakers
(surround), center speaker (CNT), and sub-woofer
(LFE) in a six channel audio application. These
four outputs are driven digitally from the CS4201
through two serial output ports and converted to analog audio through two high-performance CS4334
24-bit stereo DACs.
2.4 Front Channel and Headphone Outputs
Figure 5 details the Headphone Output and Line
Output circuits. The Line Outputs are the main analog outputs in a two channel system or the Front
Outputs in a six channel audio system.
The Line Outputs of the CS4201 (pins 35 and 36)
are buffered by a Motorola MC34072 dual opamp. The MC34072 is a high performance low
noise op-amp well suited for audio applications.
Line Out is designed to drive high impedance loads
of 10 KΩ or higher.
The CS4201 has a built in headphone amplifier on
pins 39 and 41. These outputs are capable of driv-
ing headphones with impedances as low as 32 Ω.
The headphone outputs are AC coupled through
220 µF capacitors. These large capacitor values
create excellent low frequency response even under
32 Ω loads.
2.5 S/PDIF Optical Output
The S/PDIF (IEC-958) digital output shown in
Figure 6, is compatible with digital outputs on consumer devices such as Mini Disk recorders and
consumer stereo receivers. The S/PDIF output operates at a fixed sampling frequency of 48 kHz. It
uses an industry standard TOSLINK digital optical
transmitter, the Toshiba TOTX-173.
2.6 ACR Connector and EEPROM
The ACR connector is shown in Figure 7. ACR is a
motherboard interface that supports audio, modem,
LAN, and DSL subsystems. ACR applications are
targeted at OEMs, system manufacturers, and system integrators who wish take advantage of physically separating their audio, modem, or LAN
circuitry from the PC motherboard. ACR accomplishes this without the additional cost associated
with the interface circuitry required for a PCI bus
add-in card.
The CRD4201-2 uses a 24LC09 EEPROM to store
configuration data for plug-and-play enumeration.
The 24LC09 is designed specifically for ACR applications. The base address of the device is internally wired to 0xB0. The EEPROM holds the
Subsystem Vendor ID and Subsystem ID. For ACR
design specifications, programming utilities, and
information on programming the EEPROM see the
Advanced Communication Riser Special Interest
Group (ACR SIG) homepage at http://www.acrsig.org/.
Note: an ACR signal called PRIMARY_DN# is
normally tied to ID0# on the CS4201. This signal is
used to set the AC ’97 codec on the ACR card as either the primary or secondary audio codec. The
CRD4201-2 is designed to have the only audio co-
4 DS483RD2A2
CRD4201-2
dec in the system so the PRIMARY_DN# signal
trace has been removed.
2.7 Component Selection
Great attention was given to the particular components used on the CRD4201-2 board with cost, performance, and package selection as the most
important factors. Listed are some of the guidelines
used in the selection of components:
• No components smaller than 0805 SMT package.
• Only single package passive components. No
resistor packs. This reduces the risk of crosstalk
between analog audio signals.
• All components except connectors, jumpers
and the 24.576 MHz crystal are in surface
mount packages.
• Dual footprints are used for the 24.576 MHz
crystal.
2.8 EMI Components
Optional capacitors and inductors are included to
help the board meet EMI compliance tests, such as
FCC Part 15. Choose these component values according to individual requirements.
3. GROUNDING AND LAYOUT
The component layout and signal routing of the
CRD4201-2 provides a good model for laying out
your own ACR add-in card.
3.1 Partitioned Voltage and Ground
Planes
It is critical for good audio performance to separate
digital and analog sections to prevent digital noise
from effecting the performance of the analog circuits. The analog section of the CRD4201-2 is
completely isolated from the digital section with a
100 mil partition. Partitioning is defined as the absence of copper on all signal layers. The analog and
digital sections each have their own separate
ground planes. All analog components, power traces, and signal traces are routed over the analog
ground plane. Digital components, power traces
and signal traces are not allowed to crossover into
the analog section.
The CS4201 audio codec is placed at the transition
point between the analog and digital ground planes.
The pins are arranged on the CS4201 so that the analog and digital signals are separated from each
other. The analog and digital ground planes must
be tied together for the CS4201 to maintain proper
voltage references. For best results, the two ground
planes are tied together with a single 50 mil trace
under the CS4201 near its digital ground pins.
Data converters are generally susceptible to noise
on the crystal pins. In order reduce noise from coupling onto these pins, the area around the 24.576
MHz crystal and its signal traces is filled with copper on the top and bottom of the PCB and attached
to digital ground.
A separate chassis ground provides a noise-free
reference point for all of the EMI suppression components. The chassis ground plane is connected to
the analog ground plane at the external jacks.
3.2 CS4201 Layout Notes
Refer to the CS4201 Data Sheet for analog and digital partitioning guidelines and bypass capacitors
placement. Pay special attention to the bypass capacitors on REFFLT, AFLT1, AFLT2 and the
power supply capacitors.
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4. REFERENCES
1) Intel®, Audio Codec ‘97 Component Specification, Revision 2.1, May 22, 1998.
http://developer.intel.com/ial/scalableplatforms/audio/
CRD4201-2
2) ACR Special Interest Group, ACR Specification 1.0
http://www.acrsig.org/
3) Cirrus Logic, CS4201 Audio Codec ‘97 Data Sheet
http://www.cirrus.com/products
4) Steve Harris, Clif Sanchez, Personal Computer Audio Quality Measurements
http://www.cirrus.com/pubs/meas100.pdf
5) Microsoft, PC Design Guidelines
http://www.microsoft.com/hwdev/desguid/
6) M. Montrose, Printed Circuit Board Design Techniques for EMC Compliance (2nd edition), IEEE
Press, New York: 2000.
,
, Version 1.0
4.1 ADDENDUM
• Schematic drawings
• Layout drawings
• Bill of materials
6 DS483RD2A2
CRD4201-2
ANALOG_IN
ANALOG_IN
LINE_IN_L
LINE_IN_R
CD_IN_L
CD_IN_R
CD_COM
VIDEO_IN_L
VIDEO_IN_R
AUX_IN_L
AUX_IN_R
MIC_IN
PHONE_IN
MONO_OUT
PC_BEEP
CS4201
LINE_IN_L
LINE_IN_R
CD_IN_L
CD_IN_R
CD_COM
VIDEO_IN_L
VIDEO_IN_R
AUX_IN_L
AUX_IN_R
MIC_IN
PHONE_IN
MONO_OUT
PC_BEEP
CS4201
ACR_BUS
ACR_BUS
PRIM_DN#
PRIM_DN#
ANALOG_OUT
LINE_OUT_L
LINE_OUT_R
VREFOUT
HP_OUT_L
HP_OUT_R
HP_OUT_C
SDOUT
ABITCLK
ASDOUT
ASYNC
ARST#
ARST#
ASYNC
ABITCLK
SPDIF/SDO2
ASDIN
ASDIN
ASDOUT
SCLK
LRCLK
SPDIF/SDO2
SPDIF_TX
LINE_OUT_L
LINE_OUT_R
VREFOUT
HP_OUT_L
HP_OUT_R
HP_OUT_C
ANALOG_OUT
SERIAL PORT
SDOUT
SCLK
LRCLK
SPDIF/SDO2
ABITCLK
SERIAL PORT
SPDIF_OUT
SPDIF_TX
SPDIF_OUT
Figure 1. Block Diagram
DS483RD2A2 7
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