Cronologic xTDC4 User Manual

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Revision 1.57 as of 2018-01-02 Firmware 2 (build 834), Driver v1.2.0
cronologic GmbH & Co. KG Jahnstrae 49 60318 Frankfurt am Main Germany
xTDC4
User Guide
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Contents
1 Introduction 1
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Hardware 3
2.1 Installing the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 xTDC4 Inputs and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2.1 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.3 xTDC4 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3.1 Grouping and Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.4 Performing a firmware update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.5 Calibrating the Carry-Chain TDC . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Driver Programming API 9
3.1 Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2.1 Structure xtdc4 init parameters . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 Status Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3.1 Functions for Information Retrieval . . . . . . . . . . . . . . . . . . . . . . 11
3.3.2 Structure xtdc4 static info . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3.3 Structure xtdc4 param info . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3.4 Structure xtdc4 fast info . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4.1 Structure xtdc4 configuration . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4.2 Structure xtdc4 trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4.3 Structure xtdc4 tiger block . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4.4 Structure xtdc4 channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.5 Run Time Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.6 Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.6.1 Input Structure xtdc4 read in . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.6.2 Input Structure xtdc4 read out . . . . . . . . . . . . . . . . . . . . . . . . 18
3.7 Packet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.7.1 Output Structure crono packet . . . . . . . . . . . . . . . . . . . . . . . . 18
4 C Example 21
5 Technical Data 25
5.1 TDC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2.1 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2.2 Environmental Conditions for Operation . . . . . . . . . . . . . . . . . . . 25
5.2.3 Environmental Conditions for Storage . . . . . . . . . . . . . . . . . . . . 25
5.2.4 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2.5 Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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Contents
5.3 Information Required by DIN EN 61010-1 . . . . . . . . . . . . . . . . . . . . . . 26
5.3.1 Manufacturer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3.2 Intended Use and System Integration . . . . . . . . . . . . . . . . . . . . 26
5.3.3 Cooling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3.4 Environmental Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3.5 Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3.6 Recycling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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1 Introduction
The xTDC4 is a common-start time-to-digital converter. The timestamps of leading or trailing edges of digital pulses are recorded. The xTDC4 produces a stream of output packets, each containing data from a single start event, i.e. the relative timestamps of all stop pulses that occur within the user defined range.
1.1 Features
4 channel common start TDC with 8 ps resolution
Standard Range: 218 µs (24 bit timestamp)
Extended Range: 13, 975 µs
Bin size: approx. 13 ps
Double pulse resolution: 5 ns
Dead time between groups: none
Maximum start rate: 4 MHz
L0 FIFO: 15 words/channel
L1 FIFO: 512 words/channel
L2 FIFO: 10000 words
PCIe 1.1 x1 with 200 MB/s throughput
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2 Hardware
2.1 Installing the Board
The xTDC4 board can be installed in any x1 (or higher amount of lanes) PCIe slot. Make sure the PC is powered off and the main power connector is disconnected while installing the board.
2.2 xTDC4 Inputs and Connectors
2.2.1 Connectors
The inputs of the xTDC4 are located on the PCIe bracket. Figure 2.3 on page 4 shows the location of the start input S and the four stop inputs A to D. Lemo-00 connectors are used for
Stop A-D
Start
Figure 2.1: Input connectors of the xTDC4 located on the PCIe bracket.
Lemo 00 connector
dc-offset[i]
DAC
+
-
Figure 2.2: Input circuit for each of the five input channels.
input connection. The inputs are AC-coupled and have an impedance of 50Ω - a schematic of the input circuit is shown in Figure 2.2 on page 3. The digital trigger threshold can be adjusted
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Pin Name 1, 2 GND
3, 4 external CLK in N, external CLK in P 5, 6 GND 7, 8 reserved/NC
9, 10 GND 11, 12 reserved/NC 13, 14 GND 15, 16 reserved/NC 17, 18 GND 19, 20 reserved/NC 21, 22 GND 23, 24 reserved/NC 25, 26 GND 27, 28 reserved/NC 29, 30 GND 31, 32 reserved/NC 33, 34 GND
Table 2.1: Pinout of connector C2.
in order to comply with a manifold of single ended signal standards enabling the acquisition of positive or negative pulses.
B
C2
C1
S
S
C
D
A
C3
Figure 2.3: Schematic view of a xTDC4 board showing inter-board connectors C1 and C2.
Furthermore, three board interconnection connectors can be found at the top edge of the board, as displayed in Figure 2.3 on page 4. Connector C1 (labelled J25 on the board) is reserved for future use. The pinout of connector C2 (labelled J12 on the board) is given in Table 2.1 and the pinout of connector C3 (labelled as J6 on the board) is depicted in Table 2.2.
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Pin Name
1 +3.3 V
2 - 9 reserved/NC
10 GND
Table 2.2: Pinout of connector C3.
2.3 xTDC4 Functionality
The xTDC4 is a “classic” common start time-to-digital converter. It records the time difference between leading or trailing edges on the start input and the stop inputs. Each stop channel A-D can be enabled individually. The accuracy of the acquired timestamps is approx. 8 ps. The timestamps are recorded in integer multiples of a bin size of 13.02083 ps (76.8 GHz). The data acquisition can be limited to rising or falling signal transitions. Transitions of the input signals are called hits. To reliably detect hits the signal has to be stable for at least 500 ps before and after the edge. Between multiple hits on a stop channel a deadtime of approx. 5 ns occurs. Within this deadtime further hits on the stop channel are reported with a coarse timestamp only. The maximum trigger rate on the start channel is 4 MHz.
2.3.1 Grouping and Events
In typical applications a start hit is followed by a manifold of hits on e.g. a detector. The hits recorded are managed in groups (which are called in some applications “events”). Figure
2.4 shows a corresponding timing diagram. The user can define the range of a group, i.e. the
time window within which hits on the stop channels are recorded, in software. Hits occurring outside of that time window are discarded. The maximum recording range for a group is 218 µs. Different ranges can be set for each of the 4 stop channels by setting corresponding channel.start and channel.stop values in the channel configuration. The values need to be set as multiples of
13.02083 ps. A value of 768 corresponds, for example to a time of 10 ns.
Start
A
B
C
D
channel[i].start
channel[i].stop
Figure 2.4: Acquired hits are merged to groups as explained in the text.
2.4 Performing a firmware update
After installing the xTDC4 device driver, a firmware update tool is available. By choosing “FirmwareGUI.exe” a firmware update can be performed. After invoking the application a
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window as shown in Figure 2.5 will appear. The tool can be used for updating the firmware and to create a backup of the on-board calibration data of the xTDC4 unit. If several boards are present, the one which is going to be used can be selected in the upper left corner of the window. Pressing the “Backup” buttons a backup of the firmware or the calibration data will be created, respectively. In order to perform a firmware update, chose the “.cronorom”-file to used by pressing “Browse”. The file contains the firmware data. By pressing “Flash” the firmware is written to the board. “Verify” can be used to compare the firmware data stored on the xTDC4 to the one inside a file. “Flash All” and “Verify All” perform the corresponding operation on all boards which are installed.
Figure 2.5: The firmware update and calibration data backup tool as provided with the xTDC4
device driver.
Important note: The new firmware will only be used after a power cycle, i.e. after switching the PC (or Ndigo crate) off and back on. A simple reboot is not sufficient. Therefore the information shown in the upper half of the application window does not change right after flashing a new firmware.
2.5 Calibrating the Carry-Chain TDC
After each update of the xTDC4 firmware the Carry-Chain TDC has to be calibrated. Before calibration make sure to power-cycle the system after updating the xTDC4 firmware. The calibration is done with the tool “XTDC4Calibration.exe” (see Figure 2.6) which is available after installing the xTDC4 device driver. Connect an external pulse signal to the Start and channel inputs. The signal should be low active. The pulse low and high width has to be at least 10ns each. Use “Calibrate” to start the calibration procedure. Follow the on-screen instructions to gather calibration data on all channels. When all channels are calibrated use “Write” to permanently store the calibration data in the xTDC4’s on-board flash.
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Figure 2.6: The xTDC4 Carry Chain TDC calibration tool.
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3 Driver Programming API
The API is a DLL with C linkage. There exists also a .Net wrapper.
The functions provided by the DLL are declared in xTDC4 interface.h.
3.1 Constants
#define xTDC4 CHANNEL COUNT 4
The number of analog input channels.
#define xTDC4 TIGER COUNT 5
The number of timing generators.
#define xTDC4 TRIGGER COUNT 16
The number of triggers. Two per analog input, one per digital input plus some specials.
3.2 Initialization
int xtdc4 close(xtdc4 device *device)
Finalize the driver for this device.
int xtdc4 count devices(int *error code, char **error message)
Return the number of boards that are supported by this driver in the system.
int xtdc4 get default init parameters(xtdc4 init parameters *init)
Sets up the standard parameters. Gets a set of default parameters for xtdc4 init(). This must always be used to initialize the xtdc4 init parameter() structure.
xtdc4 device *xtdc4 init(xtdc4 init parameters *params, int *error code, char **error message)
Open and initialize the XTDC4 board with the given index. With error code and error message the user must provide pointers where to buffers where error information should be written by the driver.
Params is a structure of type xtdc4 init parameters that must be completely initialized.
3.2.1 Structure xtdc4 init parameters
int version
The version number. Must be set to XTDC4 API VERSION
int card index
The index in the list of XTDC4 boards that should be initialized. There might be multiple boards in the system that are handled by this driver as reported by
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xtdc4 count devices. This index selects one of them. Boards are enumerated depending on the PCIe slot. The lower the bus number and the lower the slot number the lower the card index.
int board id
the global index in all cronologic devices. This 8 bit number is filled into each packet created by the board and is useful if data streams of multiple boards will be merged. If only XTDC4 cards are used this number can be set to the card index. If boards of different types that use a compatible data format are used in a system each board should get a unique id. Can be changed with int xtdc4 set board id(xtdc4 device *device, int board id).
int64 buffer size[8]
The minimum size of the DMA buffer. If set to 0 the default size of 16 MByte is used. For the xTDC4 only the first entry is used.
int buffer type
The type of buffer. Can be either allocated (only option currently) or physical.
#define XTDC4 BUFFER ALLOCATE 0
#define XTDC4 BUFFER USE PHYSICAL 1
int64 buffer address
The start address of the reserved memory. The buffers will be allocated with the sizes given above. Make sure that the memory is large enough.
int variant
Set to 0. Can be used to activate future device variants such as different base frequencies.
int device type
A constant for the different devices of cronologic CRONO DEVICE *. Initialized by xtdc4 get default init parameters(). Must be left unchanged.
#define CRONO DEVICE HPTDC 0
#define CRONO DEVICE NDIGO5G 1
#define CRONO
DEVICE NDIGO250M 2
#define CRONO DEVICE xTDC4 6
#define CRONO DEVICE TIMETAGGER4 8
int dma read delay
The update delay of the writing pointer after a packet has been send over PCIe. The base unit is 16 to 32 ns. Should not be changed by the user.
int use ext clock
If set to 1 use external 10 MHz reference. If set to 0 use internal reference.
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3.3 Status Information
3.3.1 Functions for Information Retrieval
The driver provides functions to retrieve detailed information on the type of board, its configu­ration, settings and state. The information is split according to its scope and the computational requirements to query the information from the board.
int xtdc4 get fast info(xtdc4 device *device, xtdc4 fast info *info)
Returns fast dynamic information. This call gets a structure that contains dynamic information that can be obtained within a few microseconds.
int xtdc4 get param info(xtdc4 device *device, xtdc4 param info *info)
Returns configuration changes. Gets a structure that contains information that changes indirectly due to configuration changes.
int xtdc4 get slow info(xtdc4 device *device, xtdc4 slow info *info)
Returns slow dynamic information. The data reported in this structure requires milliseconds to be obtained. The application should only call it in situation where the program flow can cope with an interruption of that magnitude.
int xtdc4 get static info(xtdc4 device *device,xtdc4 static info *info)
Contains static information. Gets a structure that contains information about the board that does not change during run time.
3.3.2 Structure xtdc4 static info
This structure contains information about the board that does not change during run time. It is provided by the function xtdc4 get static info.
int size
The number of bytes occupied by the structure.
int version
The version number.
int board id
ID of the board. This value is passed to the constructor. It is reflected in the output data.
int driver revision
Encoded version number. The lower three bytes contain a triple level hierarchy of version numbers, e.g. 0x010103 encodes version 1.1.3. A change in the first digit generally requires a recompilation of user applications. Change in the second digit denote significant improvements or changes that don’t break compatibility and the third digit changes with minor bug fixes and similar updates.
int firmware revision
Revision number of the FPGA configuration.
int board revision
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Board revision number. The board revision number can be read from a register. It is a four bit number that changes when the schematic of the board is changed.
0: Experimental first board version. Labeled ”Rev. 1”
1: First commercial version. Labeled ”Rev. 2”
int board configuration
Describes the schematic configuration of the board. The same board schematic can be populated in multiple variants. This is a four bit code that can be read from a register.
int subversion revision
Subversion revision id of the FPGA configuration.
int chip id
16 bit factory ID of the TDC chip.
int board serial
Serial number. With year and running number in 8.24 format. The number is identical to the one printed on the silvery sticker on the board.
unsigned int flash serial high
high 32 bits of 64 bit manufacturer serial number of the flash chip.
unsigned int flash serial low
low 32 bits of 64 bit manufacturer serial number of the flash chip
int flash valid
If not 0 the driver found valid calibration data in the flash on the board and is using it.
3.3.3 Structure xtdc4 param info
This struct contains configuration changes provided by xtdc4 get param info().
int size
The number of bytes occupied by the structure.
int version
The version number.
double binsize Bin size (in ps) of the measured TDC data. The TDC main clock is running at
a frequency of 76.8 GHz resulting in a bin size of 13.0208ps.
int board id
Board ID. The board uses this ID to identify itself in the output data stream. The ID takes values between 0 and 255.
int channels
Number of channels in the current ADC mode. Can take values 1, 2 and 4.
int channel mask
Bit assignment of each enabled input channel.
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Mask assigns a certain bit to each enabled input channel.
int64 total buffer
The total amount of DMA buffer in bytes.
3.3.4 Structure xtdc4 fast info
int size
The number of bytes occupied by the structure.
int version
The version number.
int tdc rpm
Speed of the TDC fan. Reports 0 if no fan is present.
int fpga rpm
Speed of the FPGA fan. Reports 0 if no fan is present.
int alerts
Alert bits from temperature sensor and the system monitor.
bit 0: TDC temperature alert (> 141◦C)
int pcie pwr mgmt
int pcie link width
Number of PCIe lanes the card uses.
int pcie max payload
Maximum size in bytes for one PCIe transaction. Depends on system configuration.
3.4 Configuration
The device is configured with a configuration structure. The user should first obtain a structure that contains the default settings of the device read from an on board ROM , than modify the structure as needed for the user application and use the result to configure the device.
int xtdc4 configure(xtdc4 device *device, xtdc4 configuration *config)
Configures xtdc4 device.
int xtdc4 get current configuration(xtdc4 device *device, xtdc4 configuration *config)
Gets current configuration. Copies the current configuration to the specified config pointer.
int xtdc4 get default configuration(xtdc4 device *device, xtdc4 configuration *config)
Gets default configuration. Copies the default configuration to the specified config pointer.
3.4.1 Structure xtdc4 configuration
This is the structure containing the configuration information. It is used in conjunction with xtdc4 get default configuration(), xtdc4 get current configuration() and xtdc4 configure().
It uses internally the structures xtdc4 tiger block and xtdc4 trigger.
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int size
The number of bytes occupied by the structure.
int version
A version number that is increased when the definition of the structure is changed. The incre­ment can be larger than one to match driver version numbers or similar. Set to 0 for all versions up to first release.
int tdc mode
TDC mode. Can be grouped or continuous. Currently supported: grouped.
crono bool t start rising Rising or falling edge trigger.
double dc offset[XTDC4 CHANNEL COUNT + 1]
Set the switching voltage for the input channels S, A - D (see figure 3.1).
dc offset[0] : Start
dc offset[1 - 4] : A - D
Supported range is -1.32V to +1.18V. This should be close to 50% of the height of the input pulse. Examples for various signaling standards are defined as follows
#define DC OFFSET P NIM +0.35 #define DC OFFSET P CMOS +1.18 #define DC OFFSET P LVCMOS 33 +1.18 #define DC OFFSET P LVCMOS 25 +1.18 #define DC OFFSET P LVCMOS 18 +0.90 #define DC OFFSET P TTL +1.18 #define DC OFFSET P LVTTL 33 +1.18 #define DC OFFSET P LVTTL 25 +1.18 #define DC OFFSET P SSTL 3 +1.18 #define DC OFFSET P SSTL 2 +1.18 #define DC OFFSET N NIM -0.35 #define DC OFFSET N CMOS -1.32 #define DC OFFSET N LVCMOS 33 -1.32 #define DC OFFSET N LVCMOS 25 -1.25 #define DC OFFSET N LVCMOS 18 -0.90 #define DC OFFSET N TTL -1.32 #define DC OFFSET N LVTTL 33 -1.32 #define DC OFFSET N LVTTL 25 -1.25 #define DC OFFSET N SSTL 3 -1.32 #define DC OFFSET N SSTL 2 -1.25
The inputs are AC coupled. Thus, the absolute voltage is not important for pulse inputs. It is the relative pulse amplitude that causes the input circuits to switch. dc offset must be set to the relative switching voltage for the input standard in use. If the pulses are negative, a negative switching threshold must be set and vice versa.
xtdc4 trigger trigger[XTDC4 TRIGGER COUNT]
Configuration of the external trigger sources.
xtdc4 tiger block tiger block[XTDC4 TIGER COUNT] Configuration of the timing generator.
xtdc4 channel channel[XTDC4 CHANNEL COUNT]
Configure polaritiy, type and threshold for the TDC channels.
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Lemo 00 connector
dc-offset[i]
DAC
+
-
Figure 3.1: Input circuit for each of the five input channels. Both inputs of the buffer are biased
at 1.32V by default.
xtdc4 lowres channel lowres channel[XTDC4 LOWRES CHANNEL COUNT]
Not applicable for xTDC4, only available for xTDC4-Sciex. Configure polarity, type and thresh­old for the digital channels.
int auto trigger period int auto trigger random exponent
Create a trigger either periodically or randomly. There are two parameters M = trigger period and N = random exponent that result in a distance between triggers of T clock cycles.
T = 1 + M + [1...2N] (3.1)
0 M < 2
32
(3.2)
0 N < 32 (3.3)
There is no enable or reset as the usage of this trigger can be configured in the trigger block channel source field.
3.4.2 Structure xtdc4 trigger
crono bool t falling
Triggers on falling edges.
crono bool t rising
Triggers on rising edges.
3.4.3 Structure xtdc4 tiger block
crono bool t enable
Activates timing generator.
crono bool t negate
Inverts output polarity. Default is set to false.
crono bool t retrigger
Enables/disables retrigger setting.
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Default is set to false. If retriggering is enabled the timer is reset to the value of the start parameter, whenever the input signal is set while waiting to reach the stop time.
crono bool t extend
Not implemented.
crono bool t enable lemo output
Enables the LEMO output.
int start
Precursor. Relative to the trigger signal, the data is delayed by the ’start’ time interval in units of 6.6 ns (150MHz). Thus, also data prior to the trigger event is recorded.
int stop
Postcursor. For edge triggering: this is the total length of the recorded signal.
int sources
A bit mask with a bit set for all trigger sources that can trigger this channel. Default is
XTDC4 TRIGGER SOURCE S.
#define XTDC4 TRIGGER SOURCE S 0x00000001 #define XTDC4 TRIGGER SOURCE A 0x00000002 #define XTDC4 TRIGGER SOURCE B 0x00000004 #define XTDC4 TRIGGER SOURCE C 0x00000008 #define XTDC4 TRIGGER SOURCE D 0x00000010 #define XTDC4 TRIGGER SOURCE AUTO 0x00004000 #define XTDC4 TRIGGER SOURCE ONE 0x00008000
3.4.4 Structure xtdc4 channel
Contains TDC channel settings.
crono bool t enabled
Enable TDC channel.
crono
bool t rising
Set whether to record rising or falling edges.
crono bool t cc enable
Enable carry chain TDC. Default is true as initialized by xtdc4 get default configuration(). Shall be left unchanged.
crono bool t cc same edge
Set whether the carry chain TDC records the same edge as THS788 (as backup) or opposite edge. Default is true as initialized by xtdc4 get default configuration(). Shall be left unchanged.
crono bool t ths788 disable
Disable THS788 timestamps. Default is false as initialized by xtdc4 get default configuration(). Shall be left unchanged.
int start
Veto function. Only timestamps posterior to ‘start’ are recorded.
int stop
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Veto function. Only timestamps prior to ‘stop’ are recorded.
3.5 Run Time Control
int xtdc4 continue capture(xtdc4 device *device)
Call this to resume data acquisition after a call to xtdc4 pause capture().
int xtdc4 pause capture(xtdc4 device *device)
Pause data acquisition.
int xtdc4 start capture(xtdc4 device *device)
Start data acquisition.
int xtdc4 start tiger(xtdc4 device *device)
Start timing generator.
int xtdc4 stop capture(xtdc4 device *device)
Stop data acquisition.
int xtdc4 stop tiger(xtdc4 device *device)
Stop timing generator.
3.6 Readout
int xtdc4 acknowledge(xtdc4 device *device, crono packet *packet)
Acknowledges the processing of the last read block. This is only necessary if xtdc4 read() is not called. This feature allows to either free up partial DMA space early if there will be no call to xtdc4 read anytime soon. It also allows to keep data over multiple calls to xtdc4 read to avoid unnecessary copying of data.
int xtdc4 get device type
Returns the type of the device. Either CRONO DEVICE XTDC45G or CRONO DEVICE XTDC4250M
const char* xtdc4 get last error message(xtdc4 device *device)
Returns most recent error message.
int xtdc4 read(xtdc4 device *device, xtdc4 read in *in, xtdc4 read out *out)
Return a pointer to an array of captured data in read out. The result can contain any number of packets of type xtdc4 packet. read in provides parameters to the driver. A call to this method automatically allows the driver to reuse the memory returned in the previous call. Returns an error code as defined in the structure xtdc4 read out.
3.6.1 Input Structure xtdc4 read in
xtdc4 bool t acknowledge last read
If set xtdc4 read() automatically acknowledges packets from the last read.
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3.6.2 Input Structure xtdc4 read out
crono packet *first packet
Pointer to the first packet that was capture by the call of xtdc4 read.
crono packet *last packet
Address of header of the last packet in the buffer.
int error code
Assignments of the error codes.
#define CRONO READ OK 0 #define CRONO READ NO DATA 1 #define CRONO READ INTERNAL ERROR 2 #define CRONO READ TIMEOUT 3
const char *error message
3.7 Packet Format
3.7.1 Output Structure crono packet
unsigned char channel
Unused, always 0.
unsigned char card
Identifies the source card in case there are multiple boards present. Defaults to 0 if no value is assigned to the parameter board id in Structure ndigo init parameters.
unsigned char type
The data stream consists of 32 bit unsigned data as signified by a value of 6.
unsigned char flags
#define XTDC4 PACKET FLAG ODD HITS 1
The last data word in the data array consists of one timestamp only which is located in the lower 32 bits of the 64 bit data word (little endian).
#define XTDC4 PACKET FLAG SLOW SYNC 2
Start pulse distance is larger than the extended timestamp counter range.
#define XTDC4 PACKET FLAG START MISSED 4
The trigger unit has discarded packets due to a full FIFO.
#define XTDC4 PACKET FLAG SHORTENED 8
The trigger unit has shortend the current packet due to full FIFO.
#define XTDC4 PACKET FLAG DMA FIFO FULL 16
The internal DMA FIFO was full. Might or might not result in dropped packets.
#define XTDC4 PACKET FLAG HOST BUFFER FULL 32
The host buffer was full. Might or might not result in dropped packets.
unsigned int length
Number of 64-bit elements (each containing up to 2 TDC hits) in the data array.
unsigned int64 timestamp
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Coarse timestamp of the start pulse. Values are given in multiples of 1.6 ns.
unsigned int64 data[1]
TDC hits. the user can cast the array to uint32* to directly operate on the TDC hits.
# bits 31 to 8 7 to 4 3 to 0
content TDC DATA FLAGS CHN
The timestamp of the hit is stored in bits 31 down to 8. Bits 7 down to 4 are hit flags:
Bits 7 + 6: Timestamp consists of FPGA timing only with 1666 ps precision, as both the TDC and the Carry Chain TDC missed this stop event.
Bit 7: FPGA did not see the stop event: hit may be out of sequence and may belong to another group.
Bit 6: Timestamp consists of Carry Chain TDC timing only with 150 ps precision, as the TDC missed this hit.
Bit 5: Time since start pulse is longer than timestamp counter range (218µs). If the timestamp counter range is exceeded before the next occurrence of a stop event, a data[] element with bit 5 set which does not belong to a hit on any channel is added to the sequence of hits. The channel number for this hit is set to 15. For each overflow of the timestamp counter in a group one such data[] element is added to the group. The total offset of a hit can be computed by
T
hit
= # bits · 218 µs + fine timestamp
where # bits counts the number of 5thbit occurrences until the hit shows up in the group. The maximum counter range supported by the xTDC4 hardware is 13, 975 µs.
Bit 4: Timestamp of the rising edge. Default is falling edge.
The channel number is given in the lowest nibble of the data word. A value of 0 corresponds to channel A, a value of 3 to channel D. Values 7 to 14 are reserved and 15 denotes a group time counter overflow.
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4 C Example
1 // x td c 4 u se r g ui d e e x amp l e . cpp : Example ap pl ic at i on f or the xTDC4 2 #in cl ud e ” x T DC 4 i nte r fac e . h” 3 #in cl ud e ” s t d i o . h” 4 #in cl ud e <windows . h> 5 6 t yp e de f unsigned in t u i nt 3 2 ; 7 t yp e de f unsigned i n t6 4 u in t 64 ; 8 9 i nt main ( in t a rg c , ch a r
*
ar g v [ ] )
10 { 11 // p rep a r e i n i t i a l i z a t i o n 12 x td c4 i n i t p ar am et er s p a r a m s ; 13 x td c 4 g e t d ef a u l t i n i t p a r a m e te r s (¶ms ) ; 14 param s . b u f f e r s i z e [ 0 ] = 8
*
102 4*10 2 4; // u s e 8 MByte a s pa c k e t ←-
b u ff e r
15 param s . b o ar d i d = 0 ; // val u e c o pie d to ” ca rd ” f i e l d o f e v er y←-
packet , a l lo wed ra ng e 0 . . 2 5 5
16 param s . c ar d i nd ex = 0 ; // i n i t i a l i z e f i r s t xTDC4 b o a r d f o u n d ←-
in the s y s t e m
17 18 // i n i t i a l i z e car d 19 i nt e rr or c od e ; 20 const c h a r
*
e r r m e ss a ge ;
21 x t d c4 d ev ic e
*
d e vi ce = x t d c 4 i n i t (&params , &e r ro r c o de , &e rr m es s ag e ) ;
22 i f ( e rr o r c od e != CRONO OK) 23 { 24 p r i n t f ( ”Coul d not i n i t xTDC4 : %s \ n ” , er r m es s ag e ) ; 25 r e t urn ( 1 ) ; 26 } 27 28 // pr i nt ba r d in f orm a ti o n 29 x t d c 4 s t at i c i n f o s t a t i c i n f o ; 30 x t d c 4 g e t s t a t i c i n fo ( dev i ce , &s t a t i c i n f o ) ; 31 p r i n t f ( ”Board S e r i a l : %d.%d \ n ” , s t a t i c i n f o . b o a r d s er ia l >>24, ←-
s t a t i c i n f o . b o a r d s e r i a l &0 x f f f f f f ) ;
32 p r i n t f ( ”Board C o n fi gu r a t io n : %d\ n ” , s t a t i c i n f o . b oa rd c on fi gu ra ti on ) ; 33 p r i n t f ( ”Board R e v is io n : %d\n” , s t a t i c i n f o . b oa r d r ev i s i o n ) ; 34 p r i n t f ( ”F i r m wa r e R ev is i o n : %d.%d\n” , s t a t i c i n f o . f i r m w a r e r ev is io n , ←-
s t a t i c i n f o . s u b v e r s i o n r e v i s i o n ) ;
35 p r i n t f ( ” Dr i ve r Re vi s i o n : %d.%d .%d.% d \ n ” , (( s t a t i c i n f o . ←-
d r i v e r r e v i s i o n >>24)&255) , ( ( s t a t i c i n f o . d r i v e r r e v i s i o n >>16)&255) , ←-
( ( s t a t i c i n f o . d r i v e r r e v i s i o n >>8)&255) , ( s t a t i c i n f o . d r i v e r r e v i s i o n ←-
&255) ) ;
36 37 // p rep a r e co n fi g ur at io n 38 x td c4 c o n f i g u r a t i o n c on fi g ; 39 40 // f i l l c on f ig u r a ti on data st r u c tu re with de f au l t va l ue s
21
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41 // s o th a t th e c on f ig u ra ti on i s v a l i d and o n l y pa r a me te rs 42 // of i n t er e s t have t o be se t e x p l i c i t l y 43 x td c 4 g et d ef a u l t c o n f i g ur a t i o n ( d e vi ce , &c o n f i g ) ; 44 45 // se t co nf i g o f t he 4 TDC c h an ne l s 46 f or ( in t i = 0 ; i < XTDC4 CHANNEL COUNT ; i ++) 47 { 48 // e nab l e r ec o rd in g h it s on TDC c h anne l 49 c on fi g . c h an n el [ i ] . e n ab led = t r ue ; 50 51 // measu r e f a l l i n g edge 52 c on fi g . c h an n el [ i ] . r i s i n g = f al se ; 53 54 // de fi n e r a n g e o f t h e gr o u p 55 c on fi g . c h an n el [ i ] . s t a r t = 0 ; // ran g e be g in s r i g ht a f te r s ta rt p uls e 56 c on fi g . c h an n el [ i ] . st op = 30 0 00; // re c or d in g window sto p s a f te r ˜ 50 us 57 } 58 59 // r ec o rd f a l l i n g ed g e s on th e s t a r t c h an ne l 60 c o n fi g . s t a r t r i s i n g = f al s e ; 61 62 // wri t e c o nf ig ur a ti o n to bo a r d 63 e r r o r c o d e = x t d c 4 c o n f i gu re ( d e vi ce , &c o nf ig ) ; 64 i f ( e rr o r c od e != CRONO OK) 65 { 66 p r i n t f ( ”Coul d not c o n f i g ur e xTDC4 : %s \n ” , er r m es sa ge ) ; 67 r e t urn ( 1 ) ; 68 } 69 70 // co n fi g ur e r e adou t beh a v io ur 71 x t d c 4 r e a d i n r ea d c o n fi g ; 72 // aut oma tic all y ack n o w l e d g e a l l da t a as p ro c es s ed 73 // on t h e next c a l l t o x t dc4 r e ad ( ) 74 // o ld p ac ke t p o i nt er s a re i nv a li d a f t er c a l li n g x td c 4 r e a d () 75 r e a d c on fi g . a c k no wl e d g e l as t r ea d = 1 ; 76 77 // st ru c tu r e w i t h pack e t p oi nt e r s f or read d a t a 78 x td c4 r ea d o ut r ea d d at a ; 79 80 // s t a r t data cap t u re 81 i nt s ta tu s = x t d c 4 s ta rt c a p t ur e ( de vi c e ) ; 82 i f ( s ta tu s != CRONO OK) { 83 p r i n t f ( ”Coul d not s t a r t c ap t ur in g %s ” , x t d c 4 g et l a st e r ro r m es s a g e (←-
d e vi ce ) ) ;
84 x t d c 4 c l o s e ( de vi c e ) ; 85 r e t urn s ta tu s ; 86 } 87 88 // some book k e ep ing 89 i nt p a ck e t c ou n t = 0 ; 90 i nt em p ty p a cke t s = 0 ; 91 i nt p a c k e t s w i th e r r or s = 0 ; 92 93 bool l as t r e a d n o d a t a = f al se ; 94 95 i n t 6 4 G roupA bsTim e = 0 ; 96 i n t 6 4 GroupA b s T im e o l d = 0 ; 97 i nt Up d a t e C ount = 1 0 0;
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98
99 p r i n t f ( ” R e ad in g p ack et s : \ n” ) ; 100 // r e a d 100 0 0 pa c k ets 101 w h i le ( ( pa c ke t c o un t < 100 0 0 ) ) 102 { 103 // g et po in t er s to ac q uir e d p ack e ts 104 s t a tu s = x td c 4 r ea d ( d e vi c e , &r e ad c on f ig , &r ea d d ata ) ; 105 i f ( s t a t u s != CRONO OK) 106 { 107 S l ee p (1 0 0) ; 108 p r i n t f ( No d a ta ! −\n” ) ; 109 } 110 e ls e 111 { 112 // i t er a t e ov er a l l pa c k ets r e c e iv ed wi t h the l as t read 113 c r on o p ac k et
*
p = r ea d d at a . f i rs t p a c k e t ;
114 whi l e ( p <= r ea d d a ta . l a s t p ac ke t ) 115 { 116 // do s om e t h i ng wi t h the data , e . g . c a l cu l at e cu r re n t r a t e 117 Gro upAbs Time = p>ti me s t a mp ; 118 i f ( pa c ke t c o un t%UpdateCount == 0 ) { 119 d o u ble R a t e = 1 ./ ( ( double ) ( Grou pAbsTimeGr o u p Ab s Ti m e old )
*
1e ←-
9*10/ 6/( double ) U p d a t e C o u n t ) ;
120 p r i n t f ( \r%f kHz ” , Rate ) ; 121 G ro u pA b sT i me o l d = G roupA bsTim e ; 122 } 123 124 // . . or pr i nt h i t s ( no t a good ide a at hi gh da t a r a tes , 125 // so l e t
'
s do t hat on ly f o r e v er y 1000 th pa ck et . . . )
126 // p r in t p a ck e t i nfo r ma t io n 127 i f ( pa c ke t c o un t %1000 == 0 ) { 128 p r i n t f ( ” Ca r d %d F la g s %d L e n gt h %d Type %d TS %l l u \n ” , p←-
>car d , p−>f l a g s , p−>l en gth , p−>ty p e , p−>tim e s t am p ) ;
129 130 in t h it c ou nt = 2
*
( p>l en g th ) ;
131 i f ( ( p>f l a g s & 0 x1 ) == 1) 132 h i t c o u n t = 1 ; 133 134 ui n t3 2
*
p a ck e t d at a = ( ui n t3 2*) (p>d a ta ) ;
135 fo r ( i n t i = 0 ; i < h i t c o u n t ; i++ ) 136 { 137 ui nt 3 2
*
h it = ( p ac k et d at a + i ) ;
138 139 // e x tr ac t c h a nn el number (AD) 140 char ch a nne l = 65 + (
*
h it &0 x f ) ;
141 142 // e x tr ac t h i t f l a gs 143 i n t f l a g s = (
*
h i t >>4 & 0 xf ) ;
144 145 // e x tr ac t h i t tim e stamp 146 i n t t s o f f s e t = (
*
h i t >>8&0 x f f f f f f ) ;
147 148 // TDC bi n s i z e i s 13 . 020 8 ps . Co n v e r t t imesta m p to ns . 149 double t s o f f s e t n s = t s o f f s e t ; 150 t s o f f s e t n s
*
= 0 .0 1 30 2 08 ;
151 152 p r in t f ( ”H i t @Channel %c F la g s %d O ff s et %u ( raw ) / %f ns \ n←-
, cha n ne l , f l a gs , t s o f fs e t , t s o f f s e t n s ) ;
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153 } 154 p r i n t f ( \n\n” ) ; 155 } 156 157 // go t o next p ac ke t 158 p = c r on o n e xt p ac k e t ( p ) ; 159 p ac k et c oun t++; 160 } 161 } 162 } 163 164 // s h u t down pa c k et g e ne r at i on and DMA t ra n s f e rs 165 x t d c4 s to p c ap tu re ( d ev ic e ) ; 166 167 // de a ct iv a te XTDC4 168 x t d c 4 c lo se ( d ev i ce ) ; 169 170 r e tur n 0 ; 171 }
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5 Technical Data
Power Requirements: 25W
Mechanical Dimensions: 170mm × 106mm
Throughput: 200 Mb/s
5.1 TDC Characteristics
Each board is tested against the values listed in the ‘Min’ column. ‘Typical’ is the mean value of the first 10 boards produced.
Symbol Parameter Min Typical Max Units
INL Integral nonlinearity bins
DNL Differential nonlinearity bins
t
Bin
Binsize 13.02083 ps
t
Res
Resolution 8 ps
5.2 Electrical Characteristics
5.2.1 Oscillator
The xTDC4-PCIe uses an oscillator with 25 ppb stability.
5.2.2 Environmental Conditions for Operation
The board is designed to be operated under the following conditions:
Symbol Parameter Min Typical Max Units
T ambient temperature 5 40
C
RH relative humidity at 31◦C 20 75 %
5.2.3 Environmental Conditions for Storage
The board shall be stored between operation under the following conditions:
Symbol Parameter Min Typical Max Units
T ambient temperature -30 60
C
RH relative humidity at 31◦C non condensing 10 70 %
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5.2.4 Power Supply
Symbol Parameter Min Typical Max Units
I PCIe 3,3V rail power consumption 4 mA
VCC PCIe 3,3V rail power supply 3,1 3,3 3,5 V
I PCIe 12V rail power consumption 2,1 A
VCC PCIe 12V rail power supply 11,1 12 12,9 V
I PCIe 3,3VAux rail power consumption 0 A
VCC PCIe 3,3VAux rail power supply 3,3 V
5.2.5 Inputs
The xTDC4-PCIe’s inputs are AC-coupled 50Ω single ended.
Symbol Parameter Min Typical Max Units
V
Base
Baseline shift V
t
Pulse
Pulse length 2 5 200 ns
Z
P
input impedance 50
5.3 Information Required by DIN EN 61010-1
5.3.1 Manufacturer
The xTDC4 is a product of:
cronologic GmbH & Co. KG Jahnstraße 49 60318 Frankfurt
HRA 42869 beim Amtsgericht Frankfurt/M
VAT-ID: DE235184378
5.3.2 Intended Use and System Integration
The devices are not ready to use as delivered by cronologic. It requires the development of specialized software to fulfill the application of the end user. The device is provided to sys­tem integrators to be built into measurement systems that are distributed to end users. These systems usually consist of the xTDC4, a main board, a case, application software and possi­ble additional electronics to attach the system to some type of detector. They might also be integrated with the detector.
The xTDC4 is designed to comply with DIN EN 61326-1 when operated on a PCIe compliant main board housed in a properly shielded enclosure. When operated in a closed standard compliant PC enclosure the device does not pose any hazards as defined by EN 61010-1.
Radiated emissions, noise immunity and safety highly depend on the quality of the enclosure. It is the responsibility of the system integrator to ensure that the assembled system is compliant to applicable standards of the country that the system is operated in, especially with regards to user safety and electromagnetic interference. Compliance was only tested for attached cables shorter than 3m.
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All power supplied to the system must be turned off before installing the board.
When handling the board, adequate measures have to be taken to protect the circuits against electrostatic discharge (ESD).
5.3.3 Cooling
The xTDC4 in its base configuration has passive cooling that requires a certain amount of air flow. If the case design can’t provide enough air flow to the board, a slot cooler like Zalman ZM-SC100 can be placed next to the board. Active cooling is also available as an option to the board.
5.3.4 Environmental Conditions
The board is designed to be operated under the following conditions:
Symbol Parameter Min Typical Max Units
T ambient temperature 5 40
C
RH relative humidity at 31◦C 20 75 %
and shall be stored between operation under the following conditions:
Symbol Parameter Min Typical Max Units
T ambient temperature -30 60
C
RH relative humidity at 31◦C non condensing 10 70 %
5.3.5 Inputs
All inputs are AC coupled. The inputs have very high input bandwidth requirements and therefore there are no circuits that provide over voltage protection for these signals. Any voltage on the inputs above 5V or below -5V relative to the voltage of the slot cover can result in permanent damage to the board.
5.3.6 Recycling
cronologic is registered with the “Stiftung Elektro-Altger¨ate Register” as a manufacturer of electronic systems with Registration ID DE 77895909.
The xTDC4 belongs to category 9, “¨Uberwachungs und Kontrollinstrumente f¨ur ausschlielich gewerbliche Nutzung”. The last owner of a xTDC4 must recycle it or treat the board in compli­ance with§11 and§12 of the German ElektroG or return it to cronologic at the address listed on page 26.
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