Cromemco ZPU, Z-80A Instruction Manual

CROMEMCO
ZPU
Instruction
Part
No.
023-0012
CROMEMCO,
280
Mountain
Copyright
Bernardo
View,
INC.
Avenue CA
1978
94040
September
1978
ZPU
INSTRUCTION
MANUAL
Section Section
Section
1:
2:
2.1
2.2
2.3
2.4
2.5
2.6
3:
TABLE
INTRODUCTION
OF
CONTENTS
•••••••••••••••.••••••••••.••••••••
OPERATING INSTRUCTIONS
POWER-ON
Z-80A WAIT ADDRESS
REFRESH ENABLE
ALTAIR
THE
S-100
CLOCK
STATE
MIRROR
OR
JUMP
••••••••••••••••••••••••••••••••••
FREQUENCY
SELECTION
SELECTION
...•.•••...•...•..•.•.......••...
IMSAI INSTALLATION BUS
•.••••••.•••••••••••••••.•••••••••
.•••••••••••••••••.••••••
SELECTION
••••••••••••••••
••••••.••••••••••••••••••••
•••••••••••••••.••.••••
••.•••••
;
••••.•••••
2 3
3
6 7 9
9
10
11
Section
4:
ASSEMBLY
ZPU
PARTS
INSTRUCTIONS
LIST
•••••••••••••••••••••••.•••••••••
••••••••••••.•••••••••••••
19
23
ZPU
INSTRUCTION
MANUAL
This
for
Cromemco's card of
the
100
bus.
detailing
Read
the
ZPU
(ZPU).
Z-80A
into
manual
The
processor Thus, S-100
Section
your
contains
powerful
ZPU
the
manual
bus
features.
2, system
Section
1
INTRODUCTION
is
assembly
4
MHz
designed
to
systems
also
S-100
and
bus
to
bring
using
includes
operating
compatible
the
the
an
OPERATING INSTRUCTIONS,
S-100
bus.
instructions
power
8080-oriented
extensive
before
Z-80A and
speed
section
inserting
CPU
s-
TECHNICAL
Z-80A
PROCESSOR: 4 MHz version CLOCK
RATE:
INSTRUCTION
POWER-ON JUMP: POWER-ON JUMP
16 locations switch selectable.
2/4
MHz
selectable).
SET:
158 including instructions
the
jumper
LOCATIONS:
(switch
instructions
8080.
SPECIFICATIONS
Microprocessor
of
the
Z-80.
the
78
of
wire
enabled.
WAIT
STATE
o- 4 wait
Ml
WAIT BUS: S-100. POWER
OPERATING
STATE:
REQUIREMENTS:
Card
GENERATION:
statesjum
ENVIRONMENT:
per
jumper
wire
wire selectable.
selectable.
+8 volts @
1.1 A.
0 -
55°C.
ZPU
INSTRUCTION
The
Cromemco
MANUAL
SECTION 2
OPERATING INSTRUCTIONS
ZPU
is
an
S-100
bus
compatible
CPU
(Central
Processing
mi c
roprocesso features power.
MHz
clock systems. board
Ml
wait
wait
other
2.1
POWER-ON
The
designed
Most
states,
features
ZPU
Unit)
r.
importantly,
rate--twice
The
ZPU
state
discussed
JUMP
Power-On
which
The
Cromemco
to
increase
the
offers
generator,
address
Jump
the speed
Power-On
optional
mirroring
in
this
circuitry
uses
Z
PU
your
ZPU
of
section.
the
has
an
total
operates
most Jump
independent
circuitry,
allows
powerful
exc1usive
system
reliably
other
capability,
the
Z-80A
set
computing
at
microcomputer
an
selection
and
board
several
to
of
a 4
on-
of
be
used
(e.
g.,
power
jump
position
setting
in
an
Cromemco
is
turned
to
one-of-sixteen
Jump
The
automatic
is
tabulated
S-100
I s
Address
Z-2,
ON,
bus
jump
below:
system
Z-2D
the
memory
select
address
ZPU
wi
thout
and
SYSTEM
hardware
location
switch.
corresponding
3
front
THREE).
forces
selected
panel
and
with
to
controls
When
automatic
the
each
system
four
switch
ZPU
INSTRUCTION
MANUAL
SWITCH
A15 A14 A13 A12
0 0 0 0 0 0 0
0 0
0
0
0
0 0 1 1
1 1 1 1 1
1
1 1 1
0
1 0 0 1 0 1 1 1 1 1 1 0 0 0 0 0
1
0
1 1 B000H
0
0 0
1
0 1 D000H
1 1
1 1 1 1
POWER-ON
JUMP
ADDRESS
0000H
1
0
1000H 2000H 3000H 4000H 5000H
0
6000H 7000H 8000H
1
0
9000H
A000H C000H
0
E000H F000H
Note order set
to
standard System) C3FFH, effect switch
bits
logic
Suppose
with
in provides an
should
the
Jump
in
the
0.
you
a
PROM
automatic
be
Address
jump
have
4FDC
memory.
a
convenient
jump
set
as
address,
a
card
shown
switch
EXAMPLE
Cromemco
and
This
to
program,
location
below:
with
RDOS
way
determines
all
1
Z-2D
(Resident
which
to
start-up
C000H,
the
other
System
resides
the
four
address
Disk
a
Jump
which
Operating
at
system.
highest
bits
comes
C000-
To
Address
4
ZPU
INSTRUCTION
MANUAL
JUMP
ADDRESS
1 0
-zo
c:::::J
.....
CL]N
D:]w
CC~
EXAMPLE 2
14 13 12
15
Suppose
force
Power-On E3FFH,
as
shown
Your
fea
ture
a
jump
or
so
below:
enabled.
you
ZPU
you
to
RESET.
would
is
have
the
To
a
The
then
factory
disable
Cromemco
Z-81O
Z-81O
set
Monitor
the
JUMP
ADDRESS
1 0
-zo
c:::::J
c::::JN
c:::::J
c::c~
shipped
Moni
Jump
.....
w 13
the
Z-2
tor
15 14
12
function
System,
program
spans
Address
with
and
after
addresses
switch
the
(resulting
you
a
Power-On
want
system
to
to
EIOIOIO-
EIOIOIOH
Jump
in
an
automatic
RESET),
the
board
I f
panel
jump
carefully
labeled
you
controls,
to
address
cut
the
"JUMP
r
com
put
e r s y s t em
the
function
IOIOIOIOH
foil
ENABLE".
trace
has
of
5
only
each
on
a
connecting
RE
SET
of
Power-On
and
these
EXAMINE
two
swi
Clear
points
tches
fro
or
on
n t
is
ZPU
INSTRUCTION
MANUAL
altered
Following
not
at
addresses
Immediatley
twice to actual
in
clear
examine
For
you
can
switch, appear
when
a
address
order the
computers
see
then
in
the
system
specified
after
to
automatic
operation.
how
raising
DATA
the
0000H,
a
examine
the
automatic
RESET,
RESET,
jump
with
Power-On
the
display.
the
but
with
the
the
front
RESET
fi
rather
EXAMINE
automatic
and
panel
Jump
switch.
rst
the
a
This
jump
second
works
feature
instruction
at
one
Jump
switch
jump
time
switches
by
The
is
the
of
Address
must
location:
to
and
pressing
number
op
is
enabled.
executed
the
switch.
be
perform
indicators,
the
C3H
code
sixteen
toggled
once
STOP
should
of
is
the
the
hardware
switch;
the
NEXT
low
switch
will
will
Jump
2.2
Address
Z-80A
The
nsec
cycle
operating
now
all
jump
all order
appear
be
CLOCK
Z-80A
instruction.
0's
8
bits
again;
0's,
switch
FREQUENCY
may
time)
frequency
will
in
and
or
the
bits.
be
2
appear
of
the
the
MHz
is
the
high
DATA
higher
SELECTION
clocked
(wi
switch
in
jump
order
display.
th
Now
the
address.
8
four
at
ei
a
500
selectable
press
DATA
bits
ther
nesc
bits
display
of
The
4
the
Press
the
lower
will
MHz
cycle
with
EXAMINE NEXT
indicating
the
jump
display
(wi
time).
four
th
the
EXAMINE
address
bits
the
a
250
The
toggle
switch
labeled
"2"
(2
MHz)
and
"4"
6
(4
MHz).
ZPU INSTRUCTION
MANUAL
The
used
by System
labeled products). OFF
for
2.3
WAIT STATE
The
match access
insertion.
the front
2
the
line
"4
MHz
ZPU
time.
previously
ZPU
panel
MHz"
The
operation.
SELECTION
features
Z-80A
The
as
a 4
(i
t
indicator
clock
The
first
labeled
MHz
indicator
may
be
an
ZPU
inserts
indicator
labeled
will
be
on-board
frequency
allows
from
"STACK"
which
ON
two
on
the
line.
The
monitors
"STACK"
for
4
MHz
WAIT STATE
to
your
system's
types
0
to
3
wait
S-100
Cromemco
this
on
non-Cromemco
operation,
generator
of
wait
state
bus
line
memory
state
cycles
is
Z-l
is
and
to
(1
cycle
every
machine
additional
(referred
the
timing
If
in
its
sta
te
select
Wait
state
accomplished
(just
to
=
250
wait
to
requirements
you
are
factory
i
the
nsec
cycle;
states
as
an
using
wired
on
is
selection
by
re-configuring
left
Ml-cycle
done
of
at
the
second
during
are
Cromemco
condition
the
Z-80A
4 MHz;
an
in
the
on
the
to
accomodate
500
type
instruction
the
tightest.
memory
(no
memo
ZPU
chip).
nsec
inserts
Zilog
boards,
wait
ry
board
at
either
fetch
literature),
states);
boards
other
jumpers
2 MHz)
cycle
leave
if
boards
one
your
all
requi
Ml
during
or
only
where
ZPU
wait
red.
and
no
is
W
7
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