Cromemco 32K Bytesaver Instruction Manual
Cromemeo
Five
Dollars
By
31K
te
saver
Cromemco
Part
No.
023·0002
CopyrIght c,1978byCromemco
cromemco
irocorpo,.t~d
[3
Tomorrow's
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......
• • •
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Inc A1ll1ghlS reserved
Computers
UOUN1'A N
V'E;W
.
Today
c.\
\joIljolJ
•
April
1979
.
Table
Section 1
I
ntraduction.._. _
Technical Specifications
..._.....
of
COntents
_
.........•......•......•..
...........•................
1
,
Section
Operating Instructions.._
2
..._.....
2.1 Switch Options-An Overview
PROGRAM
ADDR/CONTROL Switches
PROGRAM
BANKSE
SHADOW ROM Switches
2.2
Addressing
2.3 Board Select/Chip Select _ _ 8
2.4 Shadowing ROM Socket Pairs _
2.5
Memory
2.6 Select
2.7
Direct Memory Access. _ 16
POWER Toggle
ENABLE
LEer
Banks 12
BANK0On
The
Switches
32K
BYTESAVER.._. _
RESET Or
_
..........•...••......
Switch
Switches
.............••....
•.••••......
POWER·ONCLEAR
_.2
10
16
Section 3
PROM Programming Instructions 19
3.1 Programming From RODS Or
3.2
Programming From 3K Control BASIC
3.3
Programming From
Section 4
Theory Of Operation
4.1 Power Supplies
4.2 Addressing. .
4.3 Memory Read Cycles
4.4 Memory Write Cycles
4.5
DMA
...........••.•...•••......•......
................•..............
................•..............
Cycles
l-80
....................•......
.......•..................
.......•....................
2·80
Monitor 19
Assembly Code
20
22
24
24
24
25
25
25
2
7
Section 5
Assembly Instructions
5.1 Assembly Steps
5.2 Power
Parts List..._. _. _ _
Parts Location Diagram.._. _
Switch Options-Ouick Reference
Warranty _. _ _
Schematic Diagram
line
............•••....•••...........
.........................•.....
Testing
.....••......•...
........•...................
.......•.....••.•..........
.......•.....••......•.....
.........•......•...........
....•......••.....•.....
_. _. _
......•...
27
27
28
30
32
33
34
_..35
LIST
OF
ILLUSTRATIONS
TableofCOntents
Figure 1 -
Figure 2 -
Figure 3 - Example 1
Figure 4 - Example 2
Figure 5 •
Figure 6 .
Figure 7 - Example 4
Figure 8 . The
Figure 9 - Example 5
Figure
Figure
Figure
Figure13- IC Pin Position
Switch
ADDR!CONTROL
Locations.
Switch
Switch
32K
BYTESAVER
Two
32K
BYTESAVEAS
Address
Space
Switch
Memory
Switch
10
- Example 5 Memory Map 14
1'-
DMA
OVERRIDE
12-Control
BASIC
.............•....•.........
Switches
Settings
.........•..........
_ _ _ 5
Settings _. _. _. _ _
Addressing..__.__
Spanning
The
64K
_ 9
Settings And Memory Map
Map
With
Multiple
Memory
Banks
Settings 13
Example
Memory
Configuration
Map _
2
3
.6
7
11
12
17
21
28
32K
Bytesaver
Introduction
This manual provides assembly instructions,
operating
the Cromemco
The
patible.
memory
SAVER features:
• Independent
•
• BANKSELEeT
• ROM
instructions
32K
32K
BYTESAVER
32K-byte
board and programmer.
memory
board.
Independent
grammer.
and
BYTESAVER
capacity.
operation
operationasa
allowing memory expansion
beyond
ory
64K-bytes_
SHADOWING
to
overlap
portions
theory
of
operation
memory
is
an 5-100 bus com-
2716-type
The
32K
asa32K-byte
2716
PROM pro-
allowing
external mem-
of
the
32K
SAVER's address space.
•
Powerful
DMA
DMA
OVERRIDE.
configuration
options
board.
EPROM
BYTE·
ROM
BYTE-
with
for
• Fully
•
Digital
buffered
count
(no erratic one-shots).
• A separate memory
ROM socket.
•
All
options
jumper
This
Operating
tions,
tions.Ifyou
Assembly
struction
"Switch
Instructions
tional overview
quicklytouse.
Theory
wires).
manual consists
Instructions.
of
purchased a
Instructions
and
initial
Options-An
provides a
for
address lines.
derived
SWitch selectable
PROM Programming Instruc-
Operation
test procedures.
Overview"
those
PROGRAM
protect
of
and
32K
BYTESAVEA
provide
32K
BYTESAVER
who
wanttoput
switch
lno
four
basic sections:
Assembly Instruc-
step-by-step con-
of
the
PULSES
for
soldered
kit,
The
section
Operating
the
each
the
opera·
board
Technical Specifications-32K
MEMORY
MEMORY
MEMORY
WAIT
WAIT
BUS
POWER REQUIREMENTS:
OPERATING
CAPACITY:
TYPE:
ACCESS
STATES@2
STATES@4
COMPATIBILITY:
ENVIRONMENT:
·NOTE:
I
32K
BYTES
INTEL
TIME:
MHZ:
MHZ:
450 NANOSECONDS
NONE REQUIRED
ONE
PER
S·100
+B
VOLTS
0-55
DEGREES CELSIUS
Texas Instrument's
equivalenr to the Intel
thus
it
may
not
be
BYTESAVER.
to the Intel
the
32K
BYTESAVER.
The
2716,
soitmaybeused with
BYTESAVER
2716, TI 2516 DR
MACHINE
AT
2.1
2716
PROM
2716
used with the
TI
2516
CYCLE
AMPS
is
PROM. and
IS
equivalenr
PROM
EQUIVALENT'
(MAX.)
Card
not
32K
1
32K
Bytesaver
operating Instructions
- -
-
=
-~-
Operating the
inserting from
sockets
used
configure
venient 5·100
power.
need
PROM
ROM 0 -
or
left
the
To
program a PROM,
to
run
PROGRAMMING
32K
BYTESAVER
onetosixteen 2716 PROM devices
ROM
unused), setting six
board,
bus
slot,
software
15 (any sockets may be
plugging
described
the
and
then
you
INSTRUCTIONS.
board involves
switch
board
applying system
will
in
groups
into
additionally
the
Section
Figure I-Switch
PROGRAM
POWER
r--l.,
ADDR;!DNTRDL
to
a con-
in
3,
2.1
Switch Options-An Overview
The
32K
six
switch
board
overview
of
each
section.
BYTESAVER
groups located along
(see
Figure 1).
and
for
later
switch
groupisbriefly
is configured
To
provide
quick
the
reference,
explained
Locations
PROGRAM
ENABLE
top
edgeofthe
an
operational
the
by
setting
function
in
this
~
••
t .....:
I
..
..
~.....
,-
....
.
'r
...
~
SHADO\
ROMS
[)
Croon_on",o
..
..
'H
".
"
""
BI'TESA/.'ER'~
jZl<
BANK
iLEeT
2
32K
PROGRAM
The
voltdetodepower
indicator
fore
PROM
donetoprevent
Bytesaver
POWER
PROGRAM POWER switch
ON
and
OFF.
programmmg:
inadvertent
ADDR/CONTROL
The
ADDA/CONTROL switches control several
different
multiple
ON,
direct
functions
Switches
The
and disables
64K
1, 2
BANK
64K
addressing).
and
ENABLE/DISABLE
memory
multiple
Toggle Switch
turns
supply
and
the
nearby red LED
Position this switch ON be-
position
re-programming.
Switches
(see
Figure 2).
3 are
not
used.
switch enables
banks (bank
banks
0-bank7)when
when
the
+26
it
OFF
when
OFF (normal
The
WAIT
CPU cycle
memory
switch
cycle;
When used
ning at 4
maybeleft
SAVER
address space
pOSItion IA15=0>, and
the upper
(8000H-FFFFHI
(A
15'11.
DMA
OVERRIDE
DMA
performing
access time. Positioning
ON
the
The
A 15
boardinthe
The
DMA
OVERRIDE
addressing,
STATE
time
to
the
introduces
OFF
position
in
a Cromemco system
MHz,
position
OFF
when operatingat2
switch
lOOOOH
32K
half
when
ENABLE/DISABLE
when
when
OMA
OFF.
position
with
switchisusedtomatch
2716
one
introduces
the
memory
lower
-7FFFHI
memory
of
ON
For
memory
PROM
wait state per machine
switch ON.
maps
32K
memory
in
the
and disables
normal
the
switch
banks enabled.
45005
the
WAIT STATE
no
with
MHz.
the
32K
halfofthe
when
maps
in
the
address
ON
switch
OFF.
the.
(max)
wait
states.
a ZPU runThe
switch
BYTE·
memory
the
OFF
board
direct
in
space
position
enables
OMA
64K
When
turn
Figure
~2E8-\HPJ.HI-I'
2-ADDR/CONTROL
~~---
~~==ONE
I
MEMORY
AIS=I (UPPER
DMA
r-DMA
-lH
L-DMAIN
-'===
L
_~~====
l
DMA
AIS=O (LOWER
NO
WAIT STATES
MEMORY BANKS DISABLED
NOT
USED
Switches
BAN~S
WAIT
OVERRIDE ENABLED
OUT
OVERRIDE
STATE
ENABLED
32~)
DISABLED
32KI
•
3
32K
the
switch ON.
only
when
OVERRIDE enabled, the 32K BYTESAVER
respond
address range
by
board disabling if
current
feature effectively permits
board
banksasthe
and the boardsinother
boards
out
(the
Bytesaver
The
DMA IN/OUT switchisactive
DMA
OVERRIDEisenabled. With
directly
active memory bank statusatthe
of
ones
toaDMA
by
board enabling if
DMA
several stackedindifferent
DMA
board (the one
with
DMA OUT).
in
is
the
memory
the
board's
DMAisIN,
OUT,
usertodefine
with
banksasnon-DMA
regardless
time. This
memory
DMA
DMA
will
16-bit
and
of
one
INI.
BANK
SELECT
Switches
The eight BANKSELECT switches map the 32K
BYTESAVER
ble 64K
IOta any combination of eight possi-
byte
memory banks (bank 0 - bank
71.
Set
ting a BANK SELECT switch ON logically places
the board
bank; an
from a bank.
the numerals printed above
switches
in
the correspondingly numbered
OFF
switch logically removes the board
Again, associate
the
bank
the
on
the
p.c. board,
not
the
memory
number
with
BANK SELECT
numeralsonthe
DIP proper_
PROGRAM
The sixteen
,
vidually
ROMO
gramming;
These switches may be alternately viewed as
ORY
write operations wheninthe
To enable and disable socket programming,
associate the board socket numbers
ROM15) with the numerals printed above
switch DIPs
a
to
the
ENABLE
enable
thru
ROM15. An ON switch enables pro-
an
Switches
PROGRAM
and
disable
OFF
switch
ENABLE
programming
inhibits
programming.
switches
PROTECT switches, preventing any
OFF
position.
on
the p.c. board (15
to
the far left,
far right).
indi-
sockets
MEM-
memory
IROM0-
the
two
SHADOW
Each SHADOW
ROM
Switches
ROM
switch controls
sockets (the rightmost controls ROMe and
the leftmost controls
ing
both
sockets
switch
("floating"
ed)
SHADOW
4K-byte
space,
is
OFF, and by removing
the
from the
ROM
"hole"
into
which
memory
in
board
SWitch
In
another
ROM
the
14 and
memory
ROM
map when
both
when
either socketisaddress-
map when ON. Placing a
ON effectively creates a
the
32K
BYTESAVER address
memory
module may be
151
mapped.
two
ROM
by plac-
sockets
ROM
1,
the
4
32K
Bytesaver
:-=0:::
==-==-
==-=-=-=-
----
Suppose
your
32K
of
memory.
program
there are
Example
you
have a
BYTESA
Asastandard
2716 PROMs
no
other
VER
boards in the
1
4MHz
(0
ZPU
and
reside in the upper
practice,
in
socket
upper
yOll decide
ROM€)
32K
Figure
ary,
so
for
wouldbeas
To
you
of
want
32t;
co
only;
memo
Then,
lings
settings remain the same
POWER switch which /IIl/st be
3-Example1Switch
multiple
memory
programaPROMinsocket
memory
read
showninFigure 3.
banks
operatioll.
except
turned
Settings
are nor required.
the
switch
ROMe,
the PROGRAM
ON. 0
all
set·
switch
PROGRAM
POjER
,---BANI<
r
'fi'
"l'L--r't"
l'~:"":;;~;=";'~:;:~1
U .
~~==
l
DISABLE
~==A1S~1
--l-
DON'r
CARE SINCE OMA
OVERRIDE DISABLED
iDISABLE
PROGRAMMING
ROM
a-ROM
t~,';";1
L
ALL
SOCKET PAIRS
IN MEMORY MAP
OMA
OVERRIDE DISABLED
ONE WAIT STATE
NOT
uSED
15
ENABLE
PROGRAMMING
DISABLE
ROMf~ROM
PROGRAMMING
DON'T CARE SINCEI
BANKS DISABLED
:UN
ROM
7 l
BYTESAJlER
0-
,.
5
32K
The
Bytesaver
following
example
BYTESAVER special features.
Example2
uses
all
of
the
32K
program
ROM15
PROM)
lower
(assume this
four
(programming
amI
32K
PROMsata
a 16K
of
memory
card
is assignedtomemory
limeinsockets
8K
blocksofsource code
RAM
solely
- - --
-~--
-----
--
=~
card also residesinthe
for
---
;:;:;:.
DMA
bank
ROM12-
transfers
1
J.
to
Suppose
the
board
The system has
OOOOH-OFFFH,
the
32K
you
to
resideinthe
BYTESAVER
have a
4KofRAMatoverlapping addresses
so
2MHz
a
4K
memory
PROGRAM
POWER
system
lower
"hole"
32K
mustbecreated
map. You incend
Figure
r::====BANKS
I
,---DMAOUT
[[=
.-L
and
you
walJl
of
memory.
in
co
4-Example2Switch
Ar5=O
ENABlE
PROGRAMMING
,DISABLE
PROGRAMMING
ENABLED
ROM
ROM
memory
Power·Qn-Clear
details. The
settings
in
Figure 4 0
12·RDM
a-ROM
15
II
You decidetoassign the
bank
0 so
it
will
or
RESET -
for
memory
appropriate
read
32K
operations
Settings
DISABLE l
ROM
O-ROM
PROGRAMMING
7
32K
BYTESAVER
be
enabled
see
Section 2.6
BYTESAVER
oniJsystem
are
then
10
for
switch
shown
-
'--SOCKETS
L---OMA
~====NO
L
SHADOW
ROM
IN MEMORY
NOT
SOCKETS
O-ROM 3
OVERRIDE
WAIT STATES
USED
ROM
4-ROM
MAP
6
15
ENABLED
BOARD
BANKI-BANK 1
BOARD IN
NOT
IN
BANK
lIUOUUO~O
All
32K BYTESAVER special features and operational modes touched upon above are discussed
greater detail
follow.
2.2
Addressing
Addressing a
volves four levels
bank, a memory board, an
choosing the byte-on-chip_
Memory banks are
puning
a control word
in
the sections which immediately
The
32K
BYTESAVER
byte
on the 32K BYTESAVER
of
selection: choosing a memory
IC
chip, and finally
addressed by the CPU out-
to
an integral OUTPUT
in-
PO
RT
40H contained on each 32K BYTESAV ER
in
board. Board, chip and byte-on·chip are all decoded
from the sixteen bit address seni:
the
S-l00
bus.
Since the board capacity
selectisgenerated by
A15. There are sixteen
four high order address lines A
hardware generate chip enable (selecting ROM0ROM
151.
and
the
-A
10 are used
2716
PROM (see Figure 5).
to
the
ROM
remaining eleven address lines
address one-of-2,048
out
by the
is
32K bytes. board
high order address line
sockets. so the next
11-
A14 are used
CPU
bytes
on
to
AO
on a
t
Figure
Execute OUT (40H), A } _
A15}-----
~~~j------
A12
A
11
A10
A9
5-32K
BYTESAVER
AS
A7
A6
}--------
A5
A4
A3
A2
Al
A0
Addressing
Select bank0-7
Select one-of-two boards
Select one-of-sixteen chips
Select one-of-2048
bytes
7
32K
Bytesaver
2.3
Board
SELECT/CHIP
Select
5-100 bus address line A15ishardware com-
pared to switch A15 in
switch group. Switch A15
dress line A15""1 (address
A 15
OFF
corresponds
dresses
place
32K halfofthe
liyte
two
BYTESAVER Schematic)
to!
may
0000H-7FFFH).
the
32K
BYTESAVEA
64K address space, respectively_
Each ROM socket
swathofmemory.
one-of-eight decoders
each
ROM socket.
then
be
spanned
the
ADDR/CONTROL
ON
correspondstoad-
800eH-FFFFH);
to
address line A 15=0 (ad-
These two switch settings
in
the
upperorlower
IROM0-ROM151
Address lines A
(ICG
and
to
generate select signals
The
entire
by
64K address space
two
32K
spans
11~A14 feed
le7
in
BYTESAVER
switch
the
a 2K-
32K
boards. Figure 6 illustrates such an
along with
socket.
Suppose
with
BASIC.
EOOOH-£3FFH.
EFFFH.To
place the
ROMI2
assigned
the
address range
you
Cromemco's
The
Z-BO
load
two
and
ROMI3
to
800fJH-FFFFH
Example
programmed
Z-80
MONITOR
MONITOR
and
Control BASIC
these programs,
programmed
on a
with
spannedbyeach
3
two
and
spans
you
PROMs in
32K
A 15=1. 0
arrangement
ROM
2716
spans
BYTESAVER
PROMs
3K
Concrol
addresses
E400H-
would
sockets
then
8
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