ARCNET® Network Interface Modules for PC/104 Bus Computers
INST ALLA TION GUIDE
INTRODUCTION
The PC10420 series of ARCNET network interface modules (NIMs) links
PC/104 compatible computers with the ARCNET local area network (LAN).
ARCNET is classified as a token-bus LAN operating at a nominal 2.5 Mbps
while supporting 255 nodes. Interfacing ARCNET to a host computer
usually requires a NIM which plugs into the host computer’s bus.
The PC10420 incorporates the newer COM20020 ARCNET controller chip
with enhanced features over the earlier generation ARCNET chips. New
performance and integration enhancements include command chaining
operation and an internal 2K x 8 RAM buffer. There is no requirement for
wait-state arbitration.
Each PC10420 module has two LEDs on the board. The green LED
indicates that the module is receiving data on the network and the yellow
LED indicates bus access to the module. The PC10420 also has a piano
style DIP switch so that node addresses can be easily reassigned without
removing the module.
There are several versions of the PC10420 ARCNET NIM. The
PC10420-CXS supports coaxial star configurations requiring external
active or passive hubs. The PC10420-CXB supports coaxial bus
configuration usually requiring no hubs. Other versions include the
PC10420-FOG which supports fiber optic cable with either ST or SMA
connectors. The PC10420-TPB supports twisted-pair bus cabling using
RJ-11 and screw terminal connectors. There are various versions that
support EIA-485 communication each using RJ-11 and screw terminal
connectors.
On some models, operation up to 5.0 Mbps is possible. These models are
identified with a /5 designation.
SPECIFICATIONS
Environmental
Operating temperature:0°C to +60°C
Storage temperature:–40°C to +85°C
* The -CXS, -CXB and -TPB models can only operate at 2.5 Mbps.
The -485X model can only operate at 1.25, 2.5 or 5.0 Mbps.
Dimensions
3.550" x 3.775"
(90 mm x 95 mm)
Shipping Weight
1 lb. (.45 kg)
I/O Mapping
Supports I/O Mapping on any 16-byte boundary
Interrupt Lines
Supports strapping of IRQ 2/9, 3, 4, 5, 6, or 7
Compatibility
PC10420 series NIMs are compliant with ANSI/ATA 878.1 and PC/104
Specification 2.3.
Regulatory Compliance
FCC Part 15 Class A
Power Requirements
Model+5V–12V
PC10420-CXS200 mA20 mA
PC10420-CXB200 mA50 mA
PC10420-FOG-SMA300 mAN/A
PC10420-FOG-ST300 mAN/A
PC10420-TPB200 mA50 mA
PC10420-485200 mAN/A
PC10420-485D200 mAN/A
PC10420-485X200 mAN/A
PC10420/5-485200 mAN/A
PC10420/5-485D200 mAN/A
PC10420/5-485X200 mAN/A
PC10420/5-FG-ST300 mAN/A
TD874100-0IH
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INSTALLATION
Passive P2 Connector
Although the PC10420 is an eight-bit module, the PC10420 does provide a
P2 connector used for 16-bit applications. The advantage of the P2
connector is that 8-bit modules, such as the PC10420, can be located in the
middle of the PC/104 stack without compromising the integrity of the 16-bit
bus. Signals from the PC10420 are not connected to the passive P2
connector.
Mounting the PC10420
The PC10420 incorporates stack-through connectors and is shipped with
four 0.6" standoffs to facilitate mounting of the PC10420 onto the PC/104
stack. The PC10420 should be mounted below the 8-bit modules if any are
present in the system. If another eight-bit module is to be mounted above
the PC10420, use the enclosed standoffs. On some older eight-bit modules,
only two mounting holes are provided so only two standoffs are used. If
the PC10420 is the last module on the stack, use either two or four
M3x0.5-5MM panhead screws (not provided) to complete the mounting
onto the stack. Once mounted, field connections can be made.
Since the PC/104 stack does not make provision for a chassis (earth)
connection, a metal screw terminal has been provided for this purpose.
Simply connect one end of a green earthing wire to the screw terminal and
the other end to a suitable chassis ground.
Register Map
The PC10420 requires 16 contiguous I/O address locations in order to
access the COM20020 register and node ID switch. Because several
locations are reserved, it is important not to address another device to these
locations. The register map is shown in Table 1.
TD874100-0IH
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I/OReadWrite
AddressRegisterRegister
Base + 0StatusInterrupt Mark
Base + 1Diagnostic StatusCommand
Base + 2Address Pointer HighAddress Pointer High
Base + 3Address Pointer LowAddress Pointer Low
Base + 4DataData
Base + 5ReservedReserved
Base + 6ConfigurationConfiguration
Base + 7Test ID/..../Next IDTest ID/..../Next ID
Base + 8Node ID SwitchReserved
Base + 9Node ID SwitchReserved
Base + AReservedReserved
Base + BReservedReserved
Base + CReservedReserved
Base + DReservedReserved
Base + EReservedReserved
Base + FReservedReserved
Table 1—Register Map
I/O Base Addressing
The I/O base address for the register map can be set with jumpers. The
PC10420 does not require any memory address space—simplifying
installation. See Table 2 for details.